Searched refs:SCLK_FREQ_SETTING_STEP_0_PART1 (Results 1 – 2 of 2) sorted by relevance
478 WREG32_P(SCLK_FREQ_SETTING_STEP_0_PART1 + (index * 4 * 2), in r600_engine_clock_entry_set_post_divider()485 WREG32_P(SCLK_FREQ_SETTING_STEP_0_PART1 + (index * 4 * 2), in r600_engine_clock_entry_set_reference_divider()492 WREG32_P(SCLK_FREQ_SETTING_STEP_0_PART1 + (index * 4 * 2), in r600_engine_clock_entry_set_feedback_divider()499 WREG32_P(SCLK_FREQ_SETTING_STEP_0_PART1 + (index * 4 * 2), in r600_engine_clock_entry_set_step_time()
1362 #define SCLK_FREQ_SETTING_STEP_0_PART1 0x648 macro