Searched refs:divsel (Results 1 – 3 of 3) sorted by relevance
504 u32 divsel; member511 .divsel = PRCM_DSI_PLLOUT_SEL_PHI,516 .divsel = PRCM_DSI_PLLOUT_SEL_PHI,1446 val |= ((enable ? dsiclk[n].divsel : PRCM_DSI_PLLOUT_SEL_OFF) << in request_dsiclk()1600 u32 divsel; in dsiclk_rate() local1603 divsel = readl(PRCM_DSI_PLLOUT_SEL); in dsiclk_rate()1604 divsel = ((divsel & dsiclk[n].divsel_mask) >> dsiclk[n].divsel_shift); in dsiclk_rate()1606 if (divsel == PRCM_DSI_PLLOUT_SEL_OFF) in dsiclk_rate()1607 divsel = dsiclk[n].divsel; in dsiclk_rate()1609 dsiclk[n].divsel = divsel; in dsiclk_rate()[all …]
711 u32 divsel:1; member734 pll_div->divsel = 1; in pll_factors()743 pll_div->divsel = 0; in pll_factors()806 (pll_div.divsel << 9) | (pll_div.divctl << 8); in wm9713_set_pll()811 (pll_div.divsel << 9) | (pll_div.divctl << 8); in wm9713_set_pll()
3826 u32 divsel, phaseinc, auxdiv, phasedir = 0; in lpt_program_iclkip() local3845 divsel = 0x41; in lpt_program_iclkip()3863 divsel = msb_divisor_value - 2; in lpt_program_iclkip()3868 WARN_ON(SBI_SSCDIVINTPHASE_DIVSEL(divsel) & in lpt_program_iclkip()3876 divsel, in lpt_program_iclkip()3883 temp |= SBI_SSCDIVINTPHASE_DIVSEL(divsel); in lpt_program_iclkip()