Searched refs:pll_post_div (Results 1 – 3 of 3) sorted by relevance
228 unsigned int pll_post_div, ctrl_val0, ctrl_val1, denom; in nlm_xlp2_get_core_frequency() local248 pll_post_div = 2; in nlm_xlp2_get_core_frequency()251 pll_post_div = 4; in nlm_xlp2_get_core_frequency()254 pll_post_div = 8; in nlm_xlp2_get_core_frequency()257 pll_post_div = 16; in nlm_xlp2_get_core_frequency()261 pll_post_div = 1; in nlm_xlp2_get_core_frequency()266 denom = 3 * pll_post_div; in nlm_xlp2_get_core_frequency()308 u32 ctrl_val0, ctrl_val2, vco_post_div, pll_post_div, cpu_xlp9xx; in nlm_xlp2_get_pic_frequency() local404 pll_post_div = (ctrl_val0 >> 24) & 0x7; in nlm_xlp2_get_pic_frequency()409 switch (pll_post_div) { in nlm_xlp2_get_pic_frequency()[all …]
362 u32 pll_post_div; member
737 radeon_crtc->pll_post_div = args.v3.sOutput.ucPostDiv; in atombios_adjust_pll()1090 pll->post_div = radeon_crtc->pll_post_div; in atombios_crtc_set_pll()