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Searched refs:CLK_TOP_MSDC50_0_SEL (Results 1 – 9 of 9) sorted by relevance

/linux-4.4.14/Documentation/devicetree/bindings/mmc/
Dmtk-sd.txt38 assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>;
/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/
Dmt8173-clk.h114 #define CLK_TOP_MSDC50_0_SEL 96 macro
/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/
Dmt8173-clk.h114 #define CLK_TOP_MSDC50_0_SEL 96 macro
/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/
Dmt8173-clk.h114 #define CLK_TOP_MSDC50_0_SEL 96 macro
/linux-4.4.14/include/dt-bindings/clock/
Dmt8173-clk.h114 #define CLK_TOP_MSDC50_0_SEL 96 macro
/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/
Dmt8173-clk.h114 #define CLK_TOP_MSDC50_0_SEL 96 macro
/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/
Dmt8173-clk.h114 #define CLK_TOP_MSDC50_0_SEL 96 macro
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/
Dmt8173-clk.h114 #define CLK_TOP_MSDC50_0_SEL 96 macro
/linux-4.4.14/drivers/clk/mediatek/
Dclk-mt8173.c548 MUX_GATE(CLK_TOP_MSDC50_0_SEL, "msdc50_0_sel", msdc50_0_parents, 0x0070, 16, 4, 23),