Searched refs:IMX6QDL_CLK_IPU2_DI0_SEL (Results 1 – 9 of 9) sorted by relevance
53 #define IMX6QDL_CLK_IPU2_DI0_SEL 41 macro
253 <&clks IMX6QDL_CLK_IPU2_DI0_SEL>, <&clks IMX6QDL_CLK_IPU2_DI1_SEL>,
309 …clk[IMX6QDL_CLK_IPU2_DI0_SEL] = imx_clk_mux_flags("ipu2_di0_sel", base + 0x38, 0, 3, ipu2… in imx6q_clocks_init()518 clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_SEL], clk[IMX6QDL_CLK_IPU2_DI0_PRE]); in imx6q_clocks_init()