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Searched refs:TEGRA20_CLK_PLL_M_OUT1 (Results 1 – 8 of 8) sorted by relevance

/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/
Dtegra20-car.h142 #define TEGRA20_CLK_PLL_M_OUT1 120 macro
/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/
Dtegra20-car.h142 #define TEGRA20_CLK_PLL_M_OUT1 120 macro
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/
Dtegra20-car.h142 #define TEGRA20_CLK_PLL_M_OUT1 120 macro
/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/
Dtegra20-car.h142 #define TEGRA20_CLK_PLL_M_OUT1 120 macro
/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/
Dtegra20-car.h142 #define TEGRA20_CLK_PLL_M_OUT1 120 macro
/linux-4.4.14/include/dt-bindings/clock/
Dtegra20-car.h142 #define TEGRA20_CLK_PLL_M_OUT1 120 macro
/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/
Dtegra20-car.h142 #define TEGRA20_CLK_PLL_M_OUT1 120 macro
/linux-4.4.14/drivers/clk/tegra/
Dclk-tegra20.c438 { .con_id = "pll_m_out1", .dt_id = TEGRA20_CLK_PLL_M_OUT1 },
666 clks[TEGRA20_CLK_PLL_M_OUT1] = clk; in tegra20_pll_init()