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Searched refs:lpsr (Results 1 – 3 of 3) sorted by relevance

/linux-4.4.14/Documentation/devicetree/bindings/pinctrl/
Dfsl,imx7d-pinctrl.txt4 as previous iMX SoC generation and fsl,imx7d-iomuxc-lpsr which provides low
5 power state retention capabilities on gpios that are part of iomuxc-lpsr
6 (GPIO1_IO7..GPIO1_IO0). While iomuxc-lpsr provides its own set of registers for
9 fsl,imx-pinctrl driver to support iomuxc-lpsr controller.
11 iomuxc_lpsr: iomuxc-lpsr@302c0000 {
12 compatible = "fsl,imx7d-iomuxc-lpsr";
22 Pheriparials using pads from iomuxc-lpsr support low state retention power
30 "fsl,imx7d-iomuxc-lpsr" for Low Power State Retention IOMUXC controller.
37 - fsl,input-sel: required property for iomuxc-lpsr controller, this property is
56 While iomuxc-lpsr is intended to be used by dedicated peripherals to take
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/linux-4.4.14/drivers/rtc/
Drtc-snvs.c154 u32 lptar, lpsr; in snvs_rtc_read_alarm() local
159 regmap_read(data->regmap, data->offset + SNVS_LPSR, &lpsr); in snvs_rtc_read_alarm()
160 alrm->pending = (lpsr & SNVS_LPSR_LPTA) ? 1 : 0; in snvs_rtc_read_alarm()
207 u32 lpsr; in snvs_rtc_irq_handler() local
210 regmap_read(data->regmap, data->offset + SNVS_LPSR, &lpsr); in snvs_rtc_irq_handler()
212 if (lpsr & SNVS_LPSR_LPTA) { in snvs_rtc_irq_handler()
222 regmap_write(data->regmap, data->offset + SNVS_LPSR, lpsr); in snvs_rtc_irq_handler()
/linux-4.4.14/arch/arm/boot/dts/
Dimx7d.dtsi449 iomuxc_lpsr: iomuxc-lpsr@302c0000 {
450 compatible = "fsl,imx7d-iomuxc-lpsr";