1 /*
2 * Copyright (C) 2012 Texas Instruments
3 * Author: Rob Clark <robdclark@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18 /* LCDC DRM driver, based on da8xx-fb */
19
20 #include "tilcdc_drv.h"
21 #include "tilcdc_regs.h"
22 #include "tilcdc_tfp410.h"
23 #include "tilcdc_slave.h"
24 #include "tilcdc_panel.h"
25
26 #include "drm_fb_helper.h"
27
28 static LIST_HEAD(module_list);
29 static bool slave_probing;
30
tilcdc_module_init(struct tilcdc_module * mod,const char * name,const struct tilcdc_module_ops * funcs)31 void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
32 const struct tilcdc_module_ops *funcs)
33 {
34 mod->name = name;
35 mod->funcs = funcs;
36 INIT_LIST_HEAD(&mod->list);
37 list_add(&mod->list, &module_list);
38 }
39
tilcdc_module_cleanup(struct tilcdc_module * mod)40 void tilcdc_module_cleanup(struct tilcdc_module *mod)
41 {
42 list_del(&mod->list);
43 }
44
tilcdc_slave_probedefer(bool defered)45 void tilcdc_slave_probedefer(bool defered)
46 {
47 slave_probing = defered;
48 }
49
50 static struct of_device_id tilcdc_of_match[];
51
tilcdc_fb_create(struct drm_device * dev,struct drm_file * file_priv,struct drm_mode_fb_cmd2 * mode_cmd)52 static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev,
53 struct drm_file *file_priv, struct drm_mode_fb_cmd2 *mode_cmd)
54 {
55 return drm_fb_cma_create(dev, file_priv, mode_cmd);
56 }
57
tilcdc_fb_output_poll_changed(struct drm_device * dev)58 static void tilcdc_fb_output_poll_changed(struct drm_device *dev)
59 {
60 struct tilcdc_drm_private *priv = dev->dev_private;
61 drm_fbdev_cma_hotplug_event(priv->fbdev);
62 }
63
64 static const struct drm_mode_config_funcs mode_config_funcs = {
65 .fb_create = tilcdc_fb_create,
66 .output_poll_changed = tilcdc_fb_output_poll_changed,
67 };
68
modeset_init(struct drm_device * dev)69 static int modeset_init(struct drm_device *dev)
70 {
71 struct tilcdc_drm_private *priv = dev->dev_private;
72 struct tilcdc_module *mod;
73
74 drm_mode_config_init(dev);
75
76 priv->crtc = tilcdc_crtc_create(dev);
77
78 list_for_each_entry(mod, &module_list, list) {
79 DBG("loading module: %s", mod->name);
80 mod->funcs->modeset_init(mod, dev);
81 }
82
83 if ((priv->num_encoders == 0) || (priv->num_connectors == 0)) {
84 /* oh nos! */
85 dev_err(dev->dev, "no encoders/connectors found\n");
86 drm_mode_config_cleanup(dev);
87 return -ENXIO;
88 }
89
90 dev->mode_config.min_width = 0;
91 dev->mode_config.min_height = 0;
92 dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
93 dev->mode_config.max_height = 2048;
94 dev->mode_config.funcs = &mode_config_funcs;
95
96 return 0;
97 }
98
99 #ifdef CONFIG_CPU_FREQ
cpufreq_transition(struct notifier_block * nb,unsigned long val,void * data)100 static int cpufreq_transition(struct notifier_block *nb,
101 unsigned long val, void *data)
102 {
103 struct tilcdc_drm_private *priv = container_of(nb,
104 struct tilcdc_drm_private, freq_transition);
105 if (val == CPUFREQ_POSTCHANGE) {
106 if (priv->lcd_fck_rate != clk_get_rate(priv->clk)) {
107 priv->lcd_fck_rate = clk_get_rate(priv->clk);
108 tilcdc_crtc_update_clk(priv->crtc);
109 }
110 }
111
112 return 0;
113 }
114 #endif
115
116 /*
117 * DRM operations:
118 */
119
tilcdc_unload(struct drm_device * dev)120 static int tilcdc_unload(struct drm_device *dev)
121 {
122 struct tilcdc_drm_private *priv = dev->dev_private;
123
124 drm_fbdev_cma_fini(priv->fbdev);
125 drm_kms_helper_poll_fini(dev);
126 drm_mode_config_cleanup(dev);
127 drm_vblank_cleanup(dev);
128
129 pm_runtime_get_sync(dev->dev);
130 drm_irq_uninstall(dev);
131 pm_runtime_put_sync(dev->dev);
132
133 #ifdef CONFIG_CPU_FREQ
134 cpufreq_unregister_notifier(&priv->freq_transition,
135 CPUFREQ_TRANSITION_NOTIFIER);
136 #endif
137
138 if (priv->clk)
139 clk_put(priv->clk);
140
141 if (priv->mmio)
142 iounmap(priv->mmio);
143
144 flush_workqueue(priv->wq);
145 destroy_workqueue(priv->wq);
146
147 dev->dev_private = NULL;
148
149 pm_runtime_disable(dev->dev);
150
151 kfree(priv);
152
153 return 0;
154 }
155
tilcdc_load(struct drm_device * dev,unsigned long flags)156 static int tilcdc_load(struct drm_device *dev, unsigned long flags)
157 {
158 struct platform_device *pdev = dev->platformdev;
159 struct device_node *node = pdev->dev.of_node;
160 struct tilcdc_drm_private *priv;
161 struct tilcdc_module *mod;
162 struct resource *res;
163 u32 bpp = 0;
164 int ret;
165
166 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
167 if (!priv) {
168 dev_err(dev->dev, "failed to allocate private data\n");
169 return -ENOMEM;
170 }
171
172 dev->dev_private = priv;
173
174 priv->wq = alloc_ordered_workqueue("tilcdc", 0);
175 if (!priv->wq) {
176 ret = -ENOMEM;
177 goto fail_free_priv;
178 }
179
180 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
181 if (!res) {
182 dev_err(dev->dev, "failed to get memory resource\n");
183 ret = -EINVAL;
184 goto fail_free_wq;
185 }
186
187 priv->mmio = ioremap_nocache(res->start, resource_size(res));
188 if (!priv->mmio) {
189 dev_err(dev->dev, "failed to ioremap\n");
190 ret = -ENOMEM;
191 goto fail_free_wq;
192 }
193
194 priv->clk = clk_get(dev->dev, "fck");
195 if (IS_ERR(priv->clk)) {
196 dev_err(dev->dev, "failed to get functional clock\n");
197 ret = -ENODEV;
198 goto fail_iounmap;
199 }
200
201 priv->disp_clk = clk_get(dev->dev, "dpll_disp_ck");
202 if (IS_ERR(priv->clk)) {
203 dev_err(dev->dev, "failed to get display clock\n");
204 ret = -ENODEV;
205 goto fail_put_clk;
206 }
207
208 #ifdef CONFIG_CPU_FREQ
209 priv->lcd_fck_rate = clk_get_rate(priv->clk);
210 priv->freq_transition.notifier_call = cpufreq_transition;
211 ret = cpufreq_register_notifier(&priv->freq_transition,
212 CPUFREQ_TRANSITION_NOTIFIER);
213 if (ret) {
214 dev_err(dev->dev, "failed to register cpufreq notifier\n");
215 goto fail_put_disp_clk;
216 }
217 #endif
218
219 if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
220 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
221
222 DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
223
224 if (of_property_read_u32(node, "ti,max-width", &priv->max_width))
225 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
226
227 DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
228
229 if (of_property_read_u32(node, "ti,max-pixelclock",
230 &priv->max_pixelclock))
231 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
232
233 DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
234
235 pm_runtime_enable(dev->dev);
236
237 /* Determine LCD IP Version */
238 pm_runtime_get_sync(dev->dev);
239 switch (tilcdc_read(dev, LCDC_PID_REG)) {
240 case 0x4c100102:
241 priv->rev = 1;
242 break;
243 case 0x4f200800:
244 case 0x4f201000:
245 priv->rev = 2;
246 break;
247 default:
248 dev_warn(dev->dev, "Unknown PID Reg value 0x%08x, "
249 "defaulting to LCD revision 1\n",
250 tilcdc_read(dev, LCDC_PID_REG));
251 priv->rev = 1;
252 break;
253 }
254
255 pm_runtime_put_sync(dev->dev);
256
257 ret = modeset_init(dev);
258 if (ret < 0) {
259 dev_err(dev->dev, "failed to initialize mode setting\n");
260 goto fail_cpufreq_unregister;
261 }
262
263 ret = drm_vblank_init(dev, 1);
264 if (ret < 0) {
265 dev_err(dev->dev, "failed to initialize vblank\n");
266 goto fail_mode_config_cleanup;
267 }
268
269 pm_runtime_get_sync(dev->dev);
270 ret = drm_irq_install(dev, platform_get_irq(dev->platformdev, 0));
271 pm_runtime_put_sync(dev->dev);
272 if (ret < 0) {
273 dev_err(dev->dev, "failed to install IRQ handler\n");
274 goto fail_vblank_cleanup;
275 }
276
277 platform_set_drvdata(pdev, dev);
278
279
280 list_for_each_entry(mod, &module_list, list) {
281 DBG("%s: preferred_bpp: %d", mod->name, mod->preferred_bpp);
282 bpp = mod->preferred_bpp;
283 if (bpp > 0)
284 break;
285 }
286
287 priv->fbdev = drm_fbdev_cma_init(dev, bpp,
288 dev->mode_config.num_crtc,
289 dev->mode_config.num_connector);
290 if (IS_ERR(priv->fbdev)) {
291 ret = PTR_ERR(priv->fbdev);
292 goto fail_irq_uninstall;
293 }
294
295 drm_kms_helper_poll_init(dev);
296
297 return 0;
298
299 fail_irq_uninstall:
300 pm_runtime_get_sync(dev->dev);
301 drm_irq_uninstall(dev);
302 pm_runtime_put_sync(dev->dev);
303
304 fail_vblank_cleanup:
305 drm_vblank_cleanup(dev);
306
307 fail_mode_config_cleanup:
308 drm_mode_config_cleanup(dev);
309
310 fail_cpufreq_unregister:
311 pm_runtime_disable(dev->dev);
312 #ifdef CONFIG_CPU_FREQ
313 cpufreq_unregister_notifier(&priv->freq_transition,
314 CPUFREQ_TRANSITION_NOTIFIER);
315 fail_put_disp_clk:
316 clk_put(priv->disp_clk);
317 #endif
318
319 fail_put_clk:
320 clk_put(priv->clk);
321
322 fail_iounmap:
323 iounmap(priv->mmio);
324
325 fail_free_wq:
326 flush_workqueue(priv->wq);
327 destroy_workqueue(priv->wq);
328
329 fail_free_priv:
330 dev->dev_private = NULL;
331 kfree(priv);
332 return ret;
333 }
334
tilcdc_preclose(struct drm_device * dev,struct drm_file * file)335 static void tilcdc_preclose(struct drm_device *dev, struct drm_file *file)
336 {
337 struct tilcdc_drm_private *priv = dev->dev_private;
338
339 tilcdc_crtc_cancel_page_flip(priv->crtc, file);
340 }
341
tilcdc_lastclose(struct drm_device * dev)342 static void tilcdc_lastclose(struct drm_device *dev)
343 {
344 struct tilcdc_drm_private *priv = dev->dev_private;
345 drm_fbdev_cma_restore_mode(priv->fbdev);
346 }
347
tilcdc_irq(int irq,void * arg)348 static irqreturn_t tilcdc_irq(int irq, void *arg)
349 {
350 struct drm_device *dev = arg;
351 struct tilcdc_drm_private *priv = dev->dev_private;
352 return tilcdc_crtc_irq(priv->crtc);
353 }
354
tilcdc_irq_preinstall(struct drm_device * dev)355 static void tilcdc_irq_preinstall(struct drm_device *dev)
356 {
357 tilcdc_clear_irqstatus(dev, 0xffffffff);
358 }
359
tilcdc_irq_postinstall(struct drm_device * dev)360 static int tilcdc_irq_postinstall(struct drm_device *dev)
361 {
362 struct tilcdc_drm_private *priv = dev->dev_private;
363
364 /* enable FIFO underflow irq: */
365 if (priv->rev == 1)
366 tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_UNDERFLOW_INT_ENA);
367 else
368 tilcdc_set(dev, LCDC_INT_ENABLE_SET_REG, LCDC_V2_UNDERFLOW_INT_ENA);
369
370 return 0;
371 }
372
tilcdc_irq_uninstall(struct drm_device * dev)373 static void tilcdc_irq_uninstall(struct drm_device *dev)
374 {
375 struct tilcdc_drm_private *priv = dev->dev_private;
376
377 /* disable irqs that we might have enabled: */
378 if (priv->rev == 1) {
379 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,
380 LCDC_V1_UNDERFLOW_INT_ENA | LCDC_V1_PL_INT_ENA);
381 tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_V1_END_OF_FRAME_INT_ENA);
382 } else {
383 tilcdc_clear(dev, LCDC_INT_ENABLE_SET_REG,
384 LCDC_V2_UNDERFLOW_INT_ENA | LCDC_V2_PL_INT_ENA |
385 LCDC_V2_END_OF_FRAME0_INT_ENA | LCDC_V2_END_OF_FRAME1_INT_ENA |
386 LCDC_FRAME_DONE);
387 }
388
389 }
390
enable_vblank(struct drm_device * dev,bool enable)391 static void enable_vblank(struct drm_device *dev, bool enable)
392 {
393 struct tilcdc_drm_private *priv = dev->dev_private;
394 u32 reg, mask;
395
396 if (priv->rev == 1) {
397 reg = LCDC_DMA_CTRL_REG;
398 mask = LCDC_V1_END_OF_FRAME_INT_ENA;
399 } else {
400 reg = LCDC_INT_ENABLE_SET_REG;
401 mask = LCDC_V2_END_OF_FRAME0_INT_ENA |
402 LCDC_V2_END_OF_FRAME1_INT_ENA | LCDC_FRAME_DONE;
403 }
404
405 if (enable)
406 tilcdc_set(dev, reg, mask);
407 else
408 tilcdc_clear(dev, reg, mask);
409 }
410
tilcdc_enable_vblank(struct drm_device * dev,int crtc)411 static int tilcdc_enable_vblank(struct drm_device *dev, int crtc)
412 {
413 enable_vblank(dev, true);
414 return 0;
415 }
416
tilcdc_disable_vblank(struct drm_device * dev,int crtc)417 static void tilcdc_disable_vblank(struct drm_device *dev, int crtc)
418 {
419 enable_vblank(dev, false);
420 }
421
422 #if defined(CONFIG_DEBUG_FS) || defined(CONFIG_PM_SLEEP)
423 static const struct {
424 const char *name;
425 uint8_t rev;
426 uint8_t save;
427 uint32_t reg;
428 } registers[] = {
429 #define REG(rev, save, reg) { #reg, rev, save, reg }
430 /* exists in revision 1: */
431 REG(1, false, LCDC_PID_REG),
432 REG(1, true, LCDC_CTRL_REG),
433 REG(1, false, LCDC_STAT_REG),
434 REG(1, true, LCDC_RASTER_CTRL_REG),
435 REG(1, true, LCDC_RASTER_TIMING_0_REG),
436 REG(1, true, LCDC_RASTER_TIMING_1_REG),
437 REG(1, true, LCDC_RASTER_TIMING_2_REG),
438 REG(1, true, LCDC_DMA_CTRL_REG),
439 REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG),
440 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG),
441 REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG),
442 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG),
443 /* new in revision 2: */
444 REG(2, false, LCDC_RAW_STAT_REG),
445 REG(2, false, LCDC_MASKED_STAT_REG),
446 REG(2, false, LCDC_INT_ENABLE_SET_REG),
447 REG(2, false, LCDC_INT_ENABLE_CLR_REG),
448 REG(2, false, LCDC_END_OF_INT_IND_REG),
449 REG(2, true, LCDC_CLK_ENABLE_REG),
450 REG(2, true, LCDC_INT_ENABLE_SET_REG),
451 #undef REG
452 };
453 #endif
454
455 #ifdef CONFIG_DEBUG_FS
tilcdc_regs_show(struct seq_file * m,void * arg)456 static int tilcdc_regs_show(struct seq_file *m, void *arg)
457 {
458 struct drm_info_node *node = (struct drm_info_node *) m->private;
459 struct drm_device *dev = node->minor->dev;
460 struct tilcdc_drm_private *priv = dev->dev_private;
461 unsigned i;
462
463 pm_runtime_get_sync(dev->dev);
464
465 seq_printf(m, "revision: %d\n", priv->rev);
466
467 for (i = 0; i < ARRAY_SIZE(registers); i++)
468 if (priv->rev >= registers[i].rev)
469 seq_printf(m, "%s:\t %08x\n", registers[i].name,
470 tilcdc_read(dev, registers[i].reg));
471
472 pm_runtime_put_sync(dev->dev);
473
474 return 0;
475 }
476
tilcdc_mm_show(struct seq_file * m,void * arg)477 static int tilcdc_mm_show(struct seq_file *m, void *arg)
478 {
479 struct drm_info_node *node = (struct drm_info_node *) m->private;
480 struct drm_device *dev = node->minor->dev;
481 return drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm);
482 }
483
484 static struct drm_info_list tilcdc_debugfs_list[] = {
485 { "regs", tilcdc_regs_show, 0 },
486 { "mm", tilcdc_mm_show, 0 },
487 { "fb", drm_fb_cma_debugfs_show, 0 },
488 };
489
tilcdc_debugfs_init(struct drm_minor * minor)490 static int tilcdc_debugfs_init(struct drm_minor *minor)
491 {
492 struct drm_device *dev = minor->dev;
493 struct tilcdc_module *mod;
494 int ret;
495
496 ret = drm_debugfs_create_files(tilcdc_debugfs_list,
497 ARRAY_SIZE(tilcdc_debugfs_list),
498 minor->debugfs_root, minor);
499
500 list_for_each_entry(mod, &module_list, list)
501 if (mod->funcs->debugfs_init)
502 mod->funcs->debugfs_init(mod, minor);
503
504 if (ret) {
505 dev_err(dev->dev, "could not install tilcdc_debugfs_list\n");
506 return ret;
507 }
508
509 return ret;
510 }
511
tilcdc_debugfs_cleanup(struct drm_minor * minor)512 static void tilcdc_debugfs_cleanup(struct drm_minor *minor)
513 {
514 struct tilcdc_module *mod;
515 drm_debugfs_remove_files(tilcdc_debugfs_list,
516 ARRAY_SIZE(tilcdc_debugfs_list), minor);
517
518 list_for_each_entry(mod, &module_list, list)
519 if (mod->funcs->debugfs_cleanup)
520 mod->funcs->debugfs_cleanup(mod, minor);
521 }
522 #endif
523
524 static const struct file_operations fops = {
525 .owner = THIS_MODULE,
526 .open = drm_open,
527 .release = drm_release,
528 .unlocked_ioctl = drm_ioctl,
529 #ifdef CONFIG_COMPAT
530 .compat_ioctl = drm_compat_ioctl,
531 #endif
532 .poll = drm_poll,
533 .read = drm_read,
534 .llseek = no_llseek,
535 .mmap = drm_gem_cma_mmap,
536 };
537
538 static struct drm_driver tilcdc_driver = {
539 .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET,
540 .load = tilcdc_load,
541 .unload = tilcdc_unload,
542 .preclose = tilcdc_preclose,
543 .lastclose = tilcdc_lastclose,
544 .set_busid = drm_platform_set_busid,
545 .irq_handler = tilcdc_irq,
546 .irq_preinstall = tilcdc_irq_preinstall,
547 .irq_postinstall = tilcdc_irq_postinstall,
548 .irq_uninstall = tilcdc_irq_uninstall,
549 .get_vblank_counter = drm_vblank_count,
550 .enable_vblank = tilcdc_enable_vblank,
551 .disable_vblank = tilcdc_disable_vblank,
552 .gem_free_object = drm_gem_cma_free_object,
553 .gem_vm_ops = &drm_gem_cma_vm_ops,
554 .dumb_create = drm_gem_cma_dumb_create,
555 .dumb_map_offset = drm_gem_cma_dumb_map_offset,
556 .dumb_destroy = drm_gem_dumb_destroy,
557 #ifdef CONFIG_DEBUG_FS
558 .debugfs_init = tilcdc_debugfs_init,
559 .debugfs_cleanup = tilcdc_debugfs_cleanup,
560 #endif
561 .fops = &fops,
562 .name = "tilcdc",
563 .desc = "TI LCD Controller DRM",
564 .date = "20121205",
565 .major = 1,
566 .minor = 0,
567 };
568
569 /*
570 * Power management:
571 */
572
573 #ifdef CONFIG_PM_SLEEP
tilcdc_pm_suspend(struct device * dev)574 static int tilcdc_pm_suspend(struct device *dev)
575 {
576 struct drm_device *ddev = dev_get_drvdata(dev);
577 struct tilcdc_drm_private *priv = ddev->dev_private;
578 unsigned i, n = 0;
579
580 drm_kms_helper_poll_disable(ddev);
581
582 /* Save register state: */
583 for (i = 0; i < ARRAY_SIZE(registers); i++)
584 if (registers[i].save && (priv->rev >= registers[i].rev))
585 priv->saved_register[n++] = tilcdc_read(ddev, registers[i].reg);
586
587 return 0;
588 }
589
tilcdc_pm_resume(struct device * dev)590 static int tilcdc_pm_resume(struct device *dev)
591 {
592 struct drm_device *ddev = dev_get_drvdata(dev);
593 struct tilcdc_drm_private *priv = ddev->dev_private;
594 unsigned i, n = 0;
595
596 /* Restore register state: */
597 for (i = 0; i < ARRAY_SIZE(registers); i++)
598 if (registers[i].save && (priv->rev >= registers[i].rev))
599 tilcdc_write(ddev, registers[i].reg, priv->saved_register[n++]);
600
601 drm_kms_helper_poll_enable(ddev);
602
603 return 0;
604 }
605 #endif
606
607 static const struct dev_pm_ops tilcdc_pm_ops = {
608 SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume)
609 };
610
611 /*
612 * Platform driver:
613 */
614
tilcdc_pdev_probe(struct platform_device * pdev)615 static int tilcdc_pdev_probe(struct platform_device *pdev)
616 {
617 /* bail out early if no DT data: */
618 if (!pdev->dev.of_node) {
619 dev_err(&pdev->dev, "device-tree data is missing\n");
620 return -ENXIO;
621 }
622
623 /* defer probing if slave is in deferred probing */
624 if (slave_probing == true)
625 return -EPROBE_DEFER;
626
627 return drm_platform_init(&tilcdc_driver, pdev);
628 }
629
tilcdc_pdev_remove(struct platform_device * pdev)630 static int tilcdc_pdev_remove(struct platform_device *pdev)
631 {
632 drm_put_dev(platform_get_drvdata(pdev));
633
634 return 0;
635 }
636
637 static struct of_device_id tilcdc_of_match[] = {
638 { .compatible = "ti,am33xx-tilcdc", },
639 { },
640 };
641 MODULE_DEVICE_TABLE(of, tilcdc_of_match);
642
643 static struct platform_driver tilcdc_platform_driver = {
644 .probe = tilcdc_pdev_probe,
645 .remove = tilcdc_pdev_remove,
646 .driver = {
647 .name = "tilcdc",
648 .pm = &tilcdc_pm_ops,
649 .of_match_table = tilcdc_of_match,
650 },
651 };
652
tilcdc_drm_init(void)653 static int __init tilcdc_drm_init(void)
654 {
655 DBG("init");
656 tilcdc_tfp410_init();
657 tilcdc_slave_init();
658 tilcdc_panel_init();
659 return platform_driver_register(&tilcdc_platform_driver);
660 }
661
tilcdc_drm_fini(void)662 static void __exit tilcdc_drm_fini(void)
663 {
664 DBG("fini");
665 platform_driver_unregister(&tilcdc_platform_driver);
666 tilcdc_panel_fini();
667 tilcdc_slave_fini();
668 tilcdc_tfp410_fini();
669 }
670
671 module_init(tilcdc_drm_init);
672 module_exit(tilcdc_drm_fini);
673
674 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
675 MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
676 MODULE_LICENSE("GPL");
677