1/*
2 * Copyright (C) 2010 Eric Benard - eric@eukrea.com
3 *
4 * Based on pcm970-baseboard.c which is :
5 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
19 * MA 02110-1301, USA.
20 */
21
22#include <linux/types.h>
23#include <linux/init.h>
24
25#include <linux/gpio.h>
26#include <linux/interrupt.h>
27#include <linux/leds.h>
28#include <linux/platform_device.h>
29#include <linux/input.h>
30#include <linux/spi/spi.h>
31#include <video/platform_lcd.h>
32#include <linux/i2c.h>
33
34#include <asm/mach-types.h>
35#include <asm/mach/arch.h>
36#include <asm/mach/time.h>
37#include <asm/mach/map.h>
38
39#include "common.h"
40#include "devices-imx35.h"
41#include "hardware.h"
42#include "iomux-mx35.h"
43
44static const struct fb_videomode fb_modedb[] = {
45	{
46		.name		= "CMO-QVGA",
47		.refresh	= 60,
48		.xres		= 320,
49		.yres		= 240,
50		.pixclock	= KHZ2PICOS(6500),
51		.left_margin	= 68,
52		.right_margin	= 20,
53		.upper_margin	= 15,
54		.lower_margin	= 4,
55		.hsync_len	= 30,
56		.vsync_len	= 3,
57		.sync		= 0,
58		.vmode		= FB_VMODE_NONINTERLACED,
59		.flag		= 0,
60	},
61	{
62		.name		= "DVI-VGA",
63		.refresh	= 60,
64		.xres		= 640,
65		.yres		= 480,
66		.pixclock	= 32000,
67		.left_margin	= 100,
68		.right_margin	= 100,
69		.upper_margin	= 7,
70		.lower_margin	= 100,
71		.hsync_len	= 7,
72		.vsync_len	= 7,
73		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT |
74				  FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
75		.vmode		= FB_VMODE_NONINTERLACED,
76		.flag		= 0,
77	},
78	{
79		.name		= "DVI-SVGA",
80		.refresh	= 60,
81		.xres		= 800,
82		.yres		= 600,
83		.pixclock	= 25000,
84		.left_margin	= 75,
85		.right_margin	= 75,
86		.upper_margin	= 7,
87		.lower_margin	= 75,
88		.hsync_len	= 7,
89		.vsync_len	= 7,
90		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT |
91				  FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
92		.vmode		= FB_VMODE_NONINTERLACED,
93		.flag		= 0,
94	},
95};
96
97static struct mx3fb_platform_data mx3fb_pdata __initdata = {
98	.name		= "CMO-QVGA",
99	.mode		= fb_modedb,
100	.num_modes	= ARRAY_SIZE(fb_modedb),
101};
102
103static const iomux_v3_cfg_t eukrea_mbimxsd_pads[] __initconst = {
104	/* LCD */
105	MX35_PAD_LD0__IPU_DISPB_DAT_0,
106	MX35_PAD_LD1__IPU_DISPB_DAT_1,
107	MX35_PAD_LD2__IPU_DISPB_DAT_2,
108	MX35_PAD_LD3__IPU_DISPB_DAT_3,
109	MX35_PAD_LD4__IPU_DISPB_DAT_4,
110	MX35_PAD_LD5__IPU_DISPB_DAT_5,
111	MX35_PAD_LD6__IPU_DISPB_DAT_6,
112	MX35_PAD_LD7__IPU_DISPB_DAT_7,
113	MX35_PAD_LD8__IPU_DISPB_DAT_8,
114	MX35_PAD_LD9__IPU_DISPB_DAT_9,
115	MX35_PAD_LD10__IPU_DISPB_DAT_10,
116	MX35_PAD_LD11__IPU_DISPB_DAT_11,
117	MX35_PAD_LD12__IPU_DISPB_DAT_12,
118	MX35_PAD_LD13__IPU_DISPB_DAT_13,
119	MX35_PAD_LD14__IPU_DISPB_DAT_14,
120	MX35_PAD_LD15__IPU_DISPB_DAT_15,
121	MX35_PAD_LD16__IPU_DISPB_DAT_16,
122	MX35_PAD_LD17__IPU_DISPB_DAT_17,
123	MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
124	MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
125	MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
126	MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
127	/* Backlight */
128	MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
129	/* LCD_PWR */
130	MX35_PAD_D3_CLS__GPIO1_4,
131	/* LED */
132	MX35_PAD_LD23__GPIO3_29,
133	/* SWITCH */
134	MX35_PAD_LD19__GPIO3_25,
135	/* UART2 */
136	MX35_PAD_CTS2__UART2_CTS,
137	MX35_PAD_RTS2__UART2_RTS,
138	MX35_PAD_TXD2__UART2_TXD_MUX,
139	MX35_PAD_RXD2__UART2_RXD_MUX,
140	/* I2S */
141	MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS,
142	MX35_PAD_STXD4__AUDMUX_AUD4_TXD,
143	MX35_PAD_SRXD4__AUDMUX_AUD4_RXD,
144	MX35_PAD_SCK4__AUDMUX_AUD4_TXC,
145	/* CAN2 */
146	MX35_PAD_TX5_RX0__CAN2_TXCAN,
147	MX35_PAD_TX4_RX1__CAN2_RXCAN,
148	/* SDCARD */
149	MX35_PAD_SD1_CMD__ESDHC1_CMD,
150	MX35_PAD_SD1_CLK__ESDHC1_CLK,
151	MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
152	MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
153	MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
154	MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
155	/* SD1 CD */
156	MX35_PAD_LD18__GPIO3_24,
157	/* SPI */
158	MX35_PAD_CSPI1_MOSI__CSPI1_MOSI,
159	MX35_PAD_CSPI1_MISO__CSPI1_MISO,
160	MX35_PAD_CSPI1_SS0__GPIO1_18,
161	MX35_PAD_CSPI1_SS1__GPIO1_19,
162	MX35_PAD_CSPI1_SCLK__CSPI1_SCLK,
163	MX35_PAD_CSPI1_SPI_RDY__GPIO3_5,
164};
165
166#define GPIO_LED1	IMX_GPIO_NR(3, 29)
167#define GPIO_SWITCH1	IMX_GPIO_NR(3, 25)
168#define GPIO_LCDPWR	IMX_GPIO_NR(1, 4)
169#define GPIO_SD1CD	IMX_GPIO_NR(3, 24)
170#define	GPIO_SPI1_SS0	IMX_GPIO_NR(1, 18)
171#define	GPIO_SPI1_SS1	IMX_GPIO_NR(1, 19)
172#define	GPIO_SPI1_IRQ	IMX_GPIO_NR(3, 5)
173
174static void eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data *pd,
175				   unsigned int power)
176{
177	if (power)
178		gpio_direction_output(GPIO_LCDPWR, 1);
179	else
180		gpio_direction_output(GPIO_LCDPWR, 0);
181}
182
183static struct plat_lcd_data eukrea_mbimxsd_lcd_power_data = {
184	.set_power		= eukrea_mbimxsd_lcd_power_set,
185};
186
187static struct platform_device eukrea_mbimxsd_lcd_powerdev = {
188	.name			= "platform-lcd",
189	.dev.platform_data	= &eukrea_mbimxsd_lcd_power_data,
190};
191
192static struct gpio_led eukrea_mbimxsd_leds[] = {
193	{
194		.name			= "led1",
195		.default_trigger	= "heartbeat",
196		.active_low		= 1,
197		.gpio			= GPIO_LED1,
198	},
199};
200
201static const struct gpio_led_platform_data
202		eukrea_mbimxsd_led_info __initconst = {
203	.leds		= eukrea_mbimxsd_leds,
204	.num_leds	= ARRAY_SIZE(eukrea_mbimxsd_leds),
205};
206
207static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = {
208	{
209		.gpio		= GPIO_SWITCH1,
210		.code		= BTN_0,
211		.desc		= "BP1",
212		.active_low	= 1,
213		.wakeup		= 1,
214	},
215};
216
217static const struct gpio_keys_platform_data
218		eukrea_mbimxsd_button_data __initconst = {
219	.buttons	= eukrea_mbimxsd_gpio_buttons,
220	.nbuttons	= ARRAY_SIZE(eukrea_mbimxsd_gpio_buttons),
221};
222
223static struct platform_device *platform_devices[] __initdata = {
224	&eukrea_mbimxsd_lcd_powerdev,
225};
226
227static const struct imxuart_platform_data uart_pdata __initconst = {
228	.flags = IMXUART_HAVE_RTSCTS,
229};
230
231static struct i2c_board_info eukrea_mbimxsd_i2c_devices[] = {
232	{
233		I2C_BOARD_INFO("tlv320aic23", 0x1a),
234	},
235};
236
237static const
238struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata __initconst = {
239	.flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE,
240};
241
242static struct esdhc_platform_data sd1_pdata = {
243	.cd_gpio = GPIO_SD1CD,
244	.cd_type = ESDHC_CD_GPIO,
245	.wp_type = ESDHC_WP_NONE,
246};
247
248static struct spi_board_info eukrea_mbimxsd35_spi_board_info[] __initdata = {
249	{
250		.modalias = "spidev",
251		.max_speed_hz = 20000000,
252		.bus_num = 0,
253		.chip_select = 0,
254		.mode = SPI_MODE_0,
255	},
256	{
257		.modalias = "spidev",
258		.max_speed_hz = 20000000,
259		.bus_num = 0,
260		.chip_select = 1,
261		.mode = SPI_MODE_0,
262	},
263};
264
265static int eukrea_mbimxsd35_spi_cs[] = {GPIO_SPI1_SS0, GPIO_SPI1_SS1};
266
267static const struct spi_imx_master eukrea_mbimxsd35_spi0_data __initconst = {
268	.chipselect     = eukrea_mbimxsd35_spi_cs,
269	.num_chipselect = ARRAY_SIZE(eukrea_mbimxsd35_spi_cs),
270};
271
272/*
273 * system init for baseboard usage. Will be called by cpuimx35 init.
274 *
275 * Add platform devices present on this baseboard and init
276 * them from CPU side as far as required to use them later on
277 */
278void __init eukrea_mbimxsd35_baseboard_init(void)
279{
280	if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads,
281			ARRAY_SIZE(eukrea_mbimxsd_pads)))
282		printk(KERN_ERR "error setting mbimxsd pads !\n");
283
284	imx35_add_imx_uart1(&uart_pdata);
285	imx35_add_ipu_core();
286	imx35_add_mx3_sdc_fb(&mx3fb_pdata);
287
288	imx35_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);
289
290	imx35_add_flexcan1();
291	imx35_add_sdhci_esdhc_imx(0, &sd1_pdata);
292
293	gpio_request(GPIO_LED1, "LED1");
294	gpio_direction_output(GPIO_LED1, 1);
295	gpio_free(GPIO_LED1);
296
297	gpio_request(GPIO_SWITCH1, "SWITCH1");
298	gpio_direction_input(GPIO_SWITCH1);
299	gpio_free(GPIO_SWITCH1);
300
301	gpio_request(GPIO_LCDPWR, "LCDPWR");
302	gpio_direction_output(GPIO_LCDPWR, 1);
303
304	i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,
305				ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
306
307	gpio_request(GPIO_SPI1_IRQ, "SPI1_IRQ");
308	gpio_direction_input(GPIO_SPI1_IRQ);
309	gpio_free(GPIO_SPI1_IRQ);
310	imx35_add_spi_imx0(&eukrea_mbimxsd35_spi0_data);
311	spi_register_board_info(eukrea_mbimxsd35_spi_board_info,
312		ARRAY_SIZE(eukrea_mbimxsd35_spi_board_info));
313
314	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
315	gpio_led_register_device(-1, &eukrea_mbimxsd_led_info);
316	imx_add_gpio_keys(&eukrea_mbimxsd_button_data);
317	imx_add_platform_device("eukrea_tlv320", 0, NULL, 0, NULL, 0);
318}
319