1/*
2 * OMAP2+ Clock Management prototypes
3 *
4 * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc.
5 * Copyright (C) 2007-2009 Nokia Corporation
6 *
7 * Written by Paul Walmsley
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13#ifndef __ARCH_ASM_MACH_OMAP2_CM_H
14#define __ARCH_ASM_MACH_OMAP2_CM_H
15
16/*
17 * MAX_MODULE_READY_TIME: max duration in microseconds to wait for the
18 * PRCM to request that a module exit the inactive state in the case of
19 * OMAP2 & 3.
20 * In the case of OMAP4 this is the max duration in microseconds for the
21 * module to reach the functionnal state from an inactive state.
22 */
23#define MAX_MODULE_READY_TIME		2000
24
25# ifndef __ASSEMBLER__
26extern void __iomem *cm_base;
27extern void __iomem *cm2_base;
28extern void omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2);
29# endif
30
31/*
32 * MAX_MODULE_DISABLE_TIME: max duration in microseconds to wait for
33 * the PRCM to request that a module enter the inactive state in the
34 * case of OMAP2 & 3.  In the case of OMAP4 this is the max duration
35 * in microseconds for the module to reach the inactive state from
36 * a functional state.
37 * XXX FSUSB on OMAP4430 takes ~4ms to idle after reset during
38 * kernel init.
39 */
40#define MAX_MODULE_DISABLE_TIME		5000
41
42# ifndef __ASSEMBLER__
43
44/**
45 * struct cm_ll_data - fn ptrs to per-SoC CM function implementations
46 * @split_idlest_reg: ptr to the SoC CM-specific split_idlest_reg impl
47 * @wait_module_ready: ptr to the SoC CM-specific wait_module_ready impl
48 * @wait_module_idle: ptr to the SoC CM-specific wait_module_idle impl
49 * @module_enable: ptr to the SoC CM-specific module_enable impl
50 * @module_disable: ptr to the SoC CM-specific module_disable impl
51 */
52struct cm_ll_data {
53	int (*split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst,
54				u8 *idlest_reg_id);
55	int (*wait_module_ready)(u8 part, s16 prcm_mod, u16 idlest_reg,
56				 u8 idlest_shift);
57	int (*wait_module_idle)(u8 part, s16 prcm_mod, u16 idlest_reg,
58				u8 idlest_shift);
59	void (*module_enable)(u8 mode, u8 part, u16 inst, u16 clkctrl_offs);
60	void (*module_disable)(u8 part, u16 inst, u16 clkctrl_offs);
61};
62
63extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
64			       u8 *idlest_reg_id);
65int omap_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
66			      u8 idlest_shift);
67int omap_cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg,
68			     u8 idlest_shift);
69int omap_cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs);
70int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs);
71extern int cm_register(struct cm_ll_data *cld);
72extern int cm_unregister(struct cm_ll_data *cld);
73int omap_cm_init(void);
74int omap2_cm_base_init(void);
75
76# endif
77
78#endif
79