1/*
2 * OMAP2+ common Clock Management (CM) IP block functions
3 *
4 * Copyright (C) 2012 Texas Instruments, Inc.
5 * Paul Walmsley
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * XXX This code should eventually be moved to a CM driver.
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/errno.h>
17#include <linux/bug.h>
18#include <linux/of.h>
19#include <linux/of_address.h>
20
21#include "cm2xxx.h"
22#include "cm3xxx.h"
23#include "cm33xx.h"
24#include "cm44xx.h"
25#include "clock.h"
26
27/*
28 * cm_ll_data: function pointers to SoC-specific implementations of
29 * common CM functions
30 */
31static struct cm_ll_data null_cm_ll_data;
32static struct cm_ll_data *cm_ll_data = &null_cm_ll_data;
33
34/* cm_base: base virtual address of the CM IP block */
35void __iomem *cm_base;
36
37/* cm2_base: base virtual address of the CM2 IP block (OMAP44xx only) */
38void __iomem *cm2_base;
39
40#define CM_NO_CLOCKS		0x1
41#define CM_SINGLE_INSTANCE	0x2
42
43/**
44 * omap2_set_globals_cm - set the CM/CM2 base addresses (for early use)
45 * @cm: CM base virtual address
46 * @cm2: CM2 base virtual address (if present on the booted SoC)
47 *
48 * XXX Will be replaced when the PRM/CM drivers are completed.
49 */
50void __init omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2)
51{
52	cm_base = cm;
53	cm2_base = cm2;
54}
55
56/**
57 * cm_split_idlest_reg - split CM_IDLEST reg addr into its components
58 * @idlest_reg: CM_IDLEST* virtual address
59 * @prcm_inst: pointer to an s16 to return the PRCM instance offset
60 * @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID
61 *
62 * Given an absolute CM_IDLEST register address @idlest_reg, passes
63 * the PRCM instance offset and IDLEST register ID back to the caller
64 * via the @prcm_inst and @idlest_reg_id.  Returns -EINVAL upon error,
65 * or 0 upon success.  XXX This function is only needed until absolute
66 * register addresses are removed from the OMAP struct clk records.
67 */
68int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
69			u8 *idlest_reg_id)
70{
71	if (!cm_ll_data->split_idlest_reg) {
72		WARN_ONCE(1, "cm: %s: no low-level function defined\n",
73			  __func__);
74		return -EINVAL;
75	}
76
77	return cm_ll_data->split_idlest_reg(idlest_reg, prcm_inst,
78					   idlest_reg_id);
79}
80
81/**
82 * omap_cm_wait_module_ready - wait for a module to leave idle or standby
83 * @part: PRCM partition
84 * @prcm_mod: PRCM module offset
85 * @idlest_reg: CM_IDLESTx register
86 * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
87 *
88 * Wait for the PRCM to indicate that the module identified by
89 * (@prcm_mod, @idlest_id, @idlest_shift) is clocked.  Return 0 upon
90 * success, -EBUSY if the module doesn't enable in time, or -EINVAL if
91 * no per-SoC wait_module_ready() function pointer has been registered
92 * or if the idlest register is unknown on the SoC.
93 */
94int omap_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
95			      u8 idlest_shift)
96{
97	if (!cm_ll_data->wait_module_ready) {
98		WARN_ONCE(1, "cm: %s: no low-level function defined\n",
99			  __func__);
100		return -EINVAL;
101	}
102
103	return cm_ll_data->wait_module_ready(part, prcm_mod, idlest_reg,
104					     idlest_shift);
105}
106
107/**
108 * omap_cm_wait_module_idle - wait for a module to enter idle or standby
109 * @part: PRCM partition
110 * @prcm_mod: PRCM module offset
111 * @idlest_reg: CM_IDLESTx register
112 * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
113 *
114 * Wait for the PRCM to indicate that the module identified by
115 * (@prcm_mod, @idlest_id, @idlest_shift) is no longer clocked.  Return
116 * 0 upon success, -EBUSY if the module doesn't enable in time, or
117 * -EINVAL if no per-SoC wait_module_idle() function pointer has been
118 * registered or if the idlest register is unknown on the SoC.
119 */
120int omap_cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg,
121			     u8 idlest_shift)
122{
123	if (!cm_ll_data->wait_module_idle) {
124		WARN_ONCE(1, "cm: %s: no low-level function defined\n",
125			  __func__);
126		return -EINVAL;
127	}
128
129	return cm_ll_data->wait_module_idle(part, prcm_mod, idlest_reg,
130					    idlest_shift);
131}
132
133/**
134 * omap_cm_module_enable - enable a module
135 * @mode: target mode for the module
136 * @part: PRCM partition
137 * @inst: PRCM instance
138 * @clkctrl_offs: CM_CLKCTRL register offset for the module
139 *
140 * Enables clocks for a module identified by (@part, @inst, @clkctrl_offs)
141 * making its IO space accessible. Return 0 upon success, -EINVAL if no
142 * per-SoC module_enable() function pointer has been registered.
143 */
144int omap_cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs)
145{
146	if (!cm_ll_data->module_enable) {
147		WARN_ONCE(1, "cm: %s: no low-level function defined\n",
148			  __func__);
149		return -EINVAL;
150	}
151
152	cm_ll_data->module_enable(mode, part, inst, clkctrl_offs);
153	return 0;
154}
155
156/**
157 * omap_cm_module_disable - disable a module
158 * @part: PRCM partition
159 * @inst: PRCM instance
160 * @clkctrl_offs: CM_CLKCTRL register offset for the module
161 *
162 * Disables clocks for a module identified by (@part, @inst, @clkctrl_offs)
163 * makings its IO space inaccessible. Return 0 upon success, -EINVAL if
164 * no per-SoC module_disable() function pointer has been registered.
165 */
166int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs)
167{
168	if (!cm_ll_data->module_disable) {
169		WARN_ONCE(1, "cm: %s: no low-level function defined\n",
170			  __func__);
171		return -EINVAL;
172	}
173
174	cm_ll_data->module_disable(part, inst, clkctrl_offs);
175	return 0;
176}
177
178/**
179 * cm_register - register per-SoC low-level data with the CM
180 * @cld: low-level per-SoC OMAP CM data & function pointers to register
181 *
182 * Register per-SoC low-level OMAP CM data and function pointers with
183 * the OMAP CM common interface.  The caller must keep the data
184 * pointed to by @cld valid until it calls cm_unregister() and
185 * it returns successfully.  Returns 0 upon success, -EINVAL if @cld
186 * is NULL, or -EEXIST if cm_register() has already been called
187 * without an intervening cm_unregister().
188 */
189int cm_register(struct cm_ll_data *cld)
190{
191	if (!cld)
192		return -EINVAL;
193
194	if (cm_ll_data != &null_cm_ll_data)
195		return -EEXIST;
196
197	cm_ll_data = cld;
198
199	return 0;
200}
201
202/**
203 * cm_unregister - unregister per-SoC low-level data & function pointers
204 * @cld: low-level per-SoC OMAP CM data & function pointers to unregister
205 *
206 * Unregister per-SoC low-level OMAP CM data and function pointers
207 * that were previously registered with cm_register().  The
208 * caller may not destroy any of the data pointed to by @cld until
209 * this function returns successfully.  Returns 0 upon success, or
210 * -EINVAL if @cld is NULL or if @cld does not match the struct
211 * cm_ll_data * previously registered by cm_register().
212 */
213int cm_unregister(struct cm_ll_data *cld)
214{
215	if (!cld || cm_ll_data != cld)
216		return -EINVAL;
217
218	cm_ll_data = &null_cm_ll_data;
219
220	return 0;
221}
222
223#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
224	defined(CONFIG_SOC_DRA7XX)
225static struct omap_prcm_init_data cm_data __initdata = {
226	.index = TI_CLKM_CM,
227	.init = omap4_cm_init,
228};
229
230static struct omap_prcm_init_data cm2_data __initdata = {
231	.index = TI_CLKM_CM2,
232	.init = omap4_cm_init,
233};
234#endif
235
236#ifdef CONFIG_ARCH_OMAP2
237static struct omap_prcm_init_data omap2_prcm_data __initdata = {
238	.index = TI_CLKM_CM,
239	.init = omap2xxx_cm_init,
240	.flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE,
241};
242#endif
243
244#ifdef CONFIG_ARCH_OMAP3
245static struct omap_prcm_init_data omap3_cm_data __initdata = {
246	.index = TI_CLKM_CM,
247	.init = omap3xxx_cm_init,
248	.flags = CM_SINGLE_INSTANCE,
249
250	/*
251	 * IVA2 offset is a negative value, must offset the cm_base address
252	 * by this to get it to positive side on the iomap
253	 */
254	.offset = -OMAP3430_IVA2_MOD,
255};
256#endif
257
258#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_TI81XX)
259static struct omap_prcm_init_data am3_prcm_data __initdata = {
260	.index = TI_CLKM_CM,
261	.flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE,
262	.init = am33xx_cm_init,
263};
264#endif
265
266#ifdef CONFIG_SOC_AM43XX
267static struct omap_prcm_init_data am4_prcm_data __initdata = {
268	.index = TI_CLKM_CM,
269	.flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE,
270	.init = omap4_cm_init,
271};
272#endif
273
274static const struct of_device_id omap_cm_dt_match_table[] __initconst = {
275#ifdef CONFIG_ARCH_OMAP2
276	{ .compatible = "ti,omap2-prcm", .data = &omap2_prcm_data },
277#endif
278#ifdef CONFIG_ARCH_OMAP3
279	{ .compatible = "ti,omap3-cm", .data = &omap3_cm_data },
280#endif
281#ifdef CONFIG_ARCH_OMAP4
282	{ .compatible = "ti,omap4-cm1", .data = &cm_data },
283	{ .compatible = "ti,omap4-cm2", .data = &cm2_data },
284#endif
285#ifdef CONFIG_SOC_OMAP5
286	{ .compatible = "ti,omap5-cm-core-aon", .data = &cm_data },
287	{ .compatible = "ti,omap5-cm-core", .data = &cm2_data },
288#endif
289#ifdef CONFIG_SOC_DRA7XX
290	{ .compatible = "ti,dra7-cm-core-aon", .data = &cm_data },
291	{ .compatible = "ti,dra7-cm-core", .data = &cm2_data },
292#endif
293#ifdef CONFIG_SOC_AM33XX
294	{ .compatible = "ti,am3-prcm", .data = &am3_prcm_data },
295#endif
296#ifdef CONFIG_SOC_AM43XX
297	{ .compatible = "ti,am4-prcm", .data = &am4_prcm_data },
298#endif
299#ifdef CONFIG_SOC_TI81XX
300	{ .compatible = "ti,dm814-prcm", .data = &am3_prcm_data },
301	{ .compatible = "ti,dm816-prcm", .data = &am3_prcm_data },
302#endif
303	{ }
304};
305
306/**
307 * omap2_cm_base_init - initialize iomappings for the CM drivers
308 *
309 * Detects and initializes the iomappings for the CM driver, based
310 * on the DT data. Returns 0 in success, negative error value
311 * otherwise.
312 */
313int __init omap2_cm_base_init(void)
314{
315	struct device_node *np;
316	const struct of_device_id *match;
317	struct omap_prcm_init_data *data;
318	void __iomem *mem;
319
320	for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) {
321		data = (struct omap_prcm_init_data *)match->data;
322
323		mem = of_iomap(np, 0);
324		if (!mem)
325			return -ENOMEM;
326
327		if (data->index == TI_CLKM_CM)
328			cm_base = mem + data->offset;
329
330		if (data->index == TI_CLKM_CM2)
331			cm2_base = mem + data->offset;
332
333		data->mem = mem;
334
335		data->np = np;
336
337		if (data->init && (data->flags & CM_SINGLE_INSTANCE ||
338				   (cm_base && cm2_base)))
339			data->init(data);
340	}
341
342	return 0;
343}
344
345/**
346 * omap_cm_init - low level init for the CM drivers
347 *
348 * Initializes the low level clock infrastructure for CM drivers.
349 * Returns 0 in success, negative error value in failure.
350 */
351int __init omap_cm_init(void)
352{
353	struct device_node *np;
354	const struct of_device_id *match;
355	const struct omap_prcm_init_data *data;
356	int ret;
357
358	for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) {
359		data = match->data;
360
361		if (data->flags & CM_NO_CLOCKS)
362			continue;
363
364		ret = omap2_clk_provider_init(np, data->index, NULL, data->mem);
365		if (ret)
366			return ret;
367	}
368
369	return 0;
370}
371