1/* linux/arch/arm/mach-s3c2440/mach-rx3715.c
2 *
3 * Copyright (c) 2003-2004 Simtec Electronics
4 *	Ben Dooks <ben@simtec.co.uk>
5 *
6 * http://www.handhelds.org/projects/rx3715.html
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/interrupt.h>
17#include <linux/list.h>
18#include <linux/memblock.h>
19#include <linux/timer.h>
20#include <linux/init.h>
21#include <linux/tty.h>
22#include <linux/console.h>
23#include <linux/device.h>
24#include <linux/platform_device.h>
25#include <linux/serial_core.h>
26#include <linux/serial_s3c.h>
27#include <linux/serial.h>
28#include <linux/io.h>
29#include <linux/mtd/mtd.h>
30#include <linux/mtd/nand.h>
31#include <linux/mtd/nand_ecc.h>
32#include <linux/mtd/partitions.h>
33
34#include <asm/mach/arch.h>
35#include <asm/mach/irq.h>
36#include <asm/mach/map.h>
37
38#include <linux/platform_data/mtd-nand-s3c2410.h>
39
40#include <asm/irq.h>
41#include <asm/mach-types.h>
42
43#include <mach/fb.h>
44#include <mach/hardware.h>
45#include <mach/regs-gpio.h>
46#include <mach/regs-lcd.h>
47#include <mach/gpio-samsung.h>
48
49#include <plat/cpu.h>
50#include <plat/devs.h>
51#include <plat/pm.h>
52#include <plat/samsung-time.h>
53
54#include "common.h"
55#include "h1940.h"
56
57static struct map_desc rx3715_iodesc[] __initdata = {
58	/* dump ISA space somewhere unused */
59
60	{
61		.virtual	= (u32)S3C24XX_VA_ISA_WORD,
62		.pfn		= __phys_to_pfn(S3C2410_CS3),
63		.length		= SZ_1M,
64		.type		= MT_DEVICE,
65	}, {
66		.virtual	= (u32)S3C24XX_VA_ISA_BYTE,
67		.pfn		= __phys_to_pfn(S3C2410_CS3),
68		.length		= SZ_1M,
69		.type		= MT_DEVICE,
70	},
71};
72
73static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
74	[0] = {
75		.hwport	     = 0,
76		.flags	     = 0,
77		.ucon	     = 0x3c5,
78		.ulcon	     = 0x03,
79		.ufcon	     = 0x51,
80		.clk_sel	= S3C2410_UCON_CLKSEL3,
81	},
82	[1] = {
83		.hwport	     = 1,
84		.flags	     = 0,
85		.ucon	     = 0x3c5,
86		.ulcon	     = 0x03,
87		.ufcon	     = 0x00,
88		.clk_sel	= S3C2410_UCON_CLKSEL3,
89	},
90	/* IR port */
91	[2] = {
92		.hwport	     = 2,
93		.uart_flags  = UPF_CONS_FLOW,
94		.ucon	     = 0x3c5,
95		.ulcon	     = 0x43,
96		.ufcon	     = 0x51,
97		.clk_sel	= S3C2410_UCON_CLKSEL3,
98	}
99};
100
101/* framebuffer lcd controller information */
102
103static struct s3c2410fb_display rx3715_lcdcfg __initdata = {
104	.lcdcon5 =	S3C2410_LCDCON5_INVVLINE |
105			S3C2410_LCDCON5_FRM565 |
106			S3C2410_LCDCON5_HWSWP,
107
108	.type		= S3C2410_LCDCON1_TFT,
109	.width		= 240,
110	.height		= 320,
111
112	.pixclock	= 260000,
113	.xres		= 240,
114	.yres		= 320,
115	.bpp		= 16,
116	.left_margin	= 36,
117	.right_margin	= 36,
118	.hsync_len	= 8,
119	.upper_margin	= 6,
120	.lower_margin	= 7,
121	.vsync_len	= 3,
122};
123
124static struct s3c2410fb_mach_info rx3715_fb_info __initdata = {
125
126	.displays =	&rx3715_lcdcfg,
127	.num_displays =	1,
128	.default_display = 0,
129
130	.lpcsel =	0xf82,
131
132	.gpccon =	0xaa955699,
133	.gpccon_mask =	0xffc003cc,
134	.gpcup =	0x0000ffff,
135	.gpcup_mask =	0xffffffff,
136
137	.gpdcon =	0xaa95aaa1,
138	.gpdcon_mask =	0xffc0fff0,
139	.gpdup =	0x0000faff,
140	.gpdup_mask =	0xffffffff,
141};
142
143static struct mtd_partition __initdata rx3715_nand_part[] = {
144	[0] = {
145		.name		= "Whole Flash",
146		.offset		= 0,
147		.size		= MTDPART_SIZ_FULL,
148		.mask_flags	= MTD_WRITEABLE,
149	}
150};
151
152static struct s3c2410_nand_set __initdata rx3715_nand_sets[] = {
153	[0] = {
154		.name		= "Internal",
155		.nr_chips	= 1,
156		.nr_partitions	= ARRAY_SIZE(rx3715_nand_part),
157		.partitions	= rx3715_nand_part,
158	},
159};
160
161static struct s3c2410_platform_nand __initdata rx3715_nand_info = {
162	.tacls		= 25,
163	.twrph0		= 50,
164	.twrph1		= 15,
165	.nr_sets	= ARRAY_SIZE(rx3715_nand_sets),
166	.sets		= rx3715_nand_sets,
167};
168
169static struct platform_device *rx3715_devices[] __initdata = {
170	&s3c_device_ohci,
171	&s3c_device_lcd,
172	&s3c_device_wdt,
173	&s3c_device_i2c0,
174	&s3c_device_iis,
175	&s3c_device_nand,
176};
177
178static void __init rx3715_map_io(void)
179{
180	s3c24xx_init_io(rx3715_iodesc, ARRAY_SIZE(rx3715_iodesc));
181	s3c24xx_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs));
182	samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
183}
184
185static void __init rx3715_init_time(void)
186{
187	s3c2440_init_clocks(16934000);
188	samsung_timer_init();
189}
190
191/* H1940 and RX3715 need to reserve this for suspend */
192static void __init rx3715_reserve(void)
193{
194	memblock_reserve(0x30003000, 0x1000);
195	memblock_reserve(0x30081000, 0x1000);
196}
197
198static void __init rx3715_init_machine(void)
199{
200#ifdef CONFIG_PM_H1940
201	memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024);
202#endif
203	s3c_pm_init();
204
205	s3c_nand_set_platdata(&rx3715_nand_info);
206	s3c24xx_fb_set_platdata(&rx3715_fb_info);
207	platform_add_devices(rx3715_devices, ARRAY_SIZE(rx3715_devices));
208}
209
210MACHINE_START(RX3715, "IPAQ-RX3715")
211	/* Maintainer: Ben Dooks <ben-linux@fluff.org> */
212	.atag_offset	= 0x100,
213	.map_io		= rx3715_map_io,
214	.reserve	= rx3715_reserve,
215	.init_irq	= s3c2440_init_irq,
216	.init_machine	= rx3715_init_machine,
217	.init_time	= rx3715_init_time,
218MACHINE_END
219