1/*
2 * Based on arch/arm/kernel/process.c
3 *
4 * Original Copyright (C) 1995  Linus Torvalds
5 * Copyright (C) 1996-2000 Russell King - Converted to ARM.
6 * Copyright (C) 2012 ARM Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#include <stdarg.h>
22
23#include <linux/compat.h>
24#include <linux/efi.h>
25#include <linux/export.h>
26#include <linux/sched.h>
27#include <linux/kernel.h>
28#include <linux/mm.h>
29#include <linux/stddef.h>
30#include <linux/unistd.h>
31#include <linux/user.h>
32#include <linux/delay.h>
33#include <linux/reboot.h>
34#include <linux/interrupt.h>
35#include <linux/kallsyms.h>
36#include <linux/init.h>
37#include <linux/cpu.h>
38#include <linux/elfcore.h>
39#include <linux/pm.h>
40#include <linux/tick.h>
41#include <linux/utsname.h>
42#include <linux/uaccess.h>
43#include <linux/random.h>
44#include <linux/hw_breakpoint.h>
45#include <linux/personality.h>
46#include <linux/notifier.h>
47
48#include <asm/compat.h>
49#include <asm/cacheflush.h>
50#include <asm/fpsimd.h>
51#include <asm/mmu_context.h>
52#include <asm/processor.h>
53#include <asm/stacktrace.h>
54
55#ifdef CONFIG_CC_STACKPROTECTOR
56#include <linux/stackprotector.h>
57unsigned long __stack_chk_guard __read_mostly;
58EXPORT_SYMBOL(__stack_chk_guard);
59#endif
60
61void soft_restart(unsigned long addr)
62{
63	setup_mm_for_reboot();
64	cpu_soft_restart(virt_to_phys(cpu_reset), addr);
65	/* Should never get here */
66	BUG();
67}
68
69/*
70 * Function pointers to optional machine specific functions
71 */
72void (*pm_power_off)(void);
73EXPORT_SYMBOL_GPL(pm_power_off);
74
75void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
76
77/*
78 * This is our default idle handler.
79 */
80void arch_cpu_idle(void)
81{
82	/*
83	 * This should do all the clock switching and wait for interrupt
84	 * tricks
85	 */
86	cpu_do_idle();
87	local_irq_enable();
88}
89
90#ifdef CONFIG_HOTPLUG_CPU
91void arch_cpu_idle_dead(void)
92{
93       cpu_die();
94}
95#endif
96
97/*
98 * Called by kexec, immediately prior to machine_kexec().
99 *
100 * This must completely disable all secondary CPUs; simply causing those CPUs
101 * to execute e.g. a RAM-based pin loop is not sufficient. This allows the
102 * kexec'd kernel to use any and all RAM as it sees fit, without having to
103 * avoid any code or data used by any SW CPU pin loop. The CPU hotplug
104 * functionality embodied in disable_nonboot_cpus() to achieve this.
105 */
106void machine_shutdown(void)
107{
108	disable_nonboot_cpus();
109}
110
111/*
112 * Halting simply requires that the secondary CPUs stop performing any
113 * activity (executing tasks, handling interrupts). smp_send_stop()
114 * achieves this.
115 */
116void machine_halt(void)
117{
118	local_irq_disable();
119	smp_send_stop();
120	while (1);
121}
122
123/*
124 * Power-off simply requires that the secondary CPUs stop performing any
125 * activity (executing tasks, handling interrupts). smp_send_stop()
126 * achieves this. When the system power is turned off, it will take all CPUs
127 * with it.
128 */
129void machine_power_off(void)
130{
131	local_irq_disable();
132	smp_send_stop();
133	if (pm_power_off)
134		pm_power_off();
135}
136
137/*
138 * Restart requires that the secondary CPUs stop performing any activity
139 * while the primary CPU resets the system. Systems with a single CPU can
140 * use soft_restart() as their machine descriptor's .restart hook, since that
141 * will cause the only available CPU to reset. Systems with multiple CPUs must
142 * provide a HW restart implementation, to ensure that all CPUs reset at once.
143 * This is required so that any code running after reset on the primary CPU
144 * doesn't have to co-ordinate with other CPUs to ensure they aren't still
145 * executing pre-reset code, and using RAM that the primary CPU's code wishes
146 * to use. Implementing such co-ordination would be essentially impossible.
147 */
148void machine_restart(char *cmd)
149{
150	/* Disable interrupts first */
151	local_irq_disable();
152	smp_send_stop();
153
154	/*
155	 * UpdateCapsule() depends on the system being reset via
156	 * ResetSystem().
157	 */
158	if (efi_enabled(EFI_RUNTIME_SERVICES))
159		efi_reboot(reboot_mode, NULL);
160
161	/* Now call the architecture specific reboot code. */
162	if (arm_pm_restart)
163		arm_pm_restart(reboot_mode, cmd);
164	else
165		do_kernel_restart(cmd);
166
167	/*
168	 * Whoops - the architecture was unable to reboot.
169	 */
170	printk("Reboot failed -- System halted\n");
171	while (1);
172}
173
174void __show_regs(struct pt_regs *regs)
175{
176	int i, top_reg;
177	u64 lr, sp;
178
179	if (compat_user_mode(regs)) {
180		lr = regs->compat_lr;
181		sp = regs->compat_sp;
182		top_reg = 12;
183	} else {
184		lr = regs->regs[30];
185		sp = regs->sp;
186		top_reg = 29;
187	}
188
189	show_regs_print_info(KERN_DEFAULT);
190	print_symbol("PC is at %s\n", instruction_pointer(regs));
191	print_symbol("LR is at %s\n", lr);
192	printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n",
193	       regs->pc, lr, regs->pstate);
194	printk("sp : %016llx\n", sp);
195	for (i = top_reg; i >= 0; i--) {
196		printk("x%-2d: %016llx ", i, regs->regs[i]);
197		if (i % 2 == 0)
198			printk("\n");
199	}
200	printk("\n");
201}
202
203void show_regs(struct pt_regs * regs)
204{
205	printk("\n");
206	__show_regs(regs);
207}
208
209/*
210 * Free current thread data structures etc..
211 */
212void exit_thread(void)
213{
214}
215
216static void tls_thread_flush(void)
217{
218	asm ("msr tpidr_el0, xzr");
219
220	if (is_compat_task()) {
221		current->thread.tp_value = 0;
222
223		/*
224		 * We need to ensure ordering between the shadow state and the
225		 * hardware state, so that we don't corrupt the hardware state
226		 * with a stale shadow state during context switch.
227		 */
228		barrier();
229		asm ("msr tpidrro_el0, xzr");
230	}
231}
232
233void flush_thread(void)
234{
235	fpsimd_flush_thread();
236	tls_thread_flush();
237	flush_ptrace_hw_breakpoint(current);
238}
239
240void release_thread(struct task_struct *dead_task)
241{
242}
243
244int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
245{
246	fpsimd_preserve_current_state();
247	*dst = *src;
248	return 0;
249}
250
251asmlinkage void ret_from_fork(void) asm("ret_from_fork");
252
253int copy_thread(unsigned long clone_flags, unsigned long stack_start,
254		unsigned long stk_sz, struct task_struct *p)
255{
256	struct pt_regs *childregs = task_pt_regs(p);
257	unsigned long tls = p->thread.tp_value;
258
259	memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context));
260
261	if (likely(!(p->flags & PF_KTHREAD))) {
262		*childregs = *current_pt_regs();
263		childregs->regs[0] = 0;
264		if (is_compat_thread(task_thread_info(p))) {
265			if (stack_start)
266				childregs->compat_sp = stack_start;
267		} else {
268			/*
269			 * Read the current TLS pointer from tpidr_el0 as it may be
270			 * out-of-sync with the saved value.
271			 */
272			asm("mrs %0, tpidr_el0" : "=r" (tls));
273			if (stack_start) {
274				/* 16-byte aligned stack mandatory on AArch64 */
275				if (stack_start & 15)
276					return -EINVAL;
277				childregs->sp = stack_start;
278			}
279		}
280		/*
281		 * If a TLS pointer was passed to clone (4th argument), use it
282		 * for the new thread.
283		 */
284		if (clone_flags & CLONE_SETTLS)
285			tls = childregs->regs[3];
286	} else {
287		memset(childregs, 0, sizeof(struct pt_regs));
288		childregs->pstate = PSR_MODE_EL1h;
289		p->thread.cpu_context.x19 = stack_start;
290		p->thread.cpu_context.x20 = stk_sz;
291	}
292	p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
293	p->thread.cpu_context.sp = (unsigned long)childregs;
294	p->thread.tp_value = tls;
295
296	ptrace_hw_copy_thread(p);
297
298	return 0;
299}
300
301static void tls_thread_switch(struct task_struct *next)
302{
303	unsigned long tpidr, tpidrro;
304
305	if (!is_compat_task()) {
306		asm("mrs %0, tpidr_el0" : "=r" (tpidr));
307		current->thread.tp_value = tpidr;
308	}
309
310	if (is_compat_thread(task_thread_info(next))) {
311		tpidr = 0;
312		tpidrro = next->thread.tp_value;
313	} else {
314		tpidr = next->thread.tp_value;
315		tpidrro = 0;
316	}
317
318	asm(
319	"	msr	tpidr_el0, %0\n"
320	"	msr	tpidrro_el0, %1"
321	: : "r" (tpidr), "r" (tpidrro));
322}
323
324/*
325 * Thread switching.
326 */
327struct task_struct *__switch_to(struct task_struct *prev,
328				struct task_struct *next)
329{
330	struct task_struct *last;
331
332	fpsimd_thread_switch(next);
333	tls_thread_switch(next);
334	hw_breakpoint_thread_switch(next);
335	contextidr_thread_switch(next);
336
337	/*
338	 * Complete any pending TLB or cache maintenance on this CPU in case
339	 * the thread migrates to a different CPU.
340	 */
341	dsb(ish);
342
343	/* the actual thread switch */
344	last = cpu_switch_to(prev, next);
345
346	return last;
347}
348
349unsigned long get_wchan(struct task_struct *p)
350{
351	struct stackframe frame;
352	unsigned long stack_page;
353	int count = 0;
354	if (!p || p == current || p->state == TASK_RUNNING)
355		return 0;
356
357	frame.fp = thread_saved_fp(p);
358	frame.sp = thread_saved_sp(p);
359	frame.pc = thread_saved_pc(p);
360	stack_page = (unsigned long)task_stack_page(p);
361	do {
362		if (frame.sp < stack_page ||
363		    frame.sp >= stack_page + THREAD_SIZE ||
364		    unwind_frame(&frame))
365			return 0;
366		if (!in_sched_functions(frame.pc))
367			return frame.pc;
368	} while (count ++ < 16);
369	return 0;
370}
371
372unsigned long arch_align_stack(unsigned long sp)
373{
374	if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
375		sp -= get_random_int() & ~PAGE_MASK;
376	return sp & ~0xf;
377}
378
379static unsigned long randomize_base(unsigned long base)
380{
381	unsigned long range_end = base + (STACK_RND_MASK << PAGE_SHIFT) + 1;
382	return randomize_range(base, range_end, 0) ? : base;
383}
384
385unsigned long arch_randomize_brk(struct mm_struct *mm)
386{
387	return randomize_base(mm->brk);
388}
389