1/*
2 *  linux/arch/m32r/platforms/m32104ut/setup.c
3 *
4 *  Setup routines for M32104UT Board
5 *
6 *  Copyright (c) 2002-2005  Hiroyuki Kondo, Hirokazu Takata,
7 *                           Hitoshi Yamamoto, Mamoru Sakugawa,
8 *                           Naoto Sugai, Hayato Fujiwara
9 */
10
11#include <linux/irq.h>
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/device.h>
15
16#include <asm/m32r.h>
17#include <asm/io.h>
18
19#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
20
21icu_data_t icu_data[NR_IRQS];
22
23static void disable_m32104ut_irq(unsigned int irq)
24{
25	unsigned long port, data;
26
27	port = irq2port(irq);
28	data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
29	outl(data, port);
30}
31
32static void enable_m32104ut_irq(unsigned int irq)
33{
34	unsigned long port, data;
35
36	port = irq2port(irq);
37	data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
38	outl(data, port);
39}
40
41static void mask_m32104ut_irq(struct irq_data *data)
42{
43	disable_m32104ut_irq(data->irq);
44}
45
46static void unmask_m32104ut_irq(struct irq_data *data)
47{
48	enable_m32104ut_irq(data->irq);
49}
50
51static void shutdown_m32104ut_irq(struct irq_data *data)
52{
53	unsigned int irq = data->irq;
54	unsigned long port = irq2port(irq);
55
56	outl(M32R_ICUCR_ILEVEL7, port);
57}
58
59static struct irq_chip m32104ut_irq_type =
60{
61	.name		= "M32104UT-IRQ",
62	.irq_shutdown	= shutdown_m32104ut_irq,
63	.irq_unmask	= unmask_m32104ut_irq,
64	.irq_mask	= mask_m32104ut_irq,
65};
66
67void __init init_IRQ(void)
68{
69	static int once = 0;
70
71	if (once)
72		return;
73	else
74		once++;
75
76#if defined(CONFIG_SMC91X)
77	/* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/
78	irq_set_chip_and_handler(M32R_IRQ_INT0, &m32104ut_irq_type,
79				 handle_level_irq);
80	/* "H" level sense */
81	cu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11;
82	disable_m32104ut_irq(M32R_IRQ_INT0);
83#endif  /* CONFIG_SMC91X */
84
85	/* MFT2 : system timer */
86	irq_set_chip_and_handler(M32R_IRQ_MFT2, &m32104ut_irq_type,
87				 handle_level_irq);
88	icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
89	disable_m32104ut_irq(M32R_IRQ_MFT2);
90
91#ifdef CONFIG_SERIAL_M32R_SIO
92	/* SIO0_R : uart receive data */
93	irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &m32104ut_irq_type,
94				 handle_level_irq);
95	icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN;
96	disable_m32104ut_irq(M32R_IRQ_SIO0_R);
97
98	/* SIO0_S : uart send data */
99	irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &m32104ut_irq_type,
100				 handle_level_irq);
101	icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN;
102	disable_m32104ut_irq(M32R_IRQ_SIO0_S);
103#endif /* CONFIG_SERIAL_M32R_SIO */
104}
105
106#if defined(CONFIG_SMC91X)
107
108#define LAN_IOSTART     0x300
109#define LAN_IOEND       0x320
110static struct resource smc91x_resources[] = {
111	[0] = {
112		.start  = (LAN_IOSTART),
113		.end    = (LAN_IOEND),
114		.flags  = IORESOURCE_MEM,
115	},
116	[1] = {
117		.start  = M32R_IRQ_INT0,
118		.end    = M32R_IRQ_INT0,
119		.flags  = IORESOURCE_IRQ,
120	}
121};
122
123static struct platform_device smc91x_device = {
124	.name		= "smc91x",
125	.id		= 0,
126	.num_resources  = ARRAY_SIZE(smc91x_resources),
127	.resource       = smc91x_resources,
128};
129#endif
130
131static int __init platform_init(void)
132{
133#if defined(CONFIG_SMC91X)
134	platform_device_register(&smc91x_device);
135#endif
136	return 0;
137}
138arch_initcall(platform_init);
139