1/* 2 * Copyright (C) 2014 Imagination Technologies 3 * Author: Paul Burton <paul.burton@imgtec.com> 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License as published by the 7 * Free Software Foundation; either version 2 of the License, or (at your 8 * option) any later version. 9 */ 10 11#include <linux/elf.h> 12#include <linux/sched.h> 13 14/* FPU modes */ 15enum { 16 FP_FRE, 17 FP_FR0, 18 FP_FR1, 19}; 20 21/** 22 * struct mode_req - ABI FPU mode requirements 23 * @single: The program being loaded needs an FPU but it will only issue 24 * single precision instructions meaning that it can execute in 25 * either FR0 or FR1. 26 * @soft: The soft(-float) requirement means that the program being 27 * loaded needs has no FPU dependency at all (i.e. it has no 28 * FPU instructions). 29 * @fr1: The program being loaded depends on FPU being in FR=1 mode. 30 * @frdefault: The program being loaded depends on the default FPU mode. 31 * That is FR0 for O32 and FR1 for N32/N64. 32 * @fre: The program being loaded depends on FPU with FRE=1. This mode is 33 * a bridge which uses FR=1 whilst still being able to maintain 34 * full compatibility with pre-existing code using the O32 FP32 35 * ABI. 36 * 37 * More information about the FP ABIs can be found here: 38 * 39 * https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking#10.4.1._Basic_mode_set-up 40 * 41 */ 42 43struct mode_req { 44 bool single; 45 bool soft; 46 bool fr1; 47 bool frdefault; 48 bool fre; 49}; 50 51static const struct mode_req fpu_reqs[] = { 52 [MIPS_ABI_FP_ANY] = { true, true, true, true, true }, 53 [MIPS_ABI_FP_DOUBLE] = { false, false, false, true, true }, 54 [MIPS_ABI_FP_SINGLE] = { true, false, false, false, false }, 55 [MIPS_ABI_FP_SOFT] = { false, true, false, false, false }, 56 [MIPS_ABI_FP_OLD_64] = { false, false, false, false, false }, 57 [MIPS_ABI_FP_XX] = { false, false, true, true, true }, 58 [MIPS_ABI_FP_64] = { false, false, true, false, false }, 59 [MIPS_ABI_FP_64A] = { false, false, true, false, true } 60}; 61 62/* 63 * Mode requirements when .MIPS.abiflags is not present in the ELF. 64 * Not present means that everything is acceptable except FR1. 65 */ 66static struct mode_req none_req = { true, true, false, true, true }; 67 68int arch_elf_pt_proc(void *_ehdr, void *_phdr, struct file *elf, 69 bool is_interp, struct arch_elf_state *state) 70{ 71 struct elf32_hdr *ehdr32 = _ehdr; 72 struct elf32_phdr *phdr32 = _phdr; 73 struct elf64_phdr *phdr64 = _phdr; 74 struct mips_elf_abiflags_v0 abiflags; 75 int ret; 76 77 /* Lets see if this is an O32 ELF */ 78 if (ehdr32->e_ident[EI_CLASS] == ELFCLASS32) { 79 if (ehdr32->e_flags & EF_MIPS_FP64) { 80 /* 81 * Set MIPS_ABI_FP_OLD_64 for EF_MIPS_FP64. We will override it 82 * later if needed 83 */ 84 if (is_interp) 85 state->interp_fp_abi = MIPS_ABI_FP_OLD_64; 86 else 87 state->fp_abi = MIPS_ABI_FP_OLD_64; 88 } 89 if (phdr32->p_type != PT_MIPS_ABIFLAGS) 90 return 0; 91 92 if (phdr32->p_filesz < sizeof(abiflags)) 93 return -EINVAL; 94 95 ret = kernel_read(elf, phdr32->p_offset, 96 (char *)&abiflags, 97 sizeof(abiflags)); 98 } else { 99 if (phdr64->p_type != PT_MIPS_ABIFLAGS) 100 return 0; 101 if (phdr64->p_filesz < sizeof(abiflags)) 102 return -EINVAL; 103 104 ret = kernel_read(elf, phdr64->p_offset, 105 (char *)&abiflags, 106 sizeof(abiflags)); 107 } 108 109 if (ret < 0) 110 return ret; 111 if (ret != sizeof(abiflags)) 112 return -EIO; 113 114 /* Record the required FP ABIs for use by mips_check_elf */ 115 if (is_interp) 116 state->interp_fp_abi = abiflags.fp_abi; 117 else 118 state->fp_abi = abiflags.fp_abi; 119 120 return 0; 121} 122 123int arch_check_elf(void *_ehdr, bool has_interpreter, 124 struct arch_elf_state *state) 125{ 126 struct elf32_hdr *ehdr = _ehdr; 127 struct mode_req prog_req, interp_req; 128 int fp_abi, interp_fp_abi, abi0, abi1, max_abi; 129 bool is_mips64; 130 131 if (!config_enabled(CONFIG_MIPS_O32_FP64_SUPPORT)) 132 return 0; 133 134 fp_abi = state->fp_abi; 135 136 if (has_interpreter) { 137 interp_fp_abi = state->interp_fp_abi; 138 139 abi0 = min(fp_abi, interp_fp_abi); 140 abi1 = max(fp_abi, interp_fp_abi); 141 } else { 142 abi0 = abi1 = fp_abi; 143 } 144 145 is_mips64 = (ehdr->e_ident[EI_CLASS] == ELFCLASS64) || 146 (ehdr->e_flags & EF_MIPS_ABI2); 147 148 if (is_mips64) { 149 /* MIPS64 code always uses FR=1, thus the default is easy */ 150 state->overall_fp_mode = FP_FR1; 151 152 /* Disallow access to the various FPXX & FP64 ABIs */ 153 max_abi = MIPS_ABI_FP_SOFT; 154 } else { 155 /* Default to a mode capable of running code expecting FR=0 */ 156 state->overall_fp_mode = cpu_has_mips_r6 ? FP_FRE : FP_FR0; 157 158 /* Allow all ABIs we know about */ 159 max_abi = MIPS_ABI_FP_64A; 160 } 161 162 if ((abi0 > max_abi && abi0 != MIPS_ABI_FP_UNKNOWN) || 163 (abi1 > max_abi && abi1 != MIPS_ABI_FP_UNKNOWN)) 164 return -ELIBBAD; 165 166 /* It's time to determine the FPU mode requirements */ 167 prog_req = (abi0 == MIPS_ABI_FP_UNKNOWN) ? none_req : fpu_reqs[abi0]; 168 interp_req = (abi1 == MIPS_ABI_FP_UNKNOWN) ? none_req : fpu_reqs[abi1]; 169 170 /* 171 * Check whether the program's and interp's ABIs have a matching FPU 172 * mode requirement. 173 */ 174 prog_req.single = interp_req.single && prog_req.single; 175 prog_req.soft = interp_req.soft && prog_req.soft; 176 prog_req.fr1 = interp_req.fr1 && prog_req.fr1; 177 prog_req.frdefault = interp_req.frdefault && prog_req.frdefault; 178 prog_req.fre = interp_req.fre && prog_req.fre; 179 180 /* 181 * Determine the desired FPU mode 182 * 183 * Decision making: 184 * 185 * - We want FR_FRE if FRE=1 and both FR=1 and FR=0 are false. This 186 * means that we have a combination of program and interpreter 187 * that inherently require the hybrid FP mode. 188 * - If FR1 and FRDEFAULT is true, that means we hit the any-abi or 189 * fpxx case. This is because, in any-ABI (or no-ABI) we have no FPU 190 * instructions so we don't care about the mode. We will simply use 191 * the one preferred by the hardware. In fpxx case, that ABI can 192 * handle both FR=1 and FR=0, so, again, we simply choose the one 193 * preferred by the hardware. Next, if we only use single-precision 194 * FPU instructions, and the default ABI FPU mode is not good 195 * (ie single + any ABI combination), we set again the FPU mode to the 196 * one is preferred by the hardware. Next, if we know that the code 197 * will only use single-precision instructions, shown by single being 198 * true but frdefault being false, then we again set the FPU mode to 199 * the one that is preferred by the hardware. 200 * - We want FP_FR1 if that's the only matching mode and the default one 201 * is not good. 202 * - Return with -ELIBADD if we can't find a matching FPU mode. 203 */ 204 if (prog_req.fre && !prog_req.frdefault && !prog_req.fr1) 205 state->overall_fp_mode = FP_FRE; 206 else if ((prog_req.fr1 && prog_req.frdefault) || 207 (prog_req.single && !prog_req.frdefault)) 208 /* Make sure 64-bit MIPS III/IV/64R1 will not pick FR1 */ 209 state->overall_fp_mode = ((current_cpu_data.fpu_id & MIPS_FPIR_F64) && 210 cpu_has_mips_r2_r6) ? 211 FP_FR1 : FP_FR0; 212 else if (prog_req.fr1) 213 state->overall_fp_mode = FP_FR1; 214 else if (!prog_req.fre && !prog_req.frdefault && 215 !prog_req.fr1 && !prog_req.single && !prog_req.soft) 216 return -ELIBBAD; 217 218 return 0; 219} 220 221static inline void set_thread_fp_mode(int hybrid, int regs32) 222{ 223 if (hybrid) 224 set_thread_flag(TIF_HYBRID_FPREGS); 225 else 226 clear_thread_flag(TIF_HYBRID_FPREGS); 227 if (regs32) 228 set_thread_flag(TIF_32BIT_FPREGS); 229 else 230 clear_thread_flag(TIF_32BIT_FPREGS); 231} 232 233void mips_set_personality_fp(struct arch_elf_state *state) 234{ 235 /* 236 * This function is only ever called for O32 ELFs so we should 237 * not be worried about N32/N64 binaries. 238 */ 239 240 if (!config_enabled(CONFIG_MIPS_O32_FP64_SUPPORT)) 241 return; 242 243 switch (state->overall_fp_mode) { 244 case FP_FRE: 245 set_thread_fp_mode(1, 0); 246 break; 247 case FP_FR0: 248 set_thread_fp_mode(0, 1); 249 break; 250 case FP_FR1: 251 set_thread_fp_mode(0, 0); 252 break; 253 default: 254 BUG(); 255 } 256} 257