1/* 2 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation 3 * Rewrite, cleanup: 4 * Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 */ 20 21#ifndef _ASM_IOMMU_H 22#define _ASM_IOMMU_H 23#ifdef __KERNEL__ 24 25#include <linux/compiler.h> 26#include <linux/spinlock.h> 27#include <linux/device.h> 28#include <linux/dma-mapping.h> 29#include <linux/bitops.h> 30#include <asm/machdep.h> 31#include <asm/types.h> 32#include <asm/pci-bridge.h> 33 34#define IOMMU_PAGE_SHIFT_4K 12 35#define IOMMU_PAGE_SIZE_4K (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K) 36#define IOMMU_PAGE_MASK_4K (~((1 << IOMMU_PAGE_SHIFT_4K) - 1)) 37#define IOMMU_PAGE_ALIGN_4K(addr) _ALIGN_UP(addr, IOMMU_PAGE_SIZE_4K) 38 39#define IOMMU_PAGE_SIZE(tblptr) (ASM_CONST(1) << (tblptr)->it_page_shift) 40#define IOMMU_PAGE_MASK(tblptr) (~((1 << (tblptr)->it_page_shift) - 1)) 41#define IOMMU_PAGE_ALIGN(addr, tblptr) _ALIGN_UP(addr, IOMMU_PAGE_SIZE(tblptr)) 42 43/* Boot time flags */ 44extern int iommu_is_off; 45extern int iommu_force_on; 46 47/* 48 * IOMAP_MAX_ORDER defines the largest contiguous block 49 * of dma space we can get. IOMAP_MAX_ORDER = 13 50 * allows up to 2**12 pages (4096 * 4096) = 16 MB 51 */ 52#define IOMAP_MAX_ORDER 13 53 54#define IOMMU_POOL_HASHBITS 2 55#define IOMMU_NR_POOLS (1 << IOMMU_POOL_HASHBITS) 56 57struct iommu_pool { 58 unsigned long start; 59 unsigned long end; 60 unsigned long hint; 61 spinlock_t lock; 62} ____cacheline_aligned_in_smp; 63 64struct iommu_table { 65 unsigned long it_busno; /* Bus number this table belongs to */ 66 unsigned long it_size; /* Size of iommu table in entries */ 67 unsigned long it_offset; /* Offset into global table */ 68 unsigned long it_base; /* mapped address of tce table */ 69 unsigned long it_index; /* which iommu table this is */ 70 unsigned long it_type; /* type: PCI or Virtual Bus */ 71 unsigned long it_blocksize; /* Entries in each block (cacheline) */ 72 unsigned long poolsize; 73 unsigned long nr_pools; 74 struct iommu_pool large_pool; 75 struct iommu_pool pools[IOMMU_NR_POOLS]; 76 unsigned long *it_map; /* A simple allocation bitmap for now */ 77 unsigned long it_page_shift;/* table iommu page size */ 78#ifdef CONFIG_IOMMU_API 79 struct iommu_group *it_group; 80#endif 81 void (*set_bypass)(struct iommu_table *tbl, bool enable); 82#ifdef CONFIG_PPC_POWERNV 83 void *data; 84#endif 85}; 86 87/* Pure 2^n version of get_order */ 88static inline __attribute_const__ 89int get_iommu_order(unsigned long size, struct iommu_table *tbl) 90{ 91 return __ilog2((size - 1) >> tbl->it_page_shift) + 1; 92} 93 94 95struct scatterlist; 96 97static inline void set_iommu_table_base(struct device *dev, void *base) 98{ 99 dev->archdata.dma_data.iommu_table_base = base; 100} 101 102static inline void *get_iommu_table_base(struct device *dev) 103{ 104 return dev->archdata.dma_data.iommu_table_base; 105} 106 107/* Frees table for an individual device node */ 108extern void iommu_free_table(struct iommu_table *tbl, const char *node_name); 109 110/* Initializes an iommu_table based in values set in the passed-in 111 * structure 112 */ 113extern struct iommu_table *iommu_init_table(struct iommu_table * tbl, 114 int nid); 115#ifdef CONFIG_IOMMU_API 116extern void iommu_register_group(struct iommu_table *tbl, 117 int pci_domain_number, unsigned long pe_num); 118extern int iommu_add_device(struct device *dev); 119extern void iommu_del_device(struct device *dev); 120extern int __init tce_iommu_bus_notifier_init(void); 121#else 122static inline void iommu_register_group(struct iommu_table *tbl, 123 int pci_domain_number, 124 unsigned long pe_num) 125{ 126} 127 128static inline int iommu_add_device(struct device *dev) 129{ 130 return 0; 131} 132 133static inline void iommu_del_device(struct device *dev) 134{ 135} 136 137static inline int __init tce_iommu_bus_notifier_init(void) 138{ 139 return 0; 140} 141#endif /* !CONFIG_IOMMU_API */ 142 143static inline void set_iommu_table_base_and_group(struct device *dev, 144 void *base) 145{ 146 set_iommu_table_base(dev, base); 147 iommu_add_device(dev); 148} 149 150extern int ppc_iommu_map_sg(struct device *dev, struct iommu_table *tbl, 151 struct scatterlist *sglist, int nelems, 152 unsigned long mask, 153 enum dma_data_direction direction, 154 struct dma_attrs *attrs); 155extern void ppc_iommu_unmap_sg(struct iommu_table *tbl, 156 struct scatterlist *sglist, 157 int nelems, 158 enum dma_data_direction direction, 159 struct dma_attrs *attrs); 160 161extern void *iommu_alloc_coherent(struct device *dev, struct iommu_table *tbl, 162 size_t size, dma_addr_t *dma_handle, 163 unsigned long mask, gfp_t flag, int node); 164extern void iommu_free_coherent(struct iommu_table *tbl, size_t size, 165 void *vaddr, dma_addr_t dma_handle); 166extern dma_addr_t iommu_map_page(struct device *dev, struct iommu_table *tbl, 167 struct page *page, unsigned long offset, 168 size_t size, unsigned long mask, 169 enum dma_data_direction direction, 170 struct dma_attrs *attrs); 171extern void iommu_unmap_page(struct iommu_table *tbl, dma_addr_t dma_handle, 172 size_t size, enum dma_data_direction direction, 173 struct dma_attrs *attrs); 174 175extern void iommu_init_early_pSeries(void); 176extern void iommu_init_early_dart(struct pci_controller_ops *controller_ops); 177extern void iommu_init_early_pasemi(void); 178 179extern void alloc_dart_table(void); 180#if defined(CONFIG_PPC64) && defined(CONFIG_PM) 181static inline void iommu_save(void) 182{ 183 if (ppc_md.iommu_save) 184 ppc_md.iommu_save(); 185} 186 187static inline void iommu_restore(void) 188{ 189 if (ppc_md.iommu_restore) 190 ppc_md.iommu_restore(); 191} 192#endif 193 194/* The API to support IOMMU operations for VFIO */ 195extern int iommu_tce_clear_param_check(struct iommu_table *tbl, 196 unsigned long ioba, unsigned long tce_value, 197 unsigned long npages); 198extern int iommu_tce_put_param_check(struct iommu_table *tbl, 199 unsigned long ioba, unsigned long tce); 200extern int iommu_tce_build(struct iommu_table *tbl, unsigned long entry, 201 unsigned long hwaddr, enum dma_data_direction direction); 202extern unsigned long iommu_clear_tce(struct iommu_table *tbl, 203 unsigned long entry); 204extern int iommu_clear_tces_and_put_pages(struct iommu_table *tbl, 205 unsigned long entry, unsigned long pages); 206extern int iommu_put_tce_user_mode(struct iommu_table *tbl, 207 unsigned long entry, unsigned long tce); 208 209extern void iommu_flush_tce(struct iommu_table *tbl); 210extern int iommu_take_ownership(struct iommu_table *tbl); 211extern void iommu_release_ownership(struct iommu_table *tbl); 212 213extern enum dma_data_direction iommu_tce_direction(unsigned long tce); 214 215#endif /* __KERNEL__ */ 216#endif /* _ASM_IOMMU_H */ 217