1/*
2 * sh7724 MMCIF loader
3 *
4 * Copyright (C) 2010 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License.  See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/mmc/sh_mmcif.h>
12#include <linux/mmc/boot.h>
13#include <mach/romimage.h>
14
15#define MMCIF_BASE      (void __iomem *)0xa4ca0000
16
17#define MSTPCR2		0xa4150038
18#define PTWCR		0xa4050146
19#define PTXCR		0xa4050148
20#define PSELA		0xa405014e
21#define PSELE		0xa4050156
22#define HIZCRC		0xa405015c
23#define DRVCRA		0xa405018a
24
25/* SH7724 specific MMCIF loader
26 *
27 * loads the romImage from an MMC card starting from block 512
28 * use the following line to write the romImage to an MMC card
29 * # dd if=arch/sh/boot/romImage of=/dev/sdx bs=512 seek=512
30 */
31asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes)
32{
33	mmcif_update_progress(MMC_PROGRESS_ENTER);
34
35	/* enable clock to the MMCIF hardware block */
36	__raw_writel(__raw_readl(MSTPCR2) & ~0x20000000, MSTPCR2);
37
38	/* setup pins D7-D0 */
39	__raw_writew(0x0000, PTWCR);
40
41	/* setup pins MMC_CLK, MMC_CMD */
42	__raw_writew(__raw_readw(PTXCR) & ~0x000f, PTXCR);
43
44	/* select D3-D0 pin function */
45	__raw_writew(__raw_readw(PSELA) & ~0x2000, PSELA);
46
47	/* select D7-D4 pin function */
48	__raw_writew(__raw_readw(PSELE) & ~0x3000, PSELE);
49
50	/* disable Hi-Z for the MMC pins */
51	__raw_writew(__raw_readw(HIZCRC) & ~0x0620, HIZCRC);
52
53	/* high drive capability for MMC pins */
54	__raw_writew(__raw_readw(DRVCRA) | 0x3000, DRVCRA);
55
56	mmcif_update_progress(MMC_PROGRESS_INIT);
57
58	/* setup MMCIF hardware */
59	sh_mmcif_boot_init(MMCIF_BASE);
60
61	mmcif_update_progress(MMC_PROGRESS_LOAD);
62
63	/* load kernel via MMCIF interface */
64	sh_mmcif_boot_do_read(MMCIF_BASE, 512,
65	                      (no_bytes + SH_MMCIF_BBS - 1) / SH_MMCIF_BBS,
66			      buf);
67
68	/* disable clock to the MMCIF hardware block */
69	__raw_writel(__raw_readl(MSTPCR2) | 0x20000000, MSTPCR2);
70
71	mmcif_update_progress(MMC_PROGRESS_DONE);
72}
73