1/*---------------------------------------------------------------------------+
2 |  fpu_system.h                                                             |
3 |                                                                           |
4 | Copyright (C) 1992,1994,1997                                              |
5 |                       W. Metzenthen, 22 Parker St, Ormond, Vic 3163,      |
6 |                       Australia.  E-mail   billm@suburbia.net             |
7 |                                                                           |
8 +---------------------------------------------------------------------------*/
9
10#ifndef _FPU_SYSTEM_H
11#define _FPU_SYSTEM_H
12
13/* system dependent definitions */
14
15#include <linux/sched.h>
16#include <linux/kernel.h>
17#include <linux/mm.h>
18
19#include <asm/desc.h>
20#include <asm/mmu_context.h>
21
22static inline struct desc_struct FPU_get_ldt_descriptor(unsigned seg)
23{
24	static struct desc_struct zero_desc;
25	struct desc_struct ret = zero_desc;
26
27#ifdef CONFIG_MODIFY_LDT_SYSCALL
28	seg >>= 3;
29	mutex_lock(&current->mm->context.lock);
30	if (current->mm->context.ldt && seg < current->mm->context.ldt->size)
31		ret = current->mm->context.ldt->entries[seg];
32	mutex_unlock(&current->mm->context.lock);
33#endif
34	return ret;
35}
36
37#define SEG_D_SIZE(x)		((x).b & (3 << 21))
38#define SEG_G_BIT(x)		((x).b & (1 << 23))
39#define SEG_GRANULARITY(x)	(((x).b & (1 << 23)) ? 4096 : 1)
40#define SEG_286_MODE(x)		((x).b & ( 0xff000000 | 0xf0000 | (1 << 23)))
41#define SEG_BASE_ADDR(s)	(((s).b & 0xff000000) \
42				 | (((s).b & 0xff) << 16) | ((s).a >> 16))
43#define SEG_LIMIT(s)		(((s).b & 0xff0000) | ((s).a & 0xffff))
44#define SEG_EXECUTE_ONLY(s)	(((s).b & ((1 << 11) | (1 << 9))) == (1 << 11))
45#define SEG_WRITE_PERM(s)	(((s).b & ((1 << 11) | (1 << 9))) == (1 << 9))
46#define SEG_EXPAND_DOWN(s)	(((s).b & ((1 << 11) | (1 << 10))) \
47				 == (1 << 10))
48
49#define I387			(current->thread.fpu.state)
50#define FPU_info		(I387->soft.info)
51
52#define FPU_CS			(*(unsigned short *) &(FPU_info->regs->cs))
53#define FPU_SS			(*(unsigned short *) &(FPU_info->regs->ss))
54#define FPU_DS			(*(unsigned short *) &(FPU_info->regs->ds))
55#define FPU_EAX			(FPU_info->regs->ax)
56#define FPU_EFLAGS		(FPU_info->regs->flags)
57#define FPU_EIP			(FPU_info->regs->ip)
58#define FPU_ORIG_EIP		(FPU_info->___orig_eip)
59
60#define FPU_lookahead           (I387->soft.lookahead)
61
62/* nz if ip_offset and cs_selector are not to be set for the current
63   instruction. */
64#define no_ip_update		(*(u_char *)&(I387->soft.no_update))
65#define FPU_rm			(*(u_char *)&(I387->soft.rm))
66
67/* Number of bytes of data which can be legally accessed by the current
68   instruction. This only needs to hold a number <= 108, so a byte will do. */
69#define access_limit		(*(u_char *)&(I387->soft.alimit))
70
71#define partial_status		(I387->soft.swd)
72#define control_word		(I387->soft.cwd)
73#define fpu_tag_word		(I387->soft.twd)
74#define registers		(I387->soft.st_space)
75#define top			(I387->soft.ftop)
76
77#define instruction_address	(*(struct address *)&I387->soft.fip)
78#define operand_address		(*(struct address *)&I387->soft.foo)
79
80#define FPU_access_ok(x,y,z)	if ( !access_ok(x,y,z) ) \
81				math_abort(FPU_info,SIGSEGV)
82#define FPU_abort		math_abort(FPU_info, SIGSEGV)
83
84#undef FPU_IGNORE_CODE_SEGV
85#ifdef FPU_IGNORE_CODE_SEGV
86/* access_ok() is very expensive, and causes the emulator to run
87   about 20% slower if applied to the code. Anyway, errors due to bad
88   code addresses should be much rarer than errors due to bad data
89   addresses. */
90#define	FPU_code_access_ok(z)
91#else
92/* A simpler test than access_ok() can probably be done for
93   FPU_code_access_ok() because the only possible error is to step
94   past the upper boundary of a legal code area. */
95#define	FPU_code_access_ok(z) FPU_access_ok(VERIFY_READ,(void __user *)FPU_EIP,z)
96#endif
97
98#define FPU_get_user(x,y)       get_user((x),(y))
99#define FPU_put_user(x,y)       put_user((x),(y))
100
101#endif
102