1/*
2 * Copyright 2012 Red Hat
3 *
4 * This file is subject to the terms and conditions of the GNU General
5 * Public License version 2. See the file COPYING in the main
6 * directory of this archive for more details.
7 *
8 * Authors: Matthew Garrett
9 *          Dave Airlie
10 */
11#ifndef __CIRRUS_DRV_H__
12#define __CIRRUS_DRV_H__
13
14#include <video/vga.h>
15
16#include <drm/drm_fb_helper.h>
17
18#include <drm/ttm/ttm_bo_api.h>
19#include <drm/ttm/ttm_bo_driver.h>
20#include <drm/ttm/ttm_placement.h>
21#include <drm/ttm/ttm_memory.h>
22#include <drm/ttm/ttm_module.h>
23
24#include <drm/drm_gem.h>
25
26#define DRIVER_AUTHOR		"Matthew Garrett"
27
28#define DRIVER_NAME		"cirrus"
29#define DRIVER_DESC		"qemu Cirrus emulation"
30#define DRIVER_DATE		"20110418"
31
32#define DRIVER_MAJOR		1
33#define DRIVER_MINOR		0
34#define DRIVER_PATCHLEVEL	0
35
36#define CIRRUSFB_CONN_LIMIT 1
37
38#define RREG8(reg) ioread8(((void __iomem *)cdev->rmmio) + (reg))
39#define WREG8(reg, v) iowrite8(v, ((void __iomem *)cdev->rmmio) + (reg))
40#define RREG32(reg) ioread32(((void __iomem *)cdev->rmmio) + (reg))
41#define WREG32(reg, v) iowrite32(v, ((void __iomem *)cdev->rmmio) + (reg))
42
43#define SEQ_INDEX 4
44#define SEQ_DATA 5
45
46#define WREG_SEQ(reg, v)					\
47	do {							\
48		WREG8(SEQ_INDEX, reg);				\
49		WREG8(SEQ_DATA, v);				\
50	} while (0)						\
51
52#define CRT_INDEX 0x14
53#define CRT_DATA 0x15
54
55#define WREG_CRT(reg, v)					\
56	do {							\
57		WREG8(CRT_INDEX, reg);				\
58		WREG8(CRT_DATA, v);				\
59	} while (0)						\
60
61#define GFX_INDEX 0xe
62#define GFX_DATA 0xf
63
64#define WREG_GFX(reg, v)					\
65	do {							\
66		WREG8(GFX_INDEX, reg);				\
67		WREG8(GFX_DATA, v);				\
68	} while (0)						\
69
70/*
71 * Cirrus has a "hidden" DAC register that can be accessed by writing to
72 * the pixel mask register to reset the state, then reading from the register
73 * four times. The next write will then pass to the DAC
74 */
75#define VGA_DAC_MASK 0x6
76
77#define WREG_HDR(v)						\
78	do {							\
79		RREG8(VGA_DAC_MASK);					\
80		RREG8(VGA_DAC_MASK);					\
81		RREG8(VGA_DAC_MASK);					\
82		RREG8(VGA_DAC_MASK);					\
83		WREG8(VGA_DAC_MASK, v);					\
84	} while (0)						\
85
86
87#define CIRRUS_MAX_FB_HEIGHT 4096
88#define CIRRUS_MAX_FB_WIDTH 4096
89
90#define CIRRUS_DPMS_CLEARED (-1)
91
92#define to_cirrus_crtc(x) container_of(x, struct cirrus_crtc, base)
93#define to_cirrus_encoder(x) container_of(x, struct cirrus_encoder, base)
94#define to_cirrus_framebuffer(x) container_of(x, struct cirrus_framebuffer, base)
95
96struct cirrus_crtc {
97	struct drm_crtc			base;
98	u8				lut_r[256], lut_g[256], lut_b[256];
99	int				last_dpms;
100	bool				enabled;
101};
102
103struct cirrus_fbdev;
104struct cirrus_mode_info {
105	bool				mode_config_initialized;
106	struct cirrus_crtc		*crtc;
107	/* pointer to fbdev info structure */
108	struct cirrus_fbdev		*gfbdev;
109};
110
111struct cirrus_encoder {
112	struct drm_encoder		base;
113	int				last_dpms;
114};
115
116struct cirrus_connector {
117	struct drm_connector		base;
118};
119
120struct cirrus_framebuffer {
121	struct drm_framebuffer		base;
122	struct drm_gem_object *obj;
123};
124
125struct cirrus_mc {
126	resource_size_t			vram_size;
127	resource_size_t			vram_base;
128};
129
130struct cirrus_device {
131	struct drm_device		*dev;
132	unsigned long			flags;
133
134	resource_size_t			rmmio_base;
135	resource_size_t			rmmio_size;
136	void __iomem			*rmmio;
137
138	struct cirrus_mc			mc;
139	struct cirrus_mode_info		mode_info;
140
141	int				num_crtc;
142	int fb_mtrr;
143
144	struct {
145		struct drm_global_reference mem_global_ref;
146		struct ttm_bo_global_ref bo_global_ref;
147		struct ttm_bo_device bdev;
148	} ttm;
149	bool mm_inited;
150};
151
152
153struct cirrus_fbdev {
154	struct drm_fb_helper helper;
155	struct cirrus_framebuffer gfb;
156	struct list_head fbdev_list;
157	void *sysram;
158	int size;
159	int x1, y1, x2, y2; /* dirty rect */
160	spinlock_t dirty_lock;
161};
162
163struct cirrus_bo {
164	struct ttm_buffer_object bo;
165	struct ttm_placement placement;
166	struct ttm_bo_kmap_obj kmap;
167	struct drm_gem_object gem;
168	struct ttm_place placements[3];
169	int pin_count;
170};
171#define gem_to_cirrus_bo(gobj) container_of((gobj), struct cirrus_bo, gem)
172
173static inline struct cirrus_bo *
174cirrus_bo(struct ttm_buffer_object *bo)
175{
176	return container_of(bo, struct cirrus_bo, bo);
177}
178
179
180#define to_cirrus_obj(x) container_of(x, struct cirrus_gem_object, base)
181#define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
182
183				/* cirrus_mode.c */
184void cirrus_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
185			     u16 blue, int regno);
186void cirrus_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
187			     u16 *blue, int regno);
188
189
190				/* cirrus_main.c */
191int cirrus_device_init(struct cirrus_device *cdev,
192		      struct drm_device *ddev,
193		      struct pci_dev *pdev,
194		      uint32_t flags);
195void cirrus_device_fini(struct cirrus_device *cdev);
196void cirrus_gem_free_object(struct drm_gem_object *obj);
197int cirrus_dumb_mmap_offset(struct drm_file *file,
198			    struct drm_device *dev,
199			    uint32_t handle,
200			    uint64_t *offset);
201int cirrus_gem_create(struct drm_device *dev,
202		   u32 size, bool iskernel,
203		      struct drm_gem_object **obj);
204int cirrus_dumb_create(struct drm_file *file,
205		    struct drm_device *dev,
206		       struct drm_mode_create_dumb *args);
207
208int cirrus_framebuffer_init(struct drm_device *dev,
209			   struct cirrus_framebuffer *gfb,
210			    struct drm_mode_fb_cmd2 *mode_cmd,
211			    struct drm_gem_object *obj);
212
213bool cirrus_check_framebuffer(struct cirrus_device *cdev, int width, int height,
214			      int bpp, int pitch);
215
216				/* cirrus_display.c */
217int cirrus_modeset_init(struct cirrus_device *cdev);
218void cirrus_modeset_fini(struct cirrus_device *cdev);
219
220				/* cirrus_fbdev.c */
221int cirrus_fbdev_init(struct cirrus_device *cdev);
222void cirrus_fbdev_fini(struct cirrus_device *cdev);
223
224
225
226				/* cirrus_irq.c */
227void cirrus_driver_irq_preinstall(struct drm_device *dev);
228int cirrus_driver_irq_postinstall(struct drm_device *dev);
229void cirrus_driver_irq_uninstall(struct drm_device *dev);
230irqreturn_t cirrus_driver_irq_handler(int irq, void *arg);
231
232				/* cirrus_kms.c */
233int cirrus_driver_load(struct drm_device *dev, unsigned long flags);
234int cirrus_driver_unload(struct drm_device *dev);
235extern struct drm_ioctl_desc cirrus_ioctls[];
236extern int cirrus_max_ioctl;
237
238int cirrus_mm_init(struct cirrus_device *cirrus);
239void cirrus_mm_fini(struct cirrus_device *cirrus);
240void cirrus_ttm_placement(struct cirrus_bo *bo, int domain);
241int cirrus_bo_create(struct drm_device *dev, int size, int align,
242		     uint32_t flags, struct cirrus_bo **pcirrusbo);
243int cirrus_mmap(struct file *filp, struct vm_area_struct *vma);
244
245static inline int cirrus_bo_reserve(struct cirrus_bo *bo, bool no_wait)
246{
247	int ret;
248
249	ret = ttm_bo_reserve(&bo->bo, true, no_wait, false, NULL);
250	if (ret) {
251		if (ret != -ERESTARTSYS && ret != -EBUSY)
252			DRM_ERROR("reserve failed %p\n", bo);
253		return ret;
254	}
255	return 0;
256}
257
258static inline void cirrus_bo_unreserve(struct cirrus_bo *bo)
259{
260	ttm_bo_unreserve(&bo->bo);
261}
262
263int cirrus_bo_push_sysram(struct cirrus_bo *bo);
264int cirrus_bo_pin(struct cirrus_bo *bo, u32 pl_flag, u64 *gpu_addr);
265
266extern int cirrus_bpp;
267
268#endif				/* __CIRRUS_DRV_H__ */
269