1/*
2 * Analog Devices ADV7511 HDMI transmitter driver
3 *
4 * Copyright 2012 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8
9#include <linux/device.h>
10#include <linux/gpio/consumer.h>
11#include <linux/i2c.h>
12#include <linux/module.h>
13#include <linux/regmap.h>
14#include <linux/slab.h>
15
16#include <drm/drmP.h>
17#include <drm/drm_crtc_helper.h>
18#include <drm/drm_edid.h>
19#include <drm/drm_encoder_slave.h>
20
21#include "adv7511.h"
22
23struct adv7511 {
24	struct i2c_client *i2c_main;
25	struct i2c_client *i2c_edid;
26
27	struct regmap *regmap;
28	struct regmap *packet_memory_regmap;
29	enum drm_connector_status status;
30	bool powered;
31
32	unsigned int f_tmds;
33
34	unsigned int current_edid_segment;
35	uint8_t edid_buf[256];
36	bool edid_read;
37
38	wait_queue_head_t wq;
39	struct drm_encoder *encoder;
40
41	bool embedded_sync;
42	enum adv7511_sync_polarity vsync_polarity;
43	enum adv7511_sync_polarity hsync_polarity;
44	bool rgb;
45
46	struct edid *edid;
47
48	struct gpio_desc *gpio_pd;
49};
50
51static struct adv7511 *encoder_to_adv7511(struct drm_encoder *encoder)
52{
53	return to_encoder_slave(encoder)->slave_priv;
54}
55
56/* ADI recommended values for proper operation. */
57static const struct reg_default adv7511_fixed_registers[] = {
58	{ 0x98, 0x03 },
59	{ 0x9a, 0xe0 },
60	{ 0x9c, 0x30 },
61	{ 0x9d, 0x61 },
62	{ 0xa2, 0xa4 },
63	{ 0xa3, 0xa4 },
64	{ 0xe0, 0xd0 },
65	{ 0xf9, 0x00 },
66	{ 0x55, 0x02 },
67};
68
69/* -----------------------------------------------------------------------------
70 * Register access
71 */
72
73static const uint8_t adv7511_register_defaults[] = {
74	0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 00 */
75	0x00, 0x00, 0x01, 0x0e, 0xbc, 0x18, 0x01, 0x13,
76	0x25, 0x37, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 10 */
77	0x46, 0x62, 0x04, 0xa8, 0x00, 0x00, 0x1c, 0x84,
78	0x1c, 0xbf, 0x04, 0xa8, 0x1e, 0x70, 0x02, 0x1e, /* 20 */
79	0x00, 0x00, 0x04, 0xa8, 0x08, 0x12, 0x1b, 0xac,
80	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 30 */
81	0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0xb0,
82	0x00, 0x50, 0x90, 0x7e, 0x79, 0x70, 0x00, 0x00, /* 40 */
83	0x00, 0xa8, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
84	0x00, 0x00, 0x02, 0x0d, 0x00, 0x00, 0x00, 0x00, /* 50 */
85	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
86	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 60 */
87	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
88	0x01, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 70 */
89	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
90	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 80 */
91	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
92	0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, /* 90 */
93	0x0b, 0x02, 0x00, 0x18, 0x5a, 0x60, 0x00, 0x00,
94	0x00, 0x00, 0x80, 0x80, 0x08, 0x04, 0x00, 0x00, /* a0 */
95	0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x40, 0x14,
96	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* b0 */
97	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
98	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* c0 */
99	0x00, 0x03, 0x00, 0x00, 0x02, 0x00, 0x01, 0x04,
100	0x30, 0xff, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, /* d0 */
101	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x01,
102	0x80, 0x75, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, /* e0 */
103	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
104	0x00, 0x00, 0x00, 0x00, 0x00, 0x75, 0x11, 0x00, /* f0 */
105	0x00, 0x7c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
106};
107
108static bool adv7511_register_volatile(struct device *dev, unsigned int reg)
109{
110	switch (reg) {
111	case ADV7511_REG_CHIP_REVISION:
112	case ADV7511_REG_SPDIF_FREQ:
113	case ADV7511_REG_CTS_AUTOMATIC1:
114	case ADV7511_REG_CTS_AUTOMATIC2:
115	case ADV7511_REG_VIC_DETECTED:
116	case ADV7511_REG_VIC_SEND:
117	case ADV7511_REG_AUX_VIC_DETECTED:
118	case ADV7511_REG_STATUS:
119	case ADV7511_REG_GC(1):
120	case ADV7511_REG_INT(0):
121	case ADV7511_REG_INT(1):
122	case ADV7511_REG_PLL_STATUS:
123	case ADV7511_REG_AN(0):
124	case ADV7511_REG_AN(1):
125	case ADV7511_REG_AN(2):
126	case ADV7511_REG_AN(3):
127	case ADV7511_REG_AN(4):
128	case ADV7511_REG_AN(5):
129	case ADV7511_REG_AN(6):
130	case ADV7511_REG_AN(7):
131	case ADV7511_REG_HDCP_STATUS:
132	case ADV7511_REG_BCAPS:
133	case ADV7511_REG_BKSV(0):
134	case ADV7511_REG_BKSV(1):
135	case ADV7511_REG_BKSV(2):
136	case ADV7511_REG_BKSV(3):
137	case ADV7511_REG_BKSV(4):
138	case ADV7511_REG_DDC_STATUS:
139	case ADV7511_REG_BSTATUS(0):
140	case ADV7511_REG_BSTATUS(1):
141	case ADV7511_REG_CHIP_ID_HIGH:
142	case ADV7511_REG_CHIP_ID_LOW:
143		return true;
144	}
145
146	return false;
147}
148
149static const struct regmap_config adv7511_regmap_config = {
150	.reg_bits = 8,
151	.val_bits = 8,
152
153	.max_register = 0xff,
154	.cache_type = REGCACHE_RBTREE,
155	.reg_defaults_raw = adv7511_register_defaults,
156	.num_reg_defaults_raw = ARRAY_SIZE(adv7511_register_defaults),
157
158	.volatile_reg = adv7511_register_volatile,
159};
160
161/* -----------------------------------------------------------------------------
162 * Hardware configuration
163 */
164
165static void adv7511_set_colormap(struct adv7511 *adv7511, bool enable,
166				 const uint16_t *coeff,
167				 unsigned int scaling_factor)
168{
169	unsigned int i;
170
171	regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(1),
172			   ADV7511_CSC_UPDATE_MODE, ADV7511_CSC_UPDATE_MODE);
173
174	if (enable) {
175		for (i = 0; i < 12; ++i) {
176			regmap_update_bits(adv7511->regmap,
177					   ADV7511_REG_CSC_UPPER(i),
178					   0x1f, coeff[i] >> 8);
179			regmap_write(adv7511->regmap,
180				     ADV7511_REG_CSC_LOWER(i),
181				     coeff[i] & 0xff);
182		}
183	}
184
185	if (enable)
186		regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(0),
187				   0xe0, 0x80 | (scaling_factor << 5));
188	else
189		regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(0),
190				   0x80, 0x00);
191
192	regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(1),
193			   ADV7511_CSC_UPDATE_MODE, 0);
194}
195
196static int adv7511_packet_enable(struct adv7511 *adv7511, unsigned int packet)
197{
198	if (packet & 0xff)
199		regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE0,
200				   packet, 0xff);
201
202	if (packet & 0xff00) {
203		packet >>= 8;
204		regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE1,
205				   packet, 0xff);
206	}
207
208	return 0;
209}
210
211static int adv7511_packet_disable(struct adv7511 *adv7511, unsigned int packet)
212{
213	if (packet & 0xff)
214		regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE0,
215				   packet, 0x00);
216
217	if (packet & 0xff00) {
218		packet >>= 8;
219		regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE1,
220				   packet, 0x00);
221	}
222
223	return 0;
224}
225
226/* Coefficients for adv7511 color space conversion */
227static const uint16_t adv7511_csc_ycbcr_to_rgb[] = {
228	0x0734, 0x04ad, 0x0000, 0x1c1b,
229	0x1ddc, 0x04ad, 0x1f24, 0x0135,
230	0x0000, 0x04ad, 0x087c, 0x1b77,
231};
232
233static void adv7511_set_config_csc(struct adv7511 *adv7511,
234				   struct drm_connector *connector,
235				   bool rgb)
236{
237	struct adv7511_video_config config;
238	bool output_format_422, output_format_ycbcr;
239	unsigned int mode;
240	uint8_t infoframe[17];
241
242	if (adv7511->edid)
243		config.hdmi_mode = drm_detect_hdmi_monitor(adv7511->edid);
244	else
245		config.hdmi_mode = false;
246
247	hdmi_avi_infoframe_init(&config.avi_infoframe);
248
249	config.avi_infoframe.scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
250
251	if (rgb) {
252		config.csc_enable = false;
253		config.avi_infoframe.colorspace = HDMI_COLORSPACE_RGB;
254	} else {
255		config.csc_scaling_factor = ADV7511_CSC_SCALING_4;
256		config.csc_coefficents = adv7511_csc_ycbcr_to_rgb;
257
258		if ((connector->display_info.color_formats &
259		     DRM_COLOR_FORMAT_YCRCB422) &&
260		    config.hdmi_mode) {
261			config.csc_enable = false;
262			config.avi_infoframe.colorspace =
263				HDMI_COLORSPACE_YUV422;
264		} else {
265			config.csc_enable = true;
266			config.avi_infoframe.colorspace = HDMI_COLORSPACE_RGB;
267		}
268	}
269
270	if (config.hdmi_mode) {
271		mode = ADV7511_HDMI_CFG_MODE_HDMI;
272
273		switch (config.avi_infoframe.colorspace) {
274		case HDMI_COLORSPACE_YUV444:
275			output_format_422 = false;
276			output_format_ycbcr = true;
277			break;
278		case HDMI_COLORSPACE_YUV422:
279			output_format_422 = true;
280			output_format_ycbcr = true;
281			break;
282		default:
283			output_format_422 = false;
284			output_format_ycbcr = false;
285			break;
286		}
287	} else {
288		mode = ADV7511_HDMI_CFG_MODE_DVI;
289		output_format_422 = false;
290		output_format_ycbcr = false;
291	}
292
293	adv7511_packet_disable(adv7511, ADV7511_PACKET_ENABLE_AVI_INFOFRAME);
294
295	adv7511_set_colormap(adv7511, config.csc_enable,
296			     config.csc_coefficents,
297			     config.csc_scaling_factor);
298
299	regmap_update_bits(adv7511->regmap, ADV7511_REG_VIDEO_INPUT_CFG1, 0x81,
300			   (output_format_422 << 7) | output_format_ycbcr);
301
302	regmap_update_bits(adv7511->regmap, ADV7511_REG_HDCP_HDMI_CFG,
303			   ADV7511_HDMI_CFG_MODE_MASK, mode);
304
305	hdmi_avi_infoframe_pack(&config.avi_infoframe, infoframe,
306				sizeof(infoframe));
307
308	/* The AVI infoframe id is not configurable */
309	regmap_bulk_write(adv7511->regmap, ADV7511_REG_AVI_INFOFRAME_VERSION,
310			  infoframe + 1, sizeof(infoframe) - 1);
311
312	adv7511_packet_enable(adv7511, ADV7511_PACKET_ENABLE_AVI_INFOFRAME);
313}
314
315static void adv7511_set_link_config(struct adv7511 *adv7511,
316				    const struct adv7511_link_config *config)
317{
318	/*
319	 * The input style values documented in the datasheet don't match the
320	 * hardware register field values :-(
321	 */
322	static const unsigned int input_styles[4] = { 0, 2, 1, 3 };
323
324	unsigned int clock_delay;
325	unsigned int color_depth;
326	unsigned int input_id;
327
328	clock_delay = (config->clock_delay + 1200) / 400;
329	color_depth = config->input_color_depth == 8 ? 3
330		    : (config->input_color_depth == 10 ? 1 : 2);
331
332	/* TODO Support input ID 6 */
333	if (config->input_colorspace != HDMI_COLORSPACE_YUV422)
334		input_id = config->input_clock == ADV7511_INPUT_CLOCK_DDR
335			 ? 5 : 0;
336	else if (config->input_clock == ADV7511_INPUT_CLOCK_DDR)
337		input_id = config->embedded_sync ? 8 : 7;
338	else if (config->input_clock == ADV7511_INPUT_CLOCK_2X)
339		input_id = config->embedded_sync ? 4 : 3;
340	else
341		input_id = config->embedded_sync ? 2 : 1;
342
343	regmap_update_bits(adv7511->regmap, ADV7511_REG_I2C_FREQ_ID_CFG, 0xf,
344			   input_id);
345	regmap_update_bits(adv7511->regmap, ADV7511_REG_VIDEO_INPUT_CFG1, 0x7e,
346			   (color_depth << 4) |
347			   (input_styles[config->input_style] << 2));
348	regmap_write(adv7511->regmap, ADV7511_REG_VIDEO_INPUT_CFG2,
349		     config->input_justification << 3);
350	regmap_write(adv7511->regmap, ADV7511_REG_TIMING_GEN_SEQ,
351		     config->sync_pulse << 2);
352
353	regmap_write(adv7511->regmap, 0xba, clock_delay << 5);
354
355	adv7511->embedded_sync = config->embedded_sync;
356	adv7511->hsync_polarity = config->hsync_polarity;
357	adv7511->vsync_polarity = config->vsync_polarity;
358	adv7511->rgb = config->input_colorspace == HDMI_COLORSPACE_RGB;
359}
360
361static void adv7511_power_on(struct adv7511 *adv7511)
362{
363	adv7511->current_edid_segment = -1;
364
365	regmap_write(adv7511->regmap, ADV7511_REG_INT(0),
366		     ADV7511_INT0_EDID_READY);
367	regmap_write(adv7511->regmap, ADV7511_REG_INT(1),
368		     ADV7511_INT1_DDC_ERROR);
369	regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER,
370			   ADV7511_POWER_POWER_DOWN, 0);
371
372	/*
373	 * Per spec it is allowed to pulse the HDP signal to indicate that the
374	 * EDID information has changed. Some monitors do this when they wakeup
375	 * from standby or are enabled. When the HDP goes low the adv7511 is
376	 * reset and the outputs are disabled which might cause the monitor to
377	 * go to standby again. To avoid this we ignore the HDP pin for the
378	 * first few seconds after enabling the output.
379	 */
380	regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER2,
381			   ADV7511_REG_POWER2_HDP_SRC_MASK,
382			   ADV7511_REG_POWER2_HDP_SRC_NONE);
383
384	/*
385	 * Most of the registers are reset during power down or when HPD is low.
386	 */
387	regcache_sync(adv7511->regmap);
388
389	adv7511->powered = true;
390}
391
392static void adv7511_power_off(struct adv7511 *adv7511)
393{
394	/* TODO: setup additional power down modes */
395	regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER,
396			   ADV7511_POWER_POWER_DOWN,
397			   ADV7511_POWER_POWER_DOWN);
398	regcache_mark_dirty(adv7511->regmap);
399
400	adv7511->powered = false;
401}
402
403/* -----------------------------------------------------------------------------
404 * Interrupt and hotplug detection
405 */
406
407static bool adv7511_hpd(struct adv7511 *adv7511)
408{
409	unsigned int irq0;
410	int ret;
411
412	ret = regmap_read(adv7511->regmap, ADV7511_REG_INT(0), &irq0);
413	if (ret < 0)
414		return false;
415
416	if (irq0 & ADV7511_INT0_HDP) {
417		regmap_write(adv7511->regmap, ADV7511_REG_INT(0),
418			     ADV7511_INT0_HDP);
419		return true;
420	}
421
422	return false;
423}
424
425static int adv7511_irq_process(struct adv7511 *adv7511)
426{
427	unsigned int irq0, irq1;
428	int ret;
429
430	ret = regmap_read(adv7511->regmap, ADV7511_REG_INT(0), &irq0);
431	if (ret < 0)
432		return ret;
433
434	ret = regmap_read(adv7511->regmap, ADV7511_REG_INT(1), &irq1);
435	if (ret < 0)
436		return ret;
437
438	regmap_write(adv7511->regmap, ADV7511_REG_INT(0), irq0);
439	regmap_write(adv7511->regmap, ADV7511_REG_INT(1), irq1);
440
441	if (irq0 & ADV7511_INT0_HDP)
442		drm_helper_hpd_irq_event(adv7511->encoder->dev);
443
444	if (irq0 & ADV7511_INT0_EDID_READY || irq1 & ADV7511_INT1_DDC_ERROR) {
445		adv7511->edid_read = true;
446
447		if (adv7511->i2c_main->irq)
448			wake_up_all(&adv7511->wq);
449	}
450
451	return 0;
452}
453
454static irqreturn_t adv7511_irq_handler(int irq, void *devid)
455{
456	struct adv7511 *adv7511 = devid;
457	int ret;
458
459	ret = adv7511_irq_process(adv7511);
460	return ret < 0 ? IRQ_NONE : IRQ_HANDLED;
461}
462
463/* -----------------------------------------------------------------------------
464 * EDID retrieval
465 */
466
467static int adv7511_wait_for_edid(struct adv7511 *adv7511, int timeout)
468{
469	int ret;
470
471	if (adv7511->i2c_main->irq) {
472		ret = wait_event_interruptible_timeout(adv7511->wq,
473				adv7511->edid_read, msecs_to_jiffies(timeout));
474	} else {
475		for (; timeout > 0; timeout -= 25) {
476			ret = adv7511_irq_process(adv7511);
477			if (ret < 0)
478				break;
479
480			if (adv7511->edid_read)
481				break;
482
483			msleep(25);
484		}
485	}
486
487	return adv7511->edid_read ? 0 : -EIO;
488}
489
490static int adv7511_get_edid_block(void *data, u8 *buf, unsigned int block,
491				  size_t len)
492{
493	struct adv7511 *adv7511 = data;
494	struct i2c_msg xfer[2];
495	uint8_t offset;
496	unsigned int i;
497	int ret;
498
499	if (len > 128)
500		return -EINVAL;
501
502	if (adv7511->current_edid_segment != block / 2) {
503		unsigned int status;
504
505		ret = regmap_read(adv7511->regmap, ADV7511_REG_DDC_STATUS,
506				  &status);
507		if (ret < 0)
508			return ret;
509
510		if (status != 2) {
511			adv7511->edid_read = false;
512			regmap_write(adv7511->regmap, ADV7511_REG_EDID_SEGMENT,
513				     block);
514			ret = adv7511_wait_for_edid(adv7511, 200);
515			if (ret < 0)
516				return ret;
517		}
518
519		/* Break this apart, hopefully more I2C controllers will
520		 * support 64 byte transfers than 256 byte transfers
521		 */
522
523		xfer[0].addr = adv7511->i2c_edid->addr;
524		xfer[0].flags = 0;
525		xfer[0].len = 1;
526		xfer[0].buf = &offset;
527		xfer[1].addr = adv7511->i2c_edid->addr;
528		xfer[1].flags = I2C_M_RD;
529		xfer[1].len = 64;
530		xfer[1].buf = adv7511->edid_buf;
531
532		offset = 0;
533
534		for (i = 0; i < 4; ++i) {
535			ret = i2c_transfer(adv7511->i2c_edid->adapter, xfer,
536					   ARRAY_SIZE(xfer));
537			if (ret < 0)
538				return ret;
539			else if (ret != 2)
540				return -EIO;
541
542			xfer[1].buf += 64;
543			offset += 64;
544		}
545
546		adv7511->current_edid_segment = block / 2;
547	}
548
549	if (block % 2 == 0)
550		memcpy(buf, adv7511->edid_buf, len);
551	else
552		memcpy(buf, adv7511->edid_buf + 128, len);
553
554	return 0;
555}
556
557/* -----------------------------------------------------------------------------
558 * Encoder operations
559 */
560
561static int adv7511_get_modes(struct drm_encoder *encoder,
562			     struct drm_connector *connector)
563{
564	struct adv7511 *adv7511 = encoder_to_adv7511(encoder);
565	struct edid *edid;
566	unsigned int count;
567
568	/* Reading the EDID only works if the device is powered */
569	if (!adv7511->powered) {
570		regmap_write(adv7511->regmap, ADV7511_REG_INT(0),
571			     ADV7511_INT0_EDID_READY);
572		regmap_write(adv7511->regmap, ADV7511_REG_INT(1),
573			     ADV7511_INT1_DDC_ERROR);
574		regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER,
575				   ADV7511_POWER_POWER_DOWN, 0);
576		adv7511->current_edid_segment = -1;
577	}
578
579	edid = drm_do_get_edid(connector, adv7511_get_edid_block, adv7511);
580
581	if (!adv7511->powered)
582		regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER,
583				   ADV7511_POWER_POWER_DOWN,
584				   ADV7511_POWER_POWER_DOWN);
585
586	kfree(adv7511->edid);
587	adv7511->edid = edid;
588	if (!edid)
589		return 0;
590
591	drm_mode_connector_update_edid_property(connector, edid);
592	count = drm_add_edid_modes(connector, edid);
593
594	adv7511_set_config_csc(adv7511, connector, adv7511->rgb);
595
596	return count;
597}
598
599static void adv7511_encoder_dpms(struct drm_encoder *encoder, int mode)
600{
601	struct adv7511 *adv7511 = encoder_to_adv7511(encoder);
602
603	if (mode == DRM_MODE_DPMS_ON)
604		adv7511_power_on(adv7511);
605	else
606		adv7511_power_off(adv7511);
607}
608
609static enum drm_connector_status
610adv7511_encoder_detect(struct drm_encoder *encoder,
611		       struct drm_connector *connector)
612{
613	struct adv7511 *adv7511 = encoder_to_adv7511(encoder);
614	enum drm_connector_status status;
615	unsigned int val;
616	bool hpd;
617	int ret;
618
619	ret = regmap_read(adv7511->regmap, ADV7511_REG_STATUS, &val);
620	if (ret < 0)
621		return connector_status_disconnected;
622
623	if (val & ADV7511_STATUS_HPD)
624		status = connector_status_connected;
625	else
626		status = connector_status_disconnected;
627
628	hpd = adv7511_hpd(adv7511);
629
630	/* The chip resets itself when the cable is disconnected, so in case
631	 * there is a pending HPD interrupt and the cable is connected there was
632	 * at least one transition from disconnected to connected and the chip
633	 * has to be reinitialized. */
634	if (status == connector_status_connected && hpd && adv7511->powered) {
635		regcache_mark_dirty(adv7511->regmap);
636		adv7511_power_on(adv7511);
637		adv7511_get_modes(encoder, connector);
638		if (adv7511->status == connector_status_connected)
639			status = connector_status_disconnected;
640	} else {
641		/* Renable HDP sensing */
642		regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER2,
643				   ADV7511_REG_POWER2_HDP_SRC_MASK,
644				   ADV7511_REG_POWER2_HDP_SRC_BOTH);
645	}
646
647	adv7511->status = status;
648	return status;
649}
650
651static int adv7511_encoder_mode_valid(struct drm_encoder *encoder,
652				      struct drm_display_mode *mode)
653{
654	if (mode->clock > 165000)
655		return MODE_CLOCK_HIGH;
656
657	return MODE_OK;
658}
659
660static void adv7511_encoder_mode_set(struct drm_encoder *encoder,
661				     struct drm_display_mode *mode,
662				     struct drm_display_mode *adj_mode)
663{
664	struct adv7511 *adv7511 = encoder_to_adv7511(encoder);
665	unsigned int low_refresh_rate;
666	unsigned int hsync_polarity = 0;
667	unsigned int vsync_polarity = 0;
668
669	if (adv7511->embedded_sync) {
670		unsigned int hsync_offset, hsync_len;
671		unsigned int vsync_offset, vsync_len;
672
673		hsync_offset = adj_mode->crtc_hsync_start -
674			       adj_mode->crtc_hdisplay;
675		vsync_offset = adj_mode->crtc_vsync_start -
676			       adj_mode->crtc_vdisplay;
677		hsync_len = adj_mode->crtc_hsync_end -
678			    adj_mode->crtc_hsync_start;
679		vsync_len = adj_mode->crtc_vsync_end -
680			    adj_mode->crtc_vsync_start;
681
682		/* The hardware vsync generator has a off-by-one bug */
683		vsync_offset += 1;
684
685		regmap_write(adv7511->regmap, ADV7511_REG_HSYNC_PLACEMENT_MSB,
686			     ((hsync_offset >> 10) & 0x7) << 5);
687		regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(0),
688			     (hsync_offset >> 2) & 0xff);
689		regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(1),
690			     ((hsync_offset & 0x3) << 6) |
691			     ((hsync_len >> 4) & 0x3f));
692		regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(2),
693			     ((hsync_len & 0xf) << 4) |
694			     ((vsync_offset >> 6) & 0xf));
695		regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(3),
696			     ((vsync_offset & 0x3f) << 2) |
697			     ((vsync_len >> 8) & 0x3));
698		regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(4),
699			     vsync_len & 0xff);
700
701		hsync_polarity = !(adj_mode->flags & DRM_MODE_FLAG_PHSYNC);
702		vsync_polarity = !(adj_mode->flags & DRM_MODE_FLAG_PVSYNC);
703	} else {
704		enum adv7511_sync_polarity mode_hsync_polarity;
705		enum adv7511_sync_polarity mode_vsync_polarity;
706
707		/**
708		 * If the input signal is always low or always high we want to
709		 * invert or let it passthrough depending on the polarity of the
710		 * current mode.
711		 **/
712		if (adj_mode->flags & DRM_MODE_FLAG_NHSYNC)
713			mode_hsync_polarity = ADV7511_SYNC_POLARITY_LOW;
714		else
715			mode_hsync_polarity = ADV7511_SYNC_POLARITY_HIGH;
716
717		if (adj_mode->flags & DRM_MODE_FLAG_NVSYNC)
718			mode_vsync_polarity = ADV7511_SYNC_POLARITY_LOW;
719		else
720			mode_vsync_polarity = ADV7511_SYNC_POLARITY_HIGH;
721
722		if (adv7511->hsync_polarity != mode_hsync_polarity &&
723		    adv7511->hsync_polarity !=
724		    ADV7511_SYNC_POLARITY_PASSTHROUGH)
725			hsync_polarity = 1;
726
727		if (adv7511->vsync_polarity != mode_vsync_polarity &&
728		    adv7511->vsync_polarity !=
729		    ADV7511_SYNC_POLARITY_PASSTHROUGH)
730			vsync_polarity = 1;
731	}
732
733	if (mode->vrefresh <= 24000)
734		low_refresh_rate = ADV7511_LOW_REFRESH_RATE_24HZ;
735	else if (mode->vrefresh <= 25000)
736		low_refresh_rate = ADV7511_LOW_REFRESH_RATE_25HZ;
737	else if (mode->vrefresh <= 30000)
738		low_refresh_rate = ADV7511_LOW_REFRESH_RATE_30HZ;
739	else
740		low_refresh_rate = ADV7511_LOW_REFRESH_RATE_NONE;
741
742	regmap_update_bits(adv7511->regmap, 0xfb,
743		0x6, low_refresh_rate << 1);
744	regmap_update_bits(adv7511->regmap, 0x17,
745		0x60, (vsync_polarity << 6) | (hsync_polarity << 5));
746
747	/*
748	 * TODO Test first order 4:2:2 to 4:4:4 up conversion method, which is
749	 * supposed to give better results.
750	 */
751
752	adv7511->f_tmds = mode->clock;
753}
754
755static struct drm_encoder_slave_funcs adv7511_encoder_funcs = {
756	.dpms = adv7511_encoder_dpms,
757	.mode_valid = adv7511_encoder_mode_valid,
758	.mode_set = adv7511_encoder_mode_set,
759	.detect = adv7511_encoder_detect,
760	.get_modes = adv7511_get_modes,
761};
762
763/* -----------------------------------------------------------------------------
764 * Probe & remove
765 */
766
767static int adv7511_parse_dt(struct device_node *np,
768			    struct adv7511_link_config *config)
769{
770	const char *str;
771	int ret;
772
773	memset(config, 0, sizeof(*config));
774
775	of_property_read_u32(np, "adi,input-depth", &config->input_color_depth);
776	if (config->input_color_depth != 8 && config->input_color_depth != 10 &&
777	    config->input_color_depth != 12)
778		return -EINVAL;
779
780	ret = of_property_read_string(np, "adi,input-colorspace", &str);
781	if (ret < 0)
782		return ret;
783
784	if (!strcmp(str, "rgb"))
785		config->input_colorspace = HDMI_COLORSPACE_RGB;
786	else if (!strcmp(str, "yuv422"))
787		config->input_colorspace = HDMI_COLORSPACE_YUV422;
788	else if (!strcmp(str, "yuv444"))
789		config->input_colorspace = HDMI_COLORSPACE_YUV444;
790	else
791		return -EINVAL;
792
793	ret = of_property_read_string(np, "adi,input-clock", &str);
794	if (ret < 0)
795		return ret;
796
797	if (!strcmp(str, "1x"))
798		config->input_clock = ADV7511_INPUT_CLOCK_1X;
799	else if (!strcmp(str, "2x"))
800		config->input_clock = ADV7511_INPUT_CLOCK_2X;
801	else if (!strcmp(str, "ddr"))
802		config->input_clock = ADV7511_INPUT_CLOCK_DDR;
803	else
804		return -EINVAL;
805
806	if (config->input_colorspace == HDMI_COLORSPACE_YUV422 ||
807	    config->input_clock != ADV7511_INPUT_CLOCK_1X) {
808		ret = of_property_read_u32(np, "adi,input-style",
809					   &config->input_style);
810		if (ret)
811			return ret;
812
813		if (config->input_style < 1 || config->input_style > 3)
814			return -EINVAL;
815
816		ret = of_property_read_string(np, "adi,input-justification",
817					      &str);
818		if (ret < 0)
819			return ret;
820
821		if (!strcmp(str, "left"))
822			config->input_justification =
823				ADV7511_INPUT_JUSTIFICATION_LEFT;
824		else if (!strcmp(str, "evenly"))
825			config->input_justification =
826				ADV7511_INPUT_JUSTIFICATION_EVENLY;
827		else if (!strcmp(str, "right"))
828			config->input_justification =
829				ADV7511_INPUT_JUSTIFICATION_RIGHT;
830		else
831			return -EINVAL;
832
833	} else {
834		config->input_style = 1;
835		config->input_justification = ADV7511_INPUT_JUSTIFICATION_LEFT;
836	}
837
838	of_property_read_u32(np, "adi,clock-delay", &config->clock_delay);
839	if (config->clock_delay < -1200 || config->clock_delay > 1600)
840		return -EINVAL;
841
842	config->embedded_sync = of_property_read_bool(np, "adi,embedded-sync");
843
844	/* Hardcode the sync pulse configurations for now. */
845	config->sync_pulse = ADV7511_INPUT_SYNC_PULSE_NONE;
846	config->vsync_polarity = ADV7511_SYNC_POLARITY_PASSTHROUGH;
847	config->hsync_polarity = ADV7511_SYNC_POLARITY_PASSTHROUGH;
848
849	return 0;
850}
851
852static const int edid_i2c_addr = 0x7e;
853static const int packet_i2c_addr = 0x70;
854static const int cec_i2c_addr = 0x78;
855
856static int adv7511_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
857{
858	struct adv7511_link_config link_config;
859	struct adv7511 *adv7511;
860	struct device *dev = &i2c->dev;
861	unsigned int val;
862	int ret;
863
864	if (!dev->of_node)
865		return -EINVAL;
866
867	adv7511 = devm_kzalloc(dev, sizeof(*adv7511), GFP_KERNEL);
868	if (!adv7511)
869		return -ENOMEM;
870
871	adv7511->powered = false;
872	adv7511->status = connector_status_disconnected;
873
874	ret = adv7511_parse_dt(dev->of_node, &link_config);
875	if (ret)
876		return ret;
877
878	/*
879	 * The power down GPIO is optional. If present, toggle it from active to
880	 * inactive to wake up the encoder.
881	 */
882	adv7511->gpio_pd = devm_gpiod_get_optional(dev, "pd", GPIOD_OUT_HIGH);
883	if (IS_ERR(adv7511->gpio_pd))
884		return PTR_ERR(adv7511->gpio_pd);
885
886	if (adv7511->gpio_pd) {
887		mdelay(5);
888		gpiod_set_value_cansleep(adv7511->gpio_pd, 0);
889	}
890
891	adv7511->regmap = devm_regmap_init_i2c(i2c, &adv7511_regmap_config);
892	if (IS_ERR(adv7511->regmap))
893		return PTR_ERR(adv7511->regmap);
894
895	ret = regmap_read(adv7511->regmap, ADV7511_REG_CHIP_REVISION, &val);
896	if (ret)
897		return ret;
898	dev_dbg(dev, "Rev. %d\n", val);
899
900	ret = regmap_register_patch(adv7511->regmap, adv7511_fixed_registers,
901				    ARRAY_SIZE(adv7511_fixed_registers));
902	if (ret)
903		return ret;
904
905	regmap_write(adv7511->regmap, ADV7511_REG_EDID_I2C_ADDR, edid_i2c_addr);
906	regmap_write(adv7511->regmap, ADV7511_REG_PACKET_I2C_ADDR,
907		     packet_i2c_addr);
908	regmap_write(adv7511->regmap, ADV7511_REG_CEC_I2C_ADDR, cec_i2c_addr);
909	adv7511_packet_disable(adv7511, 0xffff);
910
911	adv7511->i2c_main = i2c;
912	adv7511->i2c_edid = i2c_new_dummy(i2c->adapter, edid_i2c_addr >> 1);
913	if (!adv7511->i2c_edid)
914		return -ENOMEM;
915
916	if (i2c->irq) {
917		init_waitqueue_head(&adv7511->wq);
918
919		ret = devm_request_threaded_irq(dev, i2c->irq, NULL,
920						adv7511_irq_handler,
921						IRQF_ONESHOT, dev_name(dev),
922						adv7511);
923		if (ret)
924			goto err_i2c_unregister_device;
925	}
926
927	/* CEC is unused for now */
928	regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL,
929		     ADV7511_CEC_CTRL_POWER_DOWN);
930
931	adv7511_power_off(adv7511);
932
933	i2c_set_clientdata(i2c, adv7511);
934
935	adv7511_set_link_config(adv7511, &link_config);
936
937	return 0;
938
939err_i2c_unregister_device:
940	i2c_unregister_device(adv7511->i2c_edid);
941
942	return ret;
943}
944
945static int adv7511_remove(struct i2c_client *i2c)
946{
947	struct adv7511 *adv7511 = i2c_get_clientdata(i2c);
948
949	i2c_unregister_device(adv7511->i2c_edid);
950
951	kfree(adv7511->edid);
952
953	return 0;
954}
955
956static int adv7511_encoder_init(struct i2c_client *i2c, struct drm_device *dev,
957				struct drm_encoder_slave *encoder)
958{
959
960	struct adv7511 *adv7511 = i2c_get_clientdata(i2c);
961
962	encoder->slave_priv = adv7511;
963	encoder->slave_funcs = &adv7511_encoder_funcs;
964
965	adv7511->encoder = &encoder->base;
966
967	return 0;
968}
969
970static const struct i2c_device_id adv7511_i2c_ids[] = {
971	{ "adv7511", 0 },
972	{ "adv7511w", 0 },
973	{ "adv7513", 0 },
974	{ }
975};
976MODULE_DEVICE_TABLE(i2c, adv7511_i2c_ids);
977
978static const struct of_device_id adv7511_of_ids[] = {
979	{ .compatible = "adi,adv7511", },
980	{ .compatible = "adi,adv7511w", },
981	{ .compatible = "adi,adv7513", },
982	{ }
983};
984MODULE_DEVICE_TABLE(of, adv7511_of_ids);
985
986static struct drm_i2c_encoder_driver adv7511_driver = {
987	.i2c_driver = {
988		.driver = {
989			.name = "adv7511",
990			.of_match_table = adv7511_of_ids,
991		},
992		.id_table = adv7511_i2c_ids,
993		.probe = adv7511_probe,
994		.remove = adv7511_remove,
995	},
996
997	.encoder_init = adv7511_encoder_init,
998};
999
1000static int __init adv7511_init(void)
1001{
1002	return drm_i2c_encoder_register(THIS_MODULE, &adv7511_driver);
1003}
1004module_init(adv7511_init);
1005
1006static void __exit adv7511_exit(void)
1007{
1008	drm_i2c_encoder_unregister(&adv7511_driver);
1009}
1010module_exit(adv7511_exit);
1011
1012MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
1013MODULE_DESCRIPTION("ADV7511 HDMI transmitter driver");
1014MODULE_LICENSE("GPL");
1015