1/* 2 * Copyright © 2006 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 */ 27#include <linux/dmi.h> 28#include <drm/drm_dp_helper.h> 29#include <drm/drmP.h> 30#include <drm/i915_drm.h> 31#include "i915_drv.h" 32#include "intel_bios.h" 33 34#define SLAVE_ADDR1 0x70 35#define SLAVE_ADDR2 0x72 36 37static int panel_type; 38 39static void * 40find_section(struct bdb_header *bdb, int section_id) 41{ 42 u8 *base = (u8 *)bdb; 43 int index = 0; 44 u32 total, current_size; 45 u8 current_id; 46 47 /* skip to first section */ 48 index += bdb->header_size; 49 total = bdb->bdb_size; 50 51 /* walk the sections looking for section_id */ 52 while (index + 3 < total) { 53 current_id = *(base + index); 54 index++; 55 56 current_size = *((u16 *)(base + index)); 57 index += 2; 58 59 /* The MIPI Sequence Block v3+ has a separate size field. */ 60 if (current_id == BDB_MIPI_SEQUENCE && *(base + index) >= 3) 61 current_size = *((const u32 *)(base + index + 1)); 62 63 if (index + current_size > total) 64 return NULL; 65 66 if (current_id == section_id) 67 return base + index; 68 69 index += current_size; 70 } 71 72 return NULL; 73} 74 75static u16 76get_blocksize(void *p) 77{ 78 u16 *block_ptr, block_size; 79 80 block_ptr = (u16 *)((char *)p - 2); 81 block_size = *block_ptr; 82 return block_size; 83} 84 85static void 86fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, 87 const struct lvds_dvo_timing *dvo_timing) 88{ 89 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | 90 dvo_timing->hactive_lo; 91 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + 92 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); 93 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + 94 dvo_timing->hsync_pulse_width; 95 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + 96 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); 97 98 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | 99 dvo_timing->vactive_lo; 100 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + 101 dvo_timing->vsync_off; 102 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + 103 dvo_timing->vsync_pulse_width; 104 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + 105 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); 106 panel_fixed_mode->clock = dvo_timing->clock * 10; 107 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 108 109 if (dvo_timing->hsync_positive) 110 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 111 else 112 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 113 114 if (dvo_timing->vsync_positive) 115 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 116 else 117 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 118 119 /* Some VBTs have bogus h/vtotal values */ 120 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) 121 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; 122 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) 123 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; 124 125 drm_mode_set_name(panel_fixed_mode); 126} 127 128static bool 129lvds_dvo_timing_equal_size(const struct lvds_dvo_timing *a, 130 const struct lvds_dvo_timing *b) 131{ 132 if (a->hactive_hi != b->hactive_hi || 133 a->hactive_lo != b->hactive_lo) 134 return false; 135 136 if (a->hsync_off_hi != b->hsync_off_hi || 137 a->hsync_off_lo != b->hsync_off_lo) 138 return false; 139 140 if (a->hsync_pulse_width != b->hsync_pulse_width) 141 return false; 142 143 if (a->hblank_hi != b->hblank_hi || 144 a->hblank_lo != b->hblank_lo) 145 return false; 146 147 if (a->vactive_hi != b->vactive_hi || 148 a->vactive_lo != b->vactive_lo) 149 return false; 150 151 if (a->vsync_off != b->vsync_off) 152 return false; 153 154 if (a->vsync_pulse_width != b->vsync_pulse_width) 155 return false; 156 157 if (a->vblank_hi != b->vblank_hi || 158 a->vblank_lo != b->vblank_lo) 159 return false; 160 161 return true; 162} 163 164static const struct lvds_dvo_timing * 165get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data, 166 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs, 167 int index) 168{ 169 /* 170 * the size of fp_timing varies on the different platform. 171 * So calculate the DVO timing relative offset in LVDS data 172 * entry to get the DVO timing entry 173 */ 174 175 int lfp_data_size = 176 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset - 177 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset; 178 int dvo_timing_offset = 179 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset - 180 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset; 181 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index; 182 183 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset); 184} 185 186/* get lvds_fp_timing entry 187 * this function may return NULL if the corresponding entry is invalid 188 */ 189static const struct lvds_fp_timing * 190get_lvds_fp_timing(const struct bdb_header *bdb, 191 const struct bdb_lvds_lfp_data *data, 192 const struct bdb_lvds_lfp_data_ptrs *ptrs, 193 int index) 194{ 195 size_t data_ofs = (const u8 *)data - (const u8 *)bdb; 196 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */ 197 size_t ofs; 198 199 if (index >= ARRAY_SIZE(ptrs->ptr)) 200 return NULL; 201 ofs = ptrs->ptr[index].fp_timing_offset; 202 if (ofs < data_ofs || 203 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size) 204 return NULL; 205 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs); 206} 207 208/* Try to find integrated panel data */ 209static void 210parse_lfp_panel_data(struct drm_i915_private *dev_priv, 211 struct bdb_header *bdb) 212{ 213 const struct bdb_lvds_options *lvds_options; 214 const struct bdb_lvds_lfp_data *lvds_lfp_data; 215 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; 216 const struct lvds_dvo_timing *panel_dvo_timing; 217 const struct lvds_fp_timing *fp_timing; 218 struct drm_display_mode *panel_fixed_mode; 219 int i, downclock, drrs_mode; 220 221 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS); 222 if (!lvds_options) 223 return; 224 225 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither; 226 if (lvds_options->panel_type == 0xff) 227 return; 228 229 panel_type = lvds_options->panel_type; 230 231 drrs_mode = (lvds_options->dps_panel_type_bits 232 >> (panel_type * 2)) & MODE_MASK; 233 /* 234 * VBT has static DRRS = 0 and seamless DRRS = 2. 235 * The below piece of code is required to adjust vbt.drrs_type 236 * to match the enum drrs_support_type. 237 */ 238 switch (drrs_mode) { 239 case 0: 240 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT; 241 DRM_DEBUG_KMS("DRRS supported mode is static\n"); 242 break; 243 case 2: 244 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT; 245 DRM_DEBUG_KMS("DRRS supported mode is seamless\n"); 246 break; 247 default: 248 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 249 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n"); 250 break; 251 } 252 253 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA); 254 if (!lvds_lfp_data) 255 return; 256 257 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS); 258 if (!lvds_lfp_data_ptrs) 259 return; 260 261 dev_priv->vbt.lvds_vbt = 1; 262 263 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, 264 lvds_lfp_data_ptrs, 265 lvds_options->panel_type); 266 267 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 268 if (!panel_fixed_mode) 269 return; 270 271 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); 272 273 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 274 275 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n"); 276 drm_mode_debug_printmodeline(panel_fixed_mode); 277 278 /* 279 * Iterate over the LVDS panel timing info to find the lowest clock 280 * for the native resolution. 281 */ 282 downclock = panel_dvo_timing->clock; 283 for (i = 0; i < 16; i++) { 284 const struct lvds_dvo_timing *dvo_timing; 285 286 dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, 287 lvds_lfp_data_ptrs, 288 i); 289 if (lvds_dvo_timing_equal_size(dvo_timing, panel_dvo_timing) && 290 dvo_timing->clock < downclock) 291 downclock = dvo_timing->clock; 292 } 293 294 if (downclock < panel_dvo_timing->clock && i915.lvds_downclock) { 295 dev_priv->lvds_downclock_avail = 1; 296 dev_priv->lvds_downclock = downclock * 10; 297 DRM_DEBUG_KMS("LVDS downclock is found in VBT. " 298 "Normal Clock %dKHz, downclock %dKHz\n", 299 panel_fixed_mode->clock, 10*downclock); 300 } 301 302 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data, 303 lvds_lfp_data_ptrs, 304 lvds_options->panel_type); 305 if (fp_timing) { 306 /* check the resolution, just to be sure */ 307 if (fp_timing->x_res == panel_fixed_mode->hdisplay && 308 fp_timing->y_res == panel_fixed_mode->vdisplay) { 309 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val; 310 DRM_DEBUG_KMS("VBT initial LVDS value %x\n", 311 dev_priv->vbt.bios_lvds_val); 312 } 313 } 314} 315 316static void 317parse_lfp_backlight(struct drm_i915_private *dev_priv, struct bdb_header *bdb) 318{ 319 const struct bdb_lfp_backlight_data *backlight_data; 320 const struct bdb_lfp_backlight_data_entry *entry; 321 322 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT); 323 if (!backlight_data) 324 return; 325 326 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { 327 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n", 328 backlight_data->entry_size); 329 return; 330 } 331 332 entry = &backlight_data->data[panel_type]; 333 334 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; 335 if (!dev_priv->vbt.backlight.present) { 336 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n", 337 entry->type); 338 return; 339 } 340 341 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; 342 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm; 343 dev_priv->vbt.backlight.min_brightness = entry->min_brightness; 344 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, " 345 "active %s, min brightness %u, level %u\n", 346 dev_priv->vbt.backlight.pwm_freq_hz, 347 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high", 348 dev_priv->vbt.backlight.min_brightness, 349 backlight_data->level[panel_type]); 350} 351 352/* Try to find sdvo panel data */ 353static void 354parse_sdvo_panel_data(struct drm_i915_private *dev_priv, 355 struct bdb_header *bdb) 356{ 357 struct lvds_dvo_timing *dvo_timing; 358 struct drm_display_mode *panel_fixed_mode; 359 int index; 360 361 index = i915.vbt_sdvo_panel_type; 362 if (index == -2) { 363 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n"); 364 return; 365 } 366 367 if (index == -1) { 368 struct bdb_sdvo_lvds_options *sdvo_lvds_options; 369 370 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS); 371 if (!sdvo_lvds_options) 372 return; 373 374 index = sdvo_lvds_options->panel_type; 375 } 376 377 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS); 378 if (!dvo_timing) 379 return; 380 381 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 382 if (!panel_fixed_mode) 383 return; 384 385 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index); 386 387 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; 388 389 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n"); 390 drm_mode_debug_printmodeline(panel_fixed_mode); 391} 392 393static int intel_bios_ssc_frequency(struct drm_device *dev, 394 bool alternate) 395{ 396 switch (INTEL_INFO(dev)->gen) { 397 case 2: 398 return alternate ? 66667 : 48000; 399 case 3: 400 case 4: 401 return alternate ? 100000 : 96000; 402 default: 403 return alternate ? 100000 : 120000; 404 } 405} 406 407static void 408parse_general_features(struct drm_i915_private *dev_priv, 409 struct bdb_header *bdb) 410{ 411 struct drm_device *dev = dev_priv->dev; 412 struct bdb_general_features *general; 413 414 general = find_section(bdb, BDB_GENERAL_FEATURES); 415 if (general) { 416 dev_priv->vbt.int_tv_support = general->int_tv_support; 417 dev_priv->vbt.int_crt_support = general->int_crt_support; 418 dev_priv->vbt.lvds_use_ssc = general->enable_ssc; 419 dev_priv->vbt.lvds_ssc_freq = 420 intel_bios_ssc_frequency(dev, general->ssc_freq); 421 dev_priv->vbt.display_clock_mode = general->display_clock_mode; 422 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; 423 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", 424 dev_priv->vbt.int_tv_support, 425 dev_priv->vbt.int_crt_support, 426 dev_priv->vbt.lvds_use_ssc, 427 dev_priv->vbt.lvds_ssc_freq, 428 dev_priv->vbt.display_clock_mode, 429 dev_priv->vbt.fdi_rx_polarity_inverted); 430 } 431} 432 433static void 434parse_general_definitions(struct drm_i915_private *dev_priv, 435 struct bdb_header *bdb) 436{ 437 struct bdb_general_definitions *general; 438 439 general = find_section(bdb, BDB_GENERAL_DEFINITIONS); 440 if (general) { 441 u16 block_size = get_blocksize(general); 442 if (block_size >= sizeof(*general)) { 443 int bus_pin = general->crt_ddc_gmbus_pin; 444 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin); 445 if (intel_gmbus_is_port_valid(bus_pin)) 446 dev_priv->vbt.crt_ddc_pin = bus_pin; 447 } else { 448 DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n", 449 block_size); 450 } 451 } 452} 453 454static void 455parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, 456 struct bdb_header *bdb) 457{ 458 struct sdvo_device_mapping *p_mapping; 459 struct bdb_general_definitions *p_defs; 460 union child_device_config *p_child; 461 int i, child_device_num, count; 462 u16 block_size; 463 464 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); 465 if (!p_defs) { 466 DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n"); 467 return; 468 } 469 /* judge whether the size of child device meets the requirements. 470 * If the child device size obtained from general definition block 471 * is different with sizeof(struct child_device_config), skip the 472 * parsing of sdvo device info 473 */ 474 if (p_defs->child_dev_size != sizeof(*p_child)) { 475 /* different child dev size . Ignore it */ 476 DRM_DEBUG_KMS("different child size is found. Invalid.\n"); 477 return; 478 } 479 /* get the block size of general definitions */ 480 block_size = get_blocksize(p_defs); 481 /* get the number of child device */ 482 child_device_num = (block_size - sizeof(*p_defs)) / 483 sizeof(*p_child); 484 count = 0; 485 for (i = 0; i < child_device_num; i++) { 486 p_child = &(p_defs->devices[i]); 487 if (!p_child->old.device_type) { 488 /* skip the device block if device type is invalid */ 489 continue; 490 } 491 if (p_child->old.slave_addr != SLAVE_ADDR1 && 492 p_child->old.slave_addr != SLAVE_ADDR2) { 493 /* 494 * If the slave address is neither 0x70 nor 0x72, 495 * it is not a SDVO device. Skip it. 496 */ 497 continue; 498 } 499 if (p_child->old.dvo_port != DEVICE_PORT_DVOB && 500 p_child->old.dvo_port != DEVICE_PORT_DVOC) { 501 /* skip the incorrect SDVO port */ 502 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n"); 503 continue; 504 } 505 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on" 506 " %s port\n", 507 p_child->old.slave_addr, 508 (p_child->old.dvo_port == DEVICE_PORT_DVOB) ? 509 "SDVOB" : "SDVOC"); 510 p_mapping = &(dev_priv->sdvo_mappings[p_child->old.dvo_port - 1]); 511 if (!p_mapping->initialized) { 512 p_mapping->dvo_port = p_child->old.dvo_port; 513 p_mapping->slave_addr = p_child->old.slave_addr; 514 p_mapping->dvo_wiring = p_child->old.dvo_wiring; 515 p_mapping->ddc_pin = p_child->old.ddc_pin; 516 p_mapping->i2c_pin = p_child->old.i2c_pin; 517 p_mapping->initialized = 1; 518 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", 519 p_mapping->dvo_port, 520 p_mapping->slave_addr, 521 p_mapping->dvo_wiring, 522 p_mapping->ddc_pin, 523 p_mapping->i2c_pin); 524 } else { 525 DRM_DEBUG_KMS("Maybe one SDVO port is shared by " 526 "two SDVO device.\n"); 527 } 528 if (p_child->old.slave2_addr) { 529 /* Maybe this is a SDVO device with multiple inputs */ 530 /* And the mapping info is not added */ 531 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this" 532 " is a SDVO device with multiple inputs.\n"); 533 } 534 count++; 535 } 536 537 if (!count) { 538 /* No SDVO device info is found */ 539 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n"); 540 } 541 return; 542} 543 544static void 545parse_driver_features(struct drm_i915_private *dev_priv, 546 struct bdb_header *bdb) 547{ 548 struct bdb_driver_features *driver; 549 550 driver = find_section(bdb, BDB_DRIVER_FEATURES); 551 if (!driver) 552 return; 553 554 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP) 555 dev_priv->vbt.edp_support = 1; 556 557 if (driver->dual_frequency) 558 dev_priv->render_reclock_avail = true; 559 560 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled); 561 /* 562 * If DRRS is not supported, drrs_type has to be set to 0. 563 * This is because, VBT is configured in such a way that 564 * static DRRS is 0 and DRRS not supported is represented by 565 * driver->drrs_enabled=false 566 */ 567 if (!driver->drrs_enabled) 568 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 569} 570 571static void 572parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb) 573{ 574 struct bdb_edp *edp; 575 struct edp_power_seq *edp_pps; 576 struct edp_link_params *edp_link_params; 577 578 edp = find_section(bdb, BDB_EDP); 579 if (!edp) { 580 if (dev_priv->vbt.edp_support) 581 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n"); 582 return; 583 } 584 585 switch ((edp->color_depth >> (panel_type * 2)) & 3) { 586 case EDP_18BPP: 587 dev_priv->vbt.edp_bpp = 18; 588 break; 589 case EDP_24BPP: 590 dev_priv->vbt.edp_bpp = 24; 591 break; 592 case EDP_30BPP: 593 dev_priv->vbt.edp_bpp = 30; 594 break; 595 } 596 597 /* Get the eDP sequencing and link info */ 598 edp_pps = &edp->power_seqs[panel_type]; 599 edp_link_params = &edp->link_params[panel_type]; 600 601 dev_priv->vbt.edp_pps = *edp_pps; 602 603 switch (edp_link_params->rate) { 604 case EDP_RATE_1_62: 605 dev_priv->vbt.edp_rate = DP_LINK_BW_1_62; 606 break; 607 case EDP_RATE_2_7: 608 dev_priv->vbt.edp_rate = DP_LINK_BW_2_7; 609 break; 610 default: 611 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n", 612 edp_link_params->rate); 613 break; 614 } 615 616 switch (edp_link_params->lanes) { 617 case EDP_LANE_1: 618 dev_priv->vbt.edp_lanes = 1; 619 break; 620 case EDP_LANE_2: 621 dev_priv->vbt.edp_lanes = 2; 622 break; 623 case EDP_LANE_4: 624 dev_priv->vbt.edp_lanes = 4; 625 break; 626 default: 627 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n", 628 edp_link_params->lanes); 629 break; 630 } 631 632 switch (edp_link_params->preemphasis) { 633 case EDP_PREEMPHASIS_NONE: 634 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; 635 break; 636 case EDP_PREEMPHASIS_3_5dB: 637 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; 638 break; 639 case EDP_PREEMPHASIS_6dB: 640 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; 641 break; 642 case EDP_PREEMPHASIS_9_5dB: 643 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; 644 break; 645 default: 646 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n", 647 edp_link_params->preemphasis); 648 break; 649 } 650 651 switch (edp_link_params->vswing) { 652 case EDP_VSWING_0_4V: 653 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; 654 break; 655 case EDP_VSWING_0_6V: 656 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; 657 break; 658 case EDP_VSWING_0_8V: 659 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; 660 break; 661 case EDP_VSWING_1_2V: 662 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; 663 break; 664 default: 665 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n", 666 edp_link_params->vswing); 667 break; 668 } 669 670 if (bdb->version >= 173) { 671 uint8_t vswing; 672 673 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; 674 dev_priv->vbt.edp_low_vswing = vswing == 0; 675 } 676} 677 678static void 679parse_psr(struct drm_i915_private *dev_priv, struct bdb_header *bdb) 680{ 681 struct bdb_psr *psr; 682 struct psr_table *psr_table; 683 684 psr = find_section(bdb, BDB_PSR); 685 if (!psr) { 686 DRM_DEBUG_KMS("No PSR BDB found.\n"); 687 return; 688 } 689 690 psr_table = &psr->psr_table[panel_type]; 691 692 dev_priv->vbt.psr.full_link = psr_table->full_link; 693 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; 694 695 /* Allowed VBT values goes from 0 to 15 */ 696 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 : 697 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames; 698 699 switch (psr_table->lines_to_wait) { 700 case 0: 701 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT; 702 break; 703 case 1: 704 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT; 705 break; 706 case 2: 707 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT; 708 break; 709 case 3: 710 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT; 711 break; 712 default: 713 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n", 714 psr_table->lines_to_wait); 715 break; 716 } 717 718 dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time; 719 dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time; 720} 721 722static u8 *goto_next_sequence(u8 *data, int *size) 723{ 724 u16 len; 725 int tmp = *size; 726 727 if (--tmp < 0) 728 return NULL; 729 730 /* goto first element */ 731 data++; 732 while (1) { 733 switch (*data) { 734 case MIPI_SEQ_ELEM_SEND_PKT: 735 /* 736 * skip by this element payload size 737 * skip elem id, command flag and data type 738 */ 739 tmp -= 5; 740 if (tmp < 0) 741 return NULL; 742 743 data += 3; 744 len = *((u16 *)data); 745 746 tmp -= len; 747 if (tmp < 0) 748 return NULL; 749 750 /* skip by len */ 751 data = data + 2 + len; 752 break; 753 case MIPI_SEQ_ELEM_DELAY: 754 /* skip by elem id, and delay is 4 bytes */ 755 tmp -= 5; 756 if (tmp < 0) 757 return NULL; 758 759 data += 5; 760 break; 761 case MIPI_SEQ_ELEM_GPIO: 762 tmp -= 3; 763 if (tmp < 0) 764 return NULL; 765 766 data += 3; 767 break; 768 default: 769 DRM_ERROR("Unknown element\n"); 770 return NULL; 771 } 772 773 /* end of sequence ? */ 774 if (*data == 0) 775 break; 776 } 777 778 /* goto next sequence or end of block byte */ 779 if (--tmp < 0) 780 return NULL; 781 782 data++; 783 784 /* update amount of data left for the sequence block to be parsed */ 785 *size = tmp; 786 return data; 787} 788 789static void 790parse_mipi(struct drm_i915_private *dev_priv, struct bdb_header *bdb) 791{ 792 struct bdb_mipi_config *start; 793 struct bdb_mipi_sequence *sequence; 794 struct mipi_config *config; 795 struct mipi_pps_data *pps; 796 u8 *data, *seq_data; 797 int i, panel_id, seq_size; 798 u16 block_size; 799 800 /* parse MIPI blocks only if LFP type is MIPI */ 801 if (!dev_priv->vbt.has_mipi) 802 return; 803 804 /* Initialize this to undefined indicating no generic MIPI support */ 805 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; 806 807 /* Block #40 is already parsed and panel_fixed_mode is 808 * stored in dev_priv->lfp_lvds_vbt_mode 809 * resuse this when needed 810 */ 811 812 /* Parse #52 for panel index used from panel_type already 813 * parsed 814 */ 815 start = find_section(bdb, BDB_MIPI_CONFIG); 816 if (!start) { 817 DRM_DEBUG_KMS("No MIPI config BDB found"); 818 return; 819 } 820 821 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n", 822 panel_type); 823 824 /* 825 * get hold of the correct configuration block and pps data as per 826 * the panel_type as index 827 */ 828 config = &start->config[panel_type]; 829 pps = &start->pps[panel_type]; 830 831 /* store as of now full data. Trim when we realise all is not needed */ 832 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); 833 if (!dev_priv->vbt.dsi.config) 834 return; 835 836 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); 837 if (!dev_priv->vbt.dsi.pps) { 838 kfree(dev_priv->vbt.dsi.config); 839 return; 840 } 841 842 /* We have mandatory mipi config blocks. Initialize as generic panel */ 843 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; 844 845 /* Check if we have sequence block as well */ 846 sequence = find_section(bdb, BDB_MIPI_SEQUENCE); 847 if (!sequence) { 848 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n"); 849 return; 850 } 851 852 /* Fail gracefully for forward incompatible sequence block. */ 853 if (sequence->version >= 3) { 854 DRM_ERROR("Unable to parse MIPI Sequence Block v3+\n"); 855 return; 856 } 857 858 DRM_DEBUG_DRIVER("Found MIPI sequence block\n"); 859 860 block_size = get_blocksize(sequence); 861 862 /* 863 * parse the sequence block for individual sequences 864 */ 865 dev_priv->vbt.dsi.seq_version = sequence->version; 866 867 seq_data = &sequence->data[0]; 868 869 /* 870 * sequence block is variable length and hence we need to parse and 871 * get the sequence data for specific panel id 872 */ 873 for (i = 0; i < MAX_MIPI_CONFIGURATIONS; i++) { 874 panel_id = *seq_data; 875 seq_size = *((u16 *) (seq_data + 1)); 876 if (panel_id == panel_type) 877 break; 878 879 /* skip the sequence including seq header of 3 bytes */ 880 seq_data = seq_data + 3 + seq_size; 881 if ((seq_data - &sequence->data[0]) > block_size) { 882 DRM_ERROR("Sequence start is beyond sequence block size, corrupted sequence block\n"); 883 return; 884 } 885 } 886 887 if (i == MAX_MIPI_CONFIGURATIONS) { 888 DRM_ERROR("Sequence block detected but no valid configuration\n"); 889 return; 890 } 891 892 /* check if found sequence is completely within the sequence block 893 * just being paranoid */ 894 if (seq_size > block_size) { 895 DRM_ERROR("Corrupted sequence/size, bailing out\n"); 896 return; 897 } 898 899 /* skip the panel id(1 byte) and seq size(2 bytes) */ 900 dev_priv->vbt.dsi.data = kmemdup(seq_data + 3, seq_size, GFP_KERNEL); 901 if (!dev_priv->vbt.dsi.data) 902 return; 903 904 /* 905 * loop into the sequence data and split into multiple sequneces 906 * There are only 5 types of sequences as of now 907 */ 908 data = dev_priv->vbt.dsi.data; 909 dev_priv->vbt.dsi.size = seq_size; 910 911 /* two consecutive 0x00 indicate end of all sequences */ 912 while (1) { 913 int seq_id = *data; 914 if (MIPI_SEQ_MAX > seq_id && seq_id > MIPI_SEQ_UNDEFINED) { 915 dev_priv->vbt.dsi.sequence[seq_id] = data; 916 DRM_DEBUG_DRIVER("Found mipi sequence - %d\n", seq_id); 917 } else { 918 DRM_ERROR("undefined sequence\n"); 919 goto err; 920 } 921 922 /* partial parsing to skip elements */ 923 data = goto_next_sequence(data, &seq_size); 924 925 if (data == NULL) { 926 DRM_ERROR("Sequence elements going beyond block itself. Sequence block parsing failed\n"); 927 goto err; 928 } 929 930 if (*data == 0) 931 break; /* end of sequence reached */ 932 } 933 934 DRM_DEBUG_DRIVER("MIPI related vbt parsing complete\n"); 935 return; 936err: 937 kfree(dev_priv->vbt.dsi.data); 938 dev_priv->vbt.dsi.data = NULL; 939 940 /* error during parsing so set all pointers to null 941 * because of partial parsing */ 942 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence)); 943} 944 945static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port, 946 struct bdb_header *bdb) 947{ 948 union child_device_config *it, *child = NULL; 949 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port]; 950 uint8_t hdmi_level_shift; 951 int i, j; 952 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt; 953 uint8_t aux_channel; 954 /* Each DDI port can have more than one value on the "DVO Port" field, 955 * so look for all the possible values for each port and abort if more 956 * than one is found. */ 957 int dvo_ports[][2] = { 958 {DVO_PORT_HDMIA, DVO_PORT_DPA}, 959 {DVO_PORT_HDMIB, DVO_PORT_DPB}, 960 {DVO_PORT_HDMIC, DVO_PORT_DPC}, 961 {DVO_PORT_HDMID, DVO_PORT_DPD}, 962 {DVO_PORT_CRT, -1 /* Port E can only be DVO_PORT_CRT */ }, 963 }; 964 965 /* Find the child device to use, abort if more than one found. */ 966 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { 967 it = dev_priv->vbt.child_dev + i; 968 969 for (j = 0; j < 2; j++) { 970 if (dvo_ports[port][j] == -1) 971 break; 972 973 if (it->common.dvo_port == dvo_ports[port][j]) { 974 if (child) { 975 DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n", 976 port_name(port)); 977 return; 978 } 979 child = it; 980 } 981 } 982 } 983 if (!child) 984 return; 985 986 aux_channel = child->raw[25]; 987 988 is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; 989 is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; 990 is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT; 991 is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; 992 is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR); 993 994 info->supports_dvi = is_dvi; 995 info->supports_hdmi = is_hdmi; 996 info->supports_dp = is_dp; 997 998 DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n", 999 port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt); 1000 1001 if (is_edp && is_dvi) 1002 DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n", 1003 port_name(port)); 1004 if (is_crt && port != PORT_E) 1005 DRM_DEBUG_KMS("Port %c is analog\n", port_name(port)); 1006 if (is_crt && (is_dvi || is_dp)) 1007 DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n", 1008 port_name(port)); 1009 if (is_dvi && (port == PORT_A || port == PORT_E)) 1010 DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port)); 1011 if (!is_dvi && !is_dp && !is_crt) 1012 DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n", 1013 port_name(port)); 1014 if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E)) 1015 DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port)); 1016 1017 if (is_dvi) { 1018 if (child->common.ddc_pin == 0x05 && port != PORT_B) 1019 DRM_DEBUG_KMS("Unexpected DDC pin for port B\n"); 1020 if (child->common.ddc_pin == 0x04 && port != PORT_C) 1021 DRM_DEBUG_KMS("Unexpected DDC pin for port C\n"); 1022 if (child->common.ddc_pin == 0x06 && port != PORT_D) 1023 DRM_DEBUG_KMS("Unexpected DDC pin for port D\n"); 1024 } 1025 1026 if (is_dp) { 1027 if (aux_channel == 0x40 && port != PORT_A) 1028 DRM_DEBUG_KMS("Unexpected AUX channel for port A\n"); 1029 if (aux_channel == 0x10 && port != PORT_B) 1030 DRM_DEBUG_KMS("Unexpected AUX channel for port B\n"); 1031 if (aux_channel == 0x20 && port != PORT_C) 1032 DRM_DEBUG_KMS("Unexpected AUX channel for port C\n"); 1033 if (aux_channel == 0x30 && port != PORT_D) 1034 DRM_DEBUG_KMS("Unexpected AUX channel for port D\n"); 1035 } 1036 1037 if (bdb->version >= 158) { 1038 /* The VBT HDMI level shift values match the table we have. */ 1039 hdmi_level_shift = child->raw[7] & 0xF; 1040 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n", 1041 port_name(port), 1042 hdmi_level_shift); 1043 info->hdmi_level_shift = hdmi_level_shift; 1044 } 1045} 1046 1047static void parse_ddi_ports(struct drm_i915_private *dev_priv, 1048 struct bdb_header *bdb) 1049{ 1050 struct drm_device *dev = dev_priv->dev; 1051 enum port port; 1052 1053 if (!HAS_DDI(dev)) 1054 return; 1055 1056 if (!dev_priv->vbt.child_dev_num) 1057 return; 1058 1059 if (bdb->version < 155) 1060 return; 1061 1062 for (port = PORT_A; port < I915_MAX_PORTS; port++) 1063 parse_ddi_port(dev_priv, port, bdb); 1064} 1065 1066static void 1067parse_device_mapping(struct drm_i915_private *dev_priv, 1068 struct bdb_header *bdb) 1069{ 1070 struct bdb_general_definitions *p_defs; 1071 union child_device_config *p_child, *child_dev_ptr; 1072 int i, child_device_num, count; 1073 u16 block_size; 1074 1075 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); 1076 if (!p_defs) { 1077 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n"); 1078 return; 1079 } 1080 /* judge whether the size of child device meets the requirements. 1081 * If the child device size obtained from general definition block 1082 * is different with sizeof(struct child_device_config), skip the 1083 * parsing of sdvo device info 1084 */ 1085 if (p_defs->child_dev_size != sizeof(*p_child)) { 1086 /* different child dev size . Ignore it */ 1087 DRM_DEBUG_KMS("different child size is found. Invalid.\n"); 1088 return; 1089 } 1090 /* get the block size of general definitions */ 1091 block_size = get_blocksize(p_defs); 1092 /* get the number of child device */ 1093 child_device_num = (block_size - sizeof(*p_defs)) / 1094 sizeof(*p_child); 1095 count = 0; 1096 /* get the number of child device that is present */ 1097 for (i = 0; i < child_device_num; i++) { 1098 p_child = &(p_defs->devices[i]); 1099 if (!p_child->common.device_type) { 1100 /* skip the device block if device type is invalid */ 1101 continue; 1102 } 1103 count++; 1104 } 1105 if (!count) { 1106 DRM_DEBUG_KMS("no child dev is parsed from VBT\n"); 1107 return; 1108 } 1109 dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL); 1110 if (!dev_priv->vbt.child_dev) { 1111 DRM_DEBUG_KMS("No memory space for child device\n"); 1112 return; 1113 } 1114 1115 dev_priv->vbt.child_dev_num = count; 1116 count = 0; 1117 for (i = 0; i < child_device_num; i++) { 1118 p_child = &(p_defs->devices[i]); 1119 if (!p_child->common.device_type) { 1120 /* skip the device block if device type is invalid */ 1121 continue; 1122 } 1123 1124 if (p_child->common.dvo_port >= DVO_PORT_MIPIA 1125 && p_child->common.dvo_port <= DVO_PORT_MIPID 1126 &&p_child->common.device_type & DEVICE_TYPE_MIPI_OUTPUT) { 1127 DRM_DEBUG_KMS("Found MIPI as LFP\n"); 1128 dev_priv->vbt.has_mipi = 1; 1129 dev_priv->vbt.dsi.port = p_child->common.dvo_port; 1130 } 1131 1132 child_dev_ptr = dev_priv->vbt.child_dev + count; 1133 count++; 1134 memcpy((void *)child_dev_ptr, (void *)p_child, 1135 sizeof(*p_child)); 1136 } 1137 return; 1138} 1139 1140static void 1141init_vbt_defaults(struct drm_i915_private *dev_priv) 1142{ 1143 struct drm_device *dev = dev_priv->dev; 1144 enum port port; 1145 1146 dev_priv->vbt.crt_ddc_pin = GMBUS_PORT_VGADDC; 1147 1148 /* Default to having backlight */ 1149 dev_priv->vbt.backlight.present = true; 1150 1151 /* LFP panel data */ 1152 dev_priv->vbt.lvds_dither = 1; 1153 dev_priv->vbt.lvds_vbt = 0; 1154 1155 /* SDVO panel data */ 1156 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL; 1157 1158 /* general features */ 1159 dev_priv->vbt.int_tv_support = 1; 1160 dev_priv->vbt.int_crt_support = 1; 1161 1162 /* Default to using SSC */ 1163 dev_priv->vbt.lvds_use_ssc = 1; 1164 /* 1165 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference 1166 * clock for LVDS. 1167 */ 1168 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev, 1169 !HAS_PCH_SPLIT(dev)); 1170 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq); 1171 1172 for (port = PORT_A; port < I915_MAX_PORTS; port++) { 1173 struct ddi_vbt_port_info *info = 1174 &dev_priv->vbt.ddi_port_info[port]; 1175 1176 info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN; 1177 1178 info->supports_dvi = (port != PORT_A && port != PORT_E); 1179 info->supports_hdmi = info->supports_dvi; 1180 info->supports_dp = (port != PORT_E); 1181 } 1182} 1183 1184static int intel_no_opregion_vbt_callback(const struct dmi_system_id *id) 1185{ 1186 DRM_DEBUG_KMS("Falling back to manually reading VBT from " 1187 "VBIOS ROM for %s\n", 1188 id->ident); 1189 return 1; 1190} 1191 1192static const struct dmi_system_id intel_no_opregion_vbt[] = { 1193 { 1194 .callback = intel_no_opregion_vbt_callback, 1195 .ident = "ThinkCentre A57", 1196 .matches = { 1197 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 1198 DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"), 1199 }, 1200 }, 1201 { } 1202}; 1203 1204static struct bdb_header *validate_vbt(char *base, size_t size, 1205 struct vbt_header *vbt, 1206 const char *source) 1207{ 1208 size_t offset; 1209 struct bdb_header *bdb; 1210 1211 if (vbt == NULL) { 1212 DRM_DEBUG_DRIVER("VBT signature missing\n"); 1213 return NULL; 1214 } 1215 1216 offset = (char *)vbt - base; 1217 if (offset + sizeof(struct vbt_header) > size) { 1218 DRM_DEBUG_DRIVER("VBT header incomplete\n"); 1219 return NULL; 1220 } 1221 1222 if (memcmp(vbt->signature, "$VBT", 4)) { 1223 DRM_DEBUG_DRIVER("VBT invalid signature\n"); 1224 return NULL; 1225 } 1226 1227 offset += vbt->bdb_offset; 1228 if (offset + sizeof(struct bdb_header) > size) { 1229 DRM_DEBUG_DRIVER("BDB header incomplete\n"); 1230 return NULL; 1231 } 1232 1233 bdb = (struct bdb_header *)(base + offset); 1234 if (offset + bdb->bdb_size > size) { 1235 DRM_DEBUG_DRIVER("BDB incomplete\n"); 1236 return NULL; 1237 } 1238 1239 DRM_DEBUG_KMS("Using VBT from %s: %20s\n", 1240 source, vbt->signature); 1241 return bdb; 1242} 1243 1244/** 1245 * intel_parse_bios - find VBT and initialize settings from the BIOS 1246 * @dev: DRM device 1247 * 1248 * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers 1249 * to appropriate values. 1250 * 1251 * Returns 0 on success, nonzero on failure. 1252 */ 1253int 1254intel_parse_bios(struct drm_device *dev) 1255{ 1256 struct drm_i915_private *dev_priv = dev->dev_private; 1257 struct pci_dev *pdev = dev->pdev; 1258 struct bdb_header *bdb = NULL; 1259 u8 __iomem *bios = NULL; 1260 1261 if (HAS_PCH_NOP(dev)) 1262 return -ENODEV; 1263 1264 init_vbt_defaults(dev_priv); 1265 1266 /* XXX Should this validation be moved to intel_opregion.c? */ 1267 if (!dmi_check_system(intel_no_opregion_vbt) && dev_priv->opregion.vbt) 1268 bdb = validate_vbt((char *)dev_priv->opregion.header, OPREGION_SIZE, 1269 (struct vbt_header *)dev_priv->opregion.vbt, 1270 "OpRegion"); 1271 1272 if (bdb == NULL) { 1273 size_t i, size; 1274 1275 bios = pci_map_rom(pdev, &size); 1276 if (!bios) 1277 return -1; 1278 1279 /* Scour memory looking for the VBT signature */ 1280 for (i = 0; i + 4 < size; i++) { 1281 if (memcmp(bios + i, "$VBT", 4) == 0) { 1282 bdb = validate_vbt(bios, size, 1283 (struct vbt_header *)(bios + i), 1284 "PCI ROM"); 1285 break; 1286 } 1287 } 1288 1289 if (!bdb) { 1290 pci_unmap_rom(pdev, bios); 1291 return -1; 1292 } 1293 } 1294 1295 /* Grab useful general definitions */ 1296 parse_general_features(dev_priv, bdb); 1297 parse_general_definitions(dev_priv, bdb); 1298 parse_lfp_panel_data(dev_priv, bdb); 1299 parse_lfp_backlight(dev_priv, bdb); 1300 parse_sdvo_panel_data(dev_priv, bdb); 1301 parse_sdvo_device_mapping(dev_priv, bdb); 1302 parse_device_mapping(dev_priv, bdb); 1303 parse_driver_features(dev_priv, bdb); 1304 parse_edp(dev_priv, bdb); 1305 parse_psr(dev_priv, bdb); 1306 parse_mipi(dev_priv, bdb); 1307 parse_ddi_ports(dev_priv, bdb); 1308 1309 if (bios) 1310 pci_unmap_rom(pdev, bios); 1311 1312 return 0; 1313} 1314 1315/* Ensure that vital registers have been initialised, even if the BIOS 1316 * is absent or just failing to do its job. 1317 */ 1318void intel_setup_bios(struct drm_device *dev) 1319{ 1320 struct drm_i915_private *dev_priv = dev->dev_private; 1321 1322 /* Set the Panel Power On/Off timings if uninitialized. */ 1323 if (!HAS_PCH_SPLIT(dev) && 1324 I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) { 1325 /* Set T2 to 40ms and T5 to 200ms */ 1326 I915_WRITE(PP_ON_DELAYS, 0x019007d0); 1327 1328 /* Set T3 to 35ms and Tx to 200ms */ 1329 I915_WRITE(PP_OFF_DELAYS, 0x015e07d0); 1330 } 1331} 1332