1/* 2 * Copyright © 2008 Intel Corporation 3 * 2014 Red Hat Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 22 * IN THE SOFTWARE. 23 * 24 */ 25 26#include <drm/drmP.h> 27#include "i915_drv.h" 28#include "intel_drv.h" 29#include <drm/drm_atomic_helper.h> 30#include <drm/drm_crtc_helper.h> 31#include <drm/drm_edid.h> 32 33static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, 34 struct intel_crtc_state *pipe_config) 35{ 36 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); 37 struct intel_digital_port *intel_dig_port = intel_mst->primary; 38 struct intel_dp *intel_dp = &intel_dig_port->dp; 39 struct drm_atomic_state *state; 40 int bpp, i; 41 int lane_count, slots, rate; 42 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 43 struct intel_connector *found = NULL; 44 int mst_pbn; 45 46 pipe_config->dp_encoder_is_mst = true; 47 pipe_config->has_pch_encoder = false; 48 pipe_config->has_dp_encoder = true; 49 bpp = 24; 50 /* 51 * for MST we always configure max link bw - the spec doesn't 52 * seem to suggest we should do otherwise. 53 */ 54 lane_count = drm_dp_max_lane_count(intel_dp->dpcd); 55 56 rate = intel_dp_max_link_rate(intel_dp); 57 58 if (intel_dp->num_sink_rates) { 59 intel_dp->link_bw = 0; 60 intel_dp->rate_select = intel_dp_rate_select(intel_dp, rate); 61 } else { 62 intel_dp->link_bw = drm_dp_link_rate_to_bw_code(rate); 63 intel_dp->rate_select = 0; 64 } 65 66 intel_dp->lane_count = lane_count; 67 68 pipe_config->pipe_bpp = 24; 69 pipe_config->port_clock = rate; 70 71 state = pipe_config->base.state; 72 73 for (i = 0; i < state->num_connector; i++) { 74 if (!state->connectors[i]) 75 continue; 76 77 if (state->connector_states[i]->best_encoder == &encoder->base) { 78 found = to_intel_connector(state->connectors[i]); 79 break; 80 } 81 } 82 83 if (!found) { 84 DRM_ERROR("can't find connector\n"); 85 return false; 86 } 87 88 mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp); 89 90 pipe_config->pbn = mst_pbn; 91 slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn); 92 93 intel_link_compute_m_n(bpp, lane_count, 94 adjusted_mode->crtc_clock, 95 pipe_config->port_clock, 96 &pipe_config->dp_m_n); 97 98 pipe_config->dp_m_n.tu = slots; 99 return true; 100 101} 102 103static void intel_mst_disable_dp(struct intel_encoder *encoder) 104{ 105 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); 106 struct intel_digital_port *intel_dig_port = intel_mst->primary; 107 struct intel_dp *intel_dp = &intel_dig_port->dp; 108 int ret; 109 110 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); 111 112 drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port); 113 114 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); 115 if (ret) { 116 DRM_ERROR("failed to update payload %d\n", ret); 117 } 118} 119 120static void intel_mst_post_disable_dp(struct intel_encoder *encoder) 121{ 122 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); 123 struct intel_digital_port *intel_dig_port = intel_mst->primary; 124 struct intel_dp *intel_dp = &intel_dig_port->dp; 125 126 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); 127 128 /* this can fail */ 129 drm_dp_check_act_status(&intel_dp->mst_mgr); 130 /* and this can also fail */ 131 drm_dp_update_payload_part2(&intel_dp->mst_mgr); 132 133 drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port); 134 135 intel_dp->active_mst_links--; 136 intel_mst->port = NULL; 137 if (intel_dp->active_mst_links == 0) { 138 intel_dig_port->base.post_disable(&intel_dig_port->base); 139 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); 140 } 141} 142 143static void intel_mst_pre_enable_dp(struct intel_encoder *encoder) 144{ 145 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); 146 struct intel_digital_port *intel_dig_port = intel_mst->primary; 147 struct intel_dp *intel_dp = &intel_dig_port->dp; 148 struct drm_device *dev = encoder->base.dev; 149 struct drm_i915_private *dev_priv = dev->dev_private; 150 enum port port = intel_dig_port->port; 151 int ret; 152 uint32_t temp; 153 struct intel_connector *found = NULL, *intel_connector; 154 int slots; 155 struct drm_crtc *crtc = encoder->base.crtc; 156 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 157 158 for_each_intel_connector(dev, intel_connector) { 159 if (intel_connector->new_encoder == encoder) { 160 found = intel_connector; 161 break; 162 } 163 } 164 165 if (!found) { 166 DRM_ERROR("can't find connector\n"); 167 return; 168 } 169 170 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); 171 intel_mst->port = found->port; 172 173 if (intel_dp->active_mst_links == 0) { 174 enum port port = intel_ddi_get_encoder_port(encoder); 175 176 I915_WRITE(PORT_CLK_SEL(port), 177 intel_crtc->config->ddi_pll_sel); 178 179 intel_ddi_init_dp_buf_reg(&intel_dig_port->base); 180 181 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); 182 183 184 intel_dp_start_link_train(intel_dp); 185 intel_dp_complete_link_train(intel_dp); 186 intel_dp_stop_link_train(intel_dp); 187 } 188 189 ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr, 190 intel_mst->port, 191 intel_crtc->config->pbn, &slots); 192 if (ret == false) { 193 DRM_ERROR("failed to allocate vcpi\n"); 194 return; 195 } 196 197 198 intel_dp->active_mst_links++; 199 temp = I915_READ(DP_TP_STATUS(port)); 200 I915_WRITE(DP_TP_STATUS(port), temp); 201 202 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); 203} 204 205static void intel_mst_enable_dp(struct intel_encoder *encoder) 206{ 207 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); 208 struct intel_digital_port *intel_dig_port = intel_mst->primary; 209 struct intel_dp *intel_dp = &intel_dig_port->dp; 210 struct drm_device *dev = intel_dig_port->base.base.dev; 211 struct drm_i915_private *dev_priv = dev->dev_private; 212 enum port port = intel_dig_port->port; 213 int ret; 214 215 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); 216 217 if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT), 218 1)) 219 DRM_ERROR("Timed out waiting for ACT sent\n"); 220 221 ret = drm_dp_check_act_status(&intel_dp->mst_mgr); 222 223 ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr); 224} 225 226static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder, 227 enum pipe *pipe) 228{ 229 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); 230 *pipe = intel_mst->pipe; 231 if (intel_mst->port) 232 return true; 233 return false; 234} 235 236static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder, 237 struct intel_crtc_state *pipe_config) 238{ 239 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); 240 struct intel_digital_port *intel_dig_port = intel_mst->primary; 241 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); 242 struct drm_device *dev = encoder->base.dev; 243 struct drm_i915_private *dev_priv = dev->dev_private; 244 enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; 245 u32 temp, flags = 0; 246 247 pipe_config->has_dp_encoder = true; 248 249 temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder)); 250 if (temp & TRANS_DDI_PHSYNC) 251 flags |= DRM_MODE_FLAG_PHSYNC; 252 else 253 flags |= DRM_MODE_FLAG_NHSYNC; 254 if (temp & TRANS_DDI_PVSYNC) 255 flags |= DRM_MODE_FLAG_PVSYNC; 256 else 257 flags |= DRM_MODE_FLAG_NVSYNC; 258 259 switch (temp & TRANS_DDI_BPC_MASK) { 260 case TRANS_DDI_BPC_6: 261 pipe_config->pipe_bpp = 18; 262 break; 263 case TRANS_DDI_BPC_8: 264 pipe_config->pipe_bpp = 24; 265 break; 266 case TRANS_DDI_BPC_10: 267 pipe_config->pipe_bpp = 30; 268 break; 269 case TRANS_DDI_BPC_12: 270 pipe_config->pipe_bpp = 36; 271 break; 272 default: 273 break; 274 } 275 pipe_config->base.adjusted_mode.flags |= flags; 276 intel_dp_get_m_n(crtc, pipe_config); 277 278 intel_ddi_clock_get(&intel_dig_port->base, pipe_config); 279} 280 281static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector) 282{ 283 struct intel_connector *intel_connector = to_intel_connector(connector); 284 struct intel_dp *intel_dp = intel_connector->mst_port; 285 struct edid *edid; 286 int ret; 287 288 edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port); 289 if (!edid) 290 return 0; 291 292 ret = intel_connector_update_modes(connector, edid); 293 kfree(edid); 294 295 return ret; 296} 297 298static enum drm_connector_status 299intel_dp_mst_detect(struct drm_connector *connector, bool force) 300{ 301 struct intel_connector *intel_connector = to_intel_connector(connector); 302 struct intel_dp *intel_dp = intel_connector->mst_port; 303 304 return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port); 305} 306 307static int 308intel_dp_mst_set_property(struct drm_connector *connector, 309 struct drm_property *property, 310 uint64_t val) 311{ 312 return 0; 313} 314 315static void 316intel_dp_mst_connector_destroy(struct drm_connector *connector) 317{ 318 struct intel_connector *intel_connector = to_intel_connector(connector); 319 320 if (!IS_ERR_OR_NULL(intel_connector->edid)) 321 kfree(intel_connector->edid); 322 323 drm_connector_cleanup(connector); 324 kfree(connector); 325} 326 327static const struct drm_connector_funcs intel_dp_mst_connector_funcs = { 328 .dpms = intel_connector_dpms, 329 .detect = intel_dp_mst_detect, 330 .fill_modes = drm_helper_probe_single_connector_modes, 331 .set_property = intel_dp_mst_set_property, 332 .atomic_get_property = intel_connector_atomic_get_property, 333 .destroy = intel_dp_mst_connector_destroy, 334 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 335 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 336}; 337 338static int intel_dp_mst_get_modes(struct drm_connector *connector) 339{ 340 return intel_dp_mst_get_ddc_modes(connector); 341} 342 343static enum drm_mode_status 344intel_dp_mst_mode_valid(struct drm_connector *connector, 345 struct drm_display_mode *mode) 346{ 347 /* TODO - validate mode against available PBN for link */ 348 if (mode->clock < 10000) 349 return MODE_CLOCK_LOW; 350 351 if (mode->flags & DRM_MODE_FLAG_DBLCLK) 352 return MODE_H_ILLEGAL; 353 354 return MODE_OK; 355} 356 357static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector) 358{ 359 struct intel_connector *intel_connector = to_intel_connector(connector); 360 struct intel_dp *intel_dp = intel_connector->mst_port; 361 return &intel_dp->mst_encoders[0]->base.base; 362} 363 364static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = { 365 .get_modes = intel_dp_mst_get_modes, 366 .mode_valid = intel_dp_mst_mode_valid, 367 .best_encoder = intel_mst_best_encoder, 368}; 369 370static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder) 371{ 372 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 373 374 drm_encoder_cleanup(encoder); 375 kfree(intel_mst); 376} 377 378static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = { 379 .destroy = intel_dp_mst_encoder_destroy, 380}; 381 382static bool intel_dp_mst_get_hw_state(struct intel_connector *connector) 383{ 384 if (connector->encoder) { 385 enum pipe pipe; 386 if (!connector->encoder->get_hw_state(connector->encoder, &pipe)) 387 return false; 388 return true; 389 } 390 return false; 391} 392 393static void intel_connector_add_to_fbdev(struct intel_connector *connector) 394{ 395#ifdef CONFIG_DRM_I915_FBDEV 396 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 397 drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base); 398#endif 399} 400 401static void intel_connector_remove_from_fbdev(struct intel_connector *connector) 402{ 403#ifdef CONFIG_DRM_I915_FBDEV 404 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 405 drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base); 406#endif 407} 408 409static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop) 410{ 411 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); 412 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); 413 struct drm_device *dev = intel_dig_port->base.base.dev; 414 struct intel_connector *intel_connector; 415 struct drm_connector *connector; 416 int i; 417 418 intel_connector = intel_connector_alloc(); 419 if (!intel_connector) 420 return NULL; 421 422 connector = &intel_connector->base; 423 drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort); 424 drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs); 425 426 intel_connector->unregister = intel_connector_unregister; 427 intel_connector->get_hw_state = intel_dp_mst_get_hw_state; 428 intel_connector->mst_port = intel_dp; 429 intel_connector->port = port; 430 431 for (i = PIPE_A; i <= PIPE_C; i++) { 432 drm_mode_connector_attach_encoder(&intel_connector->base, 433 &intel_dp->mst_encoders[i]->base.base); 434 } 435 intel_dp_add_properties(intel_dp, connector); 436 437 drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0); 438 drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0); 439 440 drm_mode_connector_set_path_property(connector, pathprop); 441 drm_reinit_primary_mode_group(dev); 442 drm_modeset_lock_all(dev); 443 intel_connector_add_to_fbdev(intel_connector); 444 drm_modeset_unlock_all(dev); 445 drm_connector_register(&intel_connector->base); 446 return connector; 447} 448 449static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr, 450 struct drm_connector *connector) 451{ 452 struct intel_connector *intel_connector = to_intel_connector(connector); 453 struct drm_device *dev = connector->dev; 454 455 intel_connector->unregister(intel_connector); 456 457 /* need to nuke the connector */ 458 drm_modeset_lock_all(dev); 459 if (connector->state->crtc) { 460 struct drm_mode_set set; 461 int ret; 462 463 memset(&set, 0, sizeof(set)); 464 set.crtc = connector->state->crtc, 465 466 ret = drm_atomic_helper_set_config(&set); 467 468 WARN(ret, "Disabling mst crtc failed with %i\n", ret); 469 } 470 471 intel_connector_remove_from_fbdev(intel_connector); 472 drm_connector_cleanup(connector); 473 drm_modeset_unlock_all(dev); 474 475 drm_reinit_primary_mode_group(dev); 476 477 kfree(intel_connector); 478 DRM_DEBUG_KMS("\n"); 479} 480 481static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr) 482{ 483 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); 484 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); 485 struct drm_device *dev = intel_dig_port->base.base.dev; 486 487 drm_kms_helper_hotplug_event(dev); 488} 489 490static struct drm_dp_mst_topology_cbs mst_cbs = { 491 .add_connector = intel_dp_add_mst_connector, 492 .destroy_connector = intel_dp_destroy_mst_connector, 493 .hotplug = intel_dp_mst_hotplug, 494}; 495 496static struct intel_dp_mst_encoder * 497intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe) 498{ 499 struct intel_dp_mst_encoder *intel_mst; 500 struct intel_encoder *intel_encoder; 501 struct drm_device *dev = intel_dig_port->base.base.dev; 502 503 intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL); 504 505 if (!intel_mst) 506 return NULL; 507 508 intel_mst->pipe = pipe; 509 intel_encoder = &intel_mst->base; 510 intel_mst->primary = intel_dig_port; 511 512 drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs, 513 DRM_MODE_ENCODER_DPMST); 514 515 intel_encoder->type = INTEL_OUTPUT_DP_MST; 516 intel_encoder->crtc_mask = 0x7; 517 intel_encoder->cloneable = 0; 518 519 intel_encoder->compute_config = intel_dp_mst_compute_config; 520 intel_encoder->disable = intel_mst_disable_dp; 521 intel_encoder->post_disable = intel_mst_post_disable_dp; 522 intel_encoder->pre_enable = intel_mst_pre_enable_dp; 523 intel_encoder->enable = intel_mst_enable_dp; 524 intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state; 525 intel_encoder->get_config = intel_dp_mst_enc_get_config; 526 527 return intel_mst; 528 529} 530 531static bool 532intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port) 533{ 534 int i; 535 struct intel_dp *intel_dp = &intel_dig_port->dp; 536 537 for (i = PIPE_A; i <= PIPE_C; i++) 538 intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i); 539 return true; 540} 541 542int 543intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id) 544{ 545 struct intel_dp *intel_dp = &intel_dig_port->dp; 546 struct drm_device *dev = intel_dig_port->base.base.dev; 547 int ret; 548 549 intel_dp->can_mst = true; 550 intel_dp->mst_mgr.cbs = &mst_cbs; 551 552 /* create encoders */ 553 intel_dp_create_fake_mst_encoders(intel_dig_port); 554 ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id); 555 if (ret) { 556 intel_dp->can_mst = false; 557 return ret; 558 } 559 return 0; 560} 561 562void 563intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port) 564{ 565 struct intel_dp *intel_dp = &intel_dig_port->dp; 566 567 if (!intel_dp->can_mst) 568 return; 569 570 drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr); 571 /* encoders will get killed by normal cleanup */ 572} 573