1#ifndef __IPUV3_PLANE_H__
2#define __IPUV3_PLANE_H__
3
4#include <drm/drm_crtc.h> /* drm_plane */
5
6struct drm_plane;
7struct drm_device;
8struct ipu_soc;
9struct drm_crtc;
10struct drm_framebuffer;
11
12struct ipuv3_channel;
13struct dmfc_channel;
14struct ipu_dp;
15
16struct ipu_plane {
17	struct drm_plane	base;
18
19	struct ipu_soc		*ipu;
20	struct ipuv3_channel	*ipu_ch;
21	struct dmfc_channel	*dmfc;
22	struct ipu_dp		*dp;
23
24	int			dma;
25	int			dp_flow;
26
27	int			x;
28	int			y;
29	int			w;
30	int			h;
31
32	bool			enabled;
33};
34
35struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
36				 int dma, int dp, unsigned int possible_crtcs,
37				 bool priv);
38
39/* Init IDMAC, DMFC, DP */
40int ipu_plane_mode_set(struct ipu_plane *plane, struct drm_crtc *crtc,
41		       struct drm_display_mode *mode,
42		       struct drm_framebuffer *fb, int crtc_x, int crtc_y,
43		       unsigned int crtc_w, unsigned int crtc_h,
44		       uint32_t src_x, uint32_t src_y, uint32_t src_w,
45		       uint32_t src_h, bool interlaced);
46
47void ipu_plane_enable(struct ipu_plane *plane);
48void ipu_plane_disable(struct ipu_plane *plane);
49int ipu_plane_set_base(struct ipu_plane *plane, struct drm_framebuffer *fb,
50		       int x, int y);
51
52int ipu_plane_get_resources(struct ipu_plane *plane);
53void ipu_plane_put_resources(struct ipu_plane *plane);
54
55int ipu_plane_irq(struct ipu_plane *plane);
56
57#endif
58