1 2#include <drm/drmP.h> 3#include <drm/drm_dp_mst_helper.h> 4#include <drm/drm_fb_helper.h> 5 6#include "radeon.h" 7#include "atom.h" 8#include "ni_reg.h" 9 10static struct radeon_encoder *radeon_dp_create_fake_mst_encoder(struct radeon_connector *connector); 11 12static int radeon_atom_set_enc_offset(int id) 13{ 14 static const int offsets[] = { EVERGREEN_CRTC0_REGISTER_OFFSET, 15 EVERGREEN_CRTC1_REGISTER_OFFSET, 16 EVERGREEN_CRTC2_REGISTER_OFFSET, 17 EVERGREEN_CRTC3_REGISTER_OFFSET, 18 EVERGREEN_CRTC4_REGISTER_OFFSET, 19 EVERGREEN_CRTC5_REGISTER_OFFSET, 20 0x13830 - 0x7030 }; 21 22 return offsets[id]; 23} 24 25static int radeon_dp_mst_set_be_cntl(struct radeon_encoder *primary, 26 struct radeon_encoder_mst *mst_enc, 27 enum radeon_hpd_id hpd, bool enable) 28{ 29 struct drm_device *dev = primary->base.dev; 30 struct radeon_device *rdev = dev->dev_private; 31 uint32_t reg; 32 int retries = 0; 33 uint32_t temp; 34 35 reg = RREG32(NI_DIG_BE_CNTL + primary->offset); 36 37 /* set MST mode */ 38 reg &= ~NI_DIG_FE_DIG_MODE(7); 39 reg |= NI_DIG_FE_DIG_MODE(NI_DIG_MODE_DP_MST); 40 41 if (enable) 42 reg |= NI_DIG_FE_SOURCE_SELECT(1 << mst_enc->fe); 43 else 44 reg &= ~NI_DIG_FE_SOURCE_SELECT(1 << mst_enc->fe); 45 46 reg |= NI_DIG_HPD_SELECT(hpd); 47 DRM_DEBUG_KMS("writing 0x%08x 0x%08x\n", NI_DIG_BE_CNTL + primary->offset, reg); 48 WREG32(NI_DIG_BE_CNTL + primary->offset, reg); 49 50 if (enable) { 51 uint32_t offset = radeon_atom_set_enc_offset(mst_enc->fe); 52 53 do { 54 temp = RREG32(NI_DIG_FE_CNTL + offset); 55 } while ((temp & NI_DIG_SYMCLK_FE_ON) && retries++ < 10000); 56 if (retries == 10000) 57 DRM_ERROR("timed out waiting for FE %d %d\n", primary->offset, mst_enc->fe); 58 } 59 return 0; 60} 61 62static int radeon_dp_mst_set_stream_attrib(struct radeon_encoder *primary, 63 int stream_number, 64 int fe, 65 int slots) 66{ 67 struct drm_device *dev = primary->base.dev; 68 struct radeon_device *rdev = dev->dev_private; 69 u32 temp, val; 70 int retries = 0; 71 int satreg, satidx; 72 73 satreg = stream_number >> 1; 74 satidx = stream_number & 1; 75 76 temp = RREG32(NI_DP_MSE_SAT0 + satreg + primary->offset); 77 78 val = NI_DP_MSE_SAT_SLOT_COUNT0(slots) | NI_DP_MSE_SAT_SRC0(fe); 79 80 val <<= (16 * satidx); 81 82 temp &= ~(0xffff << (16 * satidx)); 83 84 temp |= val; 85 86 DRM_DEBUG_KMS("writing 0x%08x 0x%08x\n", NI_DP_MSE_SAT0 + satreg + primary->offset, temp); 87 WREG32(NI_DP_MSE_SAT0 + satreg + primary->offset, temp); 88 89 WREG32(NI_DP_MSE_SAT_UPDATE + primary->offset, 1); 90 91 do { 92 temp = RREG32(NI_DP_MSE_SAT_UPDATE + primary->offset); 93 } while ((temp & 0x1) && retries++ < 10000); 94 95 if (retries == 10000) 96 DRM_ERROR("timed out waitin for SAT update %d\n", primary->offset); 97 98 /* MTP 16 ? */ 99 return 0; 100} 101 102static int radeon_dp_mst_update_stream_attribs(struct radeon_connector *mst_conn, 103 struct radeon_encoder *primary) 104{ 105 struct drm_device *dev = mst_conn->base.dev; 106 struct stream_attribs new_attribs[6]; 107 int i; 108 int idx = 0; 109 struct radeon_connector *radeon_connector; 110 struct drm_connector *connector; 111 112 memset(new_attribs, 0, sizeof(new_attribs)); 113 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 114 struct radeon_encoder *subenc; 115 struct radeon_encoder_mst *mst_enc; 116 117 radeon_connector = to_radeon_connector(connector); 118 if (!radeon_connector->is_mst_connector) 119 continue; 120 121 if (radeon_connector->mst_port != mst_conn) 122 continue; 123 124 subenc = radeon_connector->mst_encoder; 125 mst_enc = subenc->enc_priv; 126 127 if (!mst_enc->enc_active) 128 continue; 129 130 new_attribs[idx].fe = mst_enc->fe; 131 new_attribs[idx].slots = drm_dp_mst_get_vcpi_slots(&mst_conn->mst_mgr, mst_enc->port); 132 idx++; 133 } 134 135 for (i = 0; i < idx; i++) { 136 if (new_attribs[i].fe != mst_conn->cur_stream_attribs[i].fe || 137 new_attribs[i].slots != mst_conn->cur_stream_attribs[i].slots) { 138 radeon_dp_mst_set_stream_attrib(primary, i, new_attribs[i].fe, new_attribs[i].slots); 139 mst_conn->cur_stream_attribs[i].fe = new_attribs[i].fe; 140 mst_conn->cur_stream_attribs[i].slots = new_attribs[i].slots; 141 } 142 } 143 144 for (i = idx; i < mst_conn->enabled_attribs; i++) { 145 radeon_dp_mst_set_stream_attrib(primary, i, 0, 0); 146 mst_conn->cur_stream_attribs[i].fe = 0; 147 mst_conn->cur_stream_attribs[i].slots = 0; 148 } 149 mst_conn->enabled_attribs = idx; 150 return 0; 151} 152 153static int radeon_dp_mst_set_vcp_size(struct radeon_encoder *mst, uint32_t x, uint32_t y) 154{ 155 struct drm_device *dev = mst->base.dev; 156 struct radeon_device *rdev = dev->dev_private; 157 struct radeon_encoder_mst *mst_enc = mst->enc_priv; 158 uint32_t val, temp; 159 uint32_t offset = radeon_atom_set_enc_offset(mst_enc->fe); 160 int retries = 0; 161 162 val = NI_DP_MSE_RATE_X(x) | NI_DP_MSE_RATE_Y(y); 163 164 WREG32(NI_DP_MSE_RATE_CNTL + offset, val); 165 166 do { 167 temp = RREG32(NI_DP_MSE_RATE_UPDATE + offset); 168 } while ((temp & 0x1) && (retries++ < 10000)); 169 170 if (retries >= 10000) 171 DRM_ERROR("timed out wait for rate cntl %d\n", mst_enc->fe); 172 return 0; 173} 174 175static int radeon_dp_mst_get_ddc_modes(struct drm_connector *connector) 176{ 177 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 178 struct radeon_connector *master = radeon_connector->mst_port; 179 struct edid *edid; 180 int ret = 0; 181 182 edid = drm_dp_mst_get_edid(connector, &master->mst_mgr, radeon_connector->port); 183 radeon_connector->edid = edid; 184 DRM_DEBUG_KMS("edid retrieved %p\n", edid); 185 if (radeon_connector->edid) { 186 drm_mode_connector_update_edid_property(&radeon_connector->base, radeon_connector->edid); 187 ret = drm_add_edid_modes(&radeon_connector->base, radeon_connector->edid); 188 drm_edid_to_eld(&radeon_connector->base, radeon_connector->edid); 189 return ret; 190 } 191 drm_mode_connector_update_edid_property(&radeon_connector->base, NULL); 192 193 return ret; 194} 195 196static int radeon_dp_mst_get_modes(struct drm_connector *connector) 197{ 198 return radeon_dp_mst_get_ddc_modes(connector); 199} 200 201static enum drm_mode_status 202radeon_dp_mst_mode_valid(struct drm_connector *connector, 203 struct drm_display_mode *mode) 204{ 205 /* TODO - validate mode against available PBN for link */ 206 if (mode->clock < 10000) 207 return MODE_CLOCK_LOW; 208 209 if (mode->flags & DRM_MODE_FLAG_DBLCLK) 210 return MODE_H_ILLEGAL; 211 212 return MODE_OK; 213} 214 215struct drm_encoder *radeon_mst_best_encoder(struct drm_connector *connector) 216{ 217 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 218 219 return &radeon_connector->mst_encoder->base; 220} 221 222static const struct drm_connector_helper_funcs radeon_dp_mst_connector_helper_funcs = { 223 .get_modes = radeon_dp_mst_get_modes, 224 .mode_valid = radeon_dp_mst_mode_valid, 225 .best_encoder = radeon_mst_best_encoder, 226}; 227 228static enum drm_connector_status 229radeon_dp_mst_detect(struct drm_connector *connector, bool force) 230{ 231 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 232 struct radeon_connector *master = radeon_connector->mst_port; 233 234 return drm_dp_mst_detect_port(connector, &master->mst_mgr, radeon_connector->port); 235} 236 237static void 238radeon_dp_mst_connector_destroy(struct drm_connector *connector) 239{ 240 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 241 struct radeon_encoder *radeon_encoder = radeon_connector->mst_encoder; 242 243 drm_encoder_cleanup(&radeon_encoder->base); 244 kfree(radeon_encoder); 245 drm_connector_cleanup(connector); 246 kfree(radeon_connector); 247} 248 249static void radeon_connector_dpms(struct drm_connector *connector, int mode) 250{ 251 DRM_DEBUG_KMS("\n"); 252} 253 254static const struct drm_connector_funcs radeon_dp_mst_connector_funcs = { 255 .dpms = radeon_connector_dpms, 256 .detect = radeon_dp_mst_detect, 257 .fill_modes = drm_helper_probe_single_connector_modes, 258 .destroy = radeon_dp_mst_connector_destroy, 259}; 260 261static struct drm_connector *radeon_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, 262 struct drm_dp_mst_port *port, 263 const char *pathprop) 264{ 265 struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr); 266 struct drm_device *dev = master->base.dev; 267 struct radeon_device *rdev = dev->dev_private; 268 struct radeon_connector *radeon_connector; 269 struct drm_connector *connector; 270 271 radeon_connector = kzalloc(sizeof(*radeon_connector), GFP_KERNEL); 272 if (!radeon_connector) 273 return NULL; 274 275 radeon_connector->is_mst_connector = true; 276 connector = &radeon_connector->base; 277 radeon_connector->port = port; 278 radeon_connector->mst_port = master; 279 DRM_DEBUG_KMS("\n"); 280 281 drm_connector_init(dev, connector, &radeon_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort); 282 drm_connector_helper_add(connector, &radeon_dp_mst_connector_helper_funcs); 283 radeon_connector->mst_encoder = radeon_dp_create_fake_mst_encoder(master); 284 285 drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0); 286 drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0); 287 drm_mode_connector_set_path_property(connector, pathprop); 288 drm_reinit_primary_mode_group(dev); 289 290 drm_modeset_lock_all(dev); 291 radeon_fb_add_connector(rdev, connector); 292 drm_modeset_unlock_all(dev); 293 294 drm_connector_register(connector); 295 return connector; 296} 297 298static void radeon_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr, 299 struct drm_connector *connector) 300{ 301 struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr); 302 struct drm_device *dev = master->base.dev; 303 struct radeon_device *rdev = dev->dev_private; 304 305 drm_connector_unregister(connector); 306 /* need to nuke the connector */ 307 drm_modeset_lock_all(dev); 308 /* dpms off */ 309 radeon_fb_remove_connector(rdev, connector); 310 311 drm_connector_cleanup(connector); 312 drm_modeset_unlock_all(dev); 313 drm_reinit_primary_mode_group(dev); 314 315 316 kfree(connector); 317 DRM_DEBUG_KMS("\n"); 318} 319 320static void radeon_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr) 321{ 322 struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr); 323 struct drm_device *dev = master->base.dev; 324 325 drm_kms_helper_hotplug_event(dev); 326} 327 328struct drm_dp_mst_topology_cbs mst_cbs = { 329 .add_connector = radeon_dp_add_mst_connector, 330 .destroy_connector = radeon_dp_destroy_mst_connector, 331 .hotplug = radeon_dp_mst_hotplug, 332}; 333 334struct radeon_connector *radeon_mst_find_connector(struct drm_encoder *encoder) 335{ 336 struct drm_device *dev = encoder->dev; 337 struct drm_connector *connector; 338 339 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 340 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 341 if (!connector->encoder) 342 continue; 343 if (!radeon_connector->is_mst_connector) 344 continue; 345 346 DRM_DEBUG_KMS("checking %p vs %p\n", connector->encoder, encoder); 347 if (connector->encoder == encoder) 348 return radeon_connector; 349 } 350 return NULL; 351} 352 353void radeon_dp_mst_prepare_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) 354{ 355 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); 356 struct drm_device *dev = crtc->dev; 357 struct radeon_device *rdev = dev->dev_private; 358 struct radeon_encoder *radeon_encoder = to_radeon_encoder(radeon_crtc->encoder); 359 struct radeon_encoder_mst *mst_enc = radeon_encoder->enc_priv; 360 struct radeon_connector *radeon_connector = radeon_mst_find_connector(&radeon_encoder->base); 361 int dp_clock; 362 struct radeon_connector_atom_dig *dig_connector = mst_enc->connector->con_priv; 363 364 if (radeon_connector) { 365 radeon_connector->pixelclock_for_modeset = mode->clock; 366 if (radeon_connector->base.display_info.bpc) 367 radeon_crtc->bpc = radeon_connector->base.display_info.bpc; 368 else 369 radeon_crtc->bpc = 8; 370 } 371 372 DRM_DEBUG_KMS("dp_clock %p %d\n", dig_connector, dig_connector->dp_clock); 373 dp_clock = dig_connector->dp_clock; 374 radeon_crtc->ss_enabled = 375 radeon_atombios_get_asic_ss_info(rdev, &radeon_crtc->ss, 376 ASIC_INTERNAL_SS_ON_DP, 377 dp_clock); 378} 379 380static void 381radeon_mst_encoder_dpms(struct drm_encoder *encoder, int mode) 382{ 383 struct drm_device *dev = encoder->dev; 384 struct radeon_device *rdev = dev->dev_private; 385 struct radeon_encoder *radeon_encoder, *primary; 386 struct radeon_encoder_mst *mst_enc; 387 struct radeon_encoder_atom_dig *dig_enc; 388 struct radeon_connector *radeon_connector; 389 struct drm_crtc *crtc; 390 struct radeon_crtc *radeon_crtc; 391 int ret, slots; 392 393 if (!ASIC_IS_DCE5(rdev)) { 394 DRM_ERROR("got mst dpms on non-DCE5\n"); 395 return; 396 } 397 398 radeon_connector = radeon_mst_find_connector(encoder); 399 if (!radeon_connector) 400 return; 401 402 radeon_encoder = to_radeon_encoder(encoder); 403 404 mst_enc = radeon_encoder->enc_priv; 405 406 primary = mst_enc->primary; 407 408 dig_enc = primary->enc_priv; 409 410 crtc = encoder->crtc; 411 DRM_DEBUG_KMS("got connector %d\n", dig_enc->active_mst_links); 412 413 switch (mode) { 414 case DRM_MODE_DPMS_ON: 415 dig_enc->active_mst_links++; 416 417 radeon_crtc = to_radeon_crtc(crtc); 418 419 if (dig_enc->active_mst_links == 1) { 420 mst_enc->fe = dig_enc->dig_encoder; 421 mst_enc->fe_from_be = true; 422 atombios_set_mst_encoder_crtc_source(encoder, mst_enc->fe); 423 424 atombios_dig_encoder_setup(&primary->base, ATOM_ENCODER_CMD_SETUP, 0); 425 atombios_dig_transmitter_setup2(&primary->base, ATOM_TRANSMITTER_ACTION_ENABLE, 426 0, 0, dig_enc->dig_encoder); 427 428 if (radeon_dp_needs_link_train(mst_enc->connector) || 429 dig_enc->active_mst_links == 1) { 430 radeon_dp_link_train(&primary->base, &mst_enc->connector->base); 431 } 432 433 } else { 434 mst_enc->fe = radeon_atom_pick_dig_encoder(encoder, radeon_crtc->crtc_id); 435 if (mst_enc->fe == -1) 436 DRM_ERROR("failed to get frontend for dig encoder\n"); 437 mst_enc->fe_from_be = false; 438 atombios_set_mst_encoder_crtc_source(encoder, mst_enc->fe); 439 } 440 441 DRM_DEBUG_KMS("dig encoder is %d %d %d\n", dig_enc->dig_encoder, 442 dig_enc->linkb, radeon_crtc->crtc_id); 443 444 ret = drm_dp_mst_allocate_vcpi(&radeon_connector->mst_port->mst_mgr, 445 radeon_connector->port, 446 mst_enc->pbn, &slots); 447 ret = drm_dp_update_payload_part1(&radeon_connector->mst_port->mst_mgr); 448 449 radeon_dp_mst_set_be_cntl(primary, mst_enc, 450 radeon_connector->mst_port->hpd.hpd, true); 451 452 mst_enc->enc_active = true; 453 radeon_dp_mst_update_stream_attribs(radeon_connector->mst_port, primary); 454 radeon_dp_mst_set_vcp_size(radeon_encoder, slots, 0); 455 456 atombios_dig_encoder_setup2(&primary->base, ATOM_ENCODER_CMD_DP_VIDEO_ON, 0, 457 mst_enc->fe); 458 ret = drm_dp_check_act_status(&radeon_connector->mst_port->mst_mgr); 459 460 ret = drm_dp_update_payload_part2(&radeon_connector->mst_port->mst_mgr); 461 462 break; 463 case DRM_MODE_DPMS_STANDBY: 464 case DRM_MODE_DPMS_SUSPEND: 465 case DRM_MODE_DPMS_OFF: 466 DRM_ERROR("DPMS OFF %d\n", dig_enc->active_mst_links); 467 468 if (!mst_enc->enc_active) 469 return; 470 471 drm_dp_mst_reset_vcpi_slots(&radeon_connector->mst_port->mst_mgr, mst_enc->port); 472 ret = drm_dp_update_payload_part1(&radeon_connector->mst_port->mst_mgr); 473 474 drm_dp_check_act_status(&radeon_connector->mst_port->mst_mgr); 475 /* and this can also fail */ 476 drm_dp_update_payload_part2(&radeon_connector->mst_port->mst_mgr); 477 478 drm_dp_mst_deallocate_vcpi(&radeon_connector->mst_port->mst_mgr, mst_enc->port); 479 480 mst_enc->enc_active = false; 481 radeon_dp_mst_update_stream_attribs(radeon_connector->mst_port, primary); 482 483 radeon_dp_mst_set_be_cntl(primary, mst_enc, 484 radeon_connector->mst_port->hpd.hpd, false); 485 atombios_dig_encoder_setup2(&primary->base, ATOM_ENCODER_CMD_DP_VIDEO_OFF, 0, 486 mst_enc->fe); 487 488 if (!mst_enc->fe_from_be) 489 radeon_atom_release_dig_encoder(rdev, mst_enc->fe); 490 491 mst_enc->fe_from_be = false; 492 dig_enc->active_mst_links--; 493 if (dig_enc->active_mst_links == 0) { 494 /* drop link */ 495 } 496 497 break; 498 } 499 500} 501 502static bool radeon_mst_mode_fixup(struct drm_encoder *encoder, 503 const struct drm_display_mode *mode, 504 struct drm_display_mode *adjusted_mode) 505{ 506 struct radeon_encoder_mst *mst_enc; 507 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 508 int bpp = 24; 509 510 mst_enc = radeon_encoder->enc_priv; 511 512 mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp); 513 514 mst_enc->primary->active_device = mst_enc->primary->devices & mst_enc->connector->devices; 515 DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n", 516 mst_enc->primary->active_device, mst_enc->primary->devices, 517 mst_enc->connector->devices, mst_enc->primary->base.encoder_type); 518 519 520 drm_mode_set_crtcinfo(adjusted_mode, 0); 521 { 522 struct radeon_connector_atom_dig *dig_connector; 523 int ret; 524 525 dig_connector = mst_enc->connector->con_priv; 526 ret = radeon_dp_get_dp_link_config(&mst_enc->connector->base, 527 dig_connector->dpcd, adjusted_mode->clock, 528 &dig_connector->dp_lane_count, 529 &dig_connector->dp_clock); 530 if (ret) { 531 dig_connector->dp_lane_count = 0; 532 dig_connector->dp_clock = 0; 533 } 534 DRM_DEBUG_KMS("dig clock %p %d %d\n", dig_connector, 535 dig_connector->dp_lane_count, dig_connector->dp_clock); 536 } 537 return true; 538} 539 540static void radeon_mst_encoder_prepare(struct drm_encoder *encoder) 541{ 542 struct radeon_connector *radeon_connector; 543 struct radeon_encoder *radeon_encoder, *primary; 544 struct radeon_encoder_mst *mst_enc; 545 struct radeon_encoder_atom_dig *dig_enc; 546 547 radeon_connector = radeon_mst_find_connector(encoder); 548 if (!radeon_connector) { 549 DRM_DEBUG_KMS("failed to find connector %p\n", encoder); 550 return; 551 } 552 radeon_encoder = to_radeon_encoder(encoder); 553 554 radeon_mst_encoder_dpms(encoder, DRM_MODE_DPMS_OFF); 555 556 mst_enc = radeon_encoder->enc_priv; 557 558 primary = mst_enc->primary; 559 560 dig_enc = primary->enc_priv; 561 562 mst_enc->port = radeon_connector->port; 563 564 if (dig_enc->dig_encoder == -1) { 565 dig_enc->dig_encoder = radeon_atom_pick_dig_encoder(&primary->base, -1); 566 primary->offset = radeon_atom_set_enc_offset(dig_enc->dig_encoder); 567 atombios_set_mst_encoder_crtc_source(encoder, dig_enc->dig_encoder); 568 569 570 } 571 DRM_DEBUG_KMS("%d %d\n", dig_enc->dig_encoder, primary->offset); 572} 573 574static void 575radeon_mst_encoder_mode_set(struct drm_encoder *encoder, 576 struct drm_display_mode *mode, 577 struct drm_display_mode *adjusted_mode) 578{ 579 DRM_DEBUG_KMS("\n"); 580} 581 582static void radeon_mst_encoder_commit(struct drm_encoder *encoder) 583{ 584 radeon_mst_encoder_dpms(encoder, DRM_MODE_DPMS_ON); 585 DRM_DEBUG_KMS("\n"); 586} 587 588static const struct drm_encoder_helper_funcs radeon_mst_helper_funcs = { 589 .dpms = radeon_mst_encoder_dpms, 590 .mode_fixup = radeon_mst_mode_fixup, 591 .prepare = radeon_mst_encoder_prepare, 592 .mode_set = radeon_mst_encoder_mode_set, 593 .commit = radeon_mst_encoder_commit, 594}; 595 596void radeon_dp_mst_encoder_destroy(struct drm_encoder *encoder) 597{ 598 drm_encoder_cleanup(encoder); 599 kfree(encoder); 600} 601 602static const struct drm_encoder_funcs radeon_dp_mst_enc_funcs = { 603 .destroy = radeon_dp_mst_encoder_destroy, 604}; 605 606static struct radeon_encoder * 607radeon_dp_create_fake_mst_encoder(struct radeon_connector *connector) 608{ 609 struct drm_device *dev = connector->base.dev; 610 struct radeon_device *rdev = dev->dev_private; 611 struct radeon_encoder *radeon_encoder; 612 struct radeon_encoder_mst *mst_enc; 613 struct drm_encoder *encoder; 614 const struct drm_connector_helper_funcs *connector_funcs = connector->base.helper_private; 615 struct drm_encoder *enc_master = connector_funcs->best_encoder(&connector->base); 616 617 DRM_DEBUG_KMS("enc master is %p\n", enc_master); 618 radeon_encoder = kzalloc(sizeof(*radeon_encoder), GFP_KERNEL); 619 if (!radeon_encoder) 620 return NULL; 621 622 radeon_encoder->enc_priv = kzalloc(sizeof(*mst_enc), GFP_KERNEL); 623 if (!radeon_encoder->enc_priv) { 624 kfree(radeon_encoder); 625 return NULL; 626 } 627 encoder = &radeon_encoder->base; 628 switch (rdev->num_crtc) { 629 case 1: 630 encoder->possible_crtcs = 0x1; 631 break; 632 case 2: 633 default: 634 encoder->possible_crtcs = 0x3; 635 break; 636 case 4: 637 encoder->possible_crtcs = 0xf; 638 break; 639 case 6: 640 encoder->possible_crtcs = 0x3f; 641 break; 642 } 643 644 drm_encoder_init(dev, &radeon_encoder->base, &radeon_dp_mst_enc_funcs, 645 DRM_MODE_ENCODER_DPMST); 646 drm_encoder_helper_add(encoder, &radeon_mst_helper_funcs); 647 648 mst_enc = radeon_encoder->enc_priv; 649 mst_enc->connector = connector; 650 mst_enc->primary = to_radeon_encoder(enc_master); 651 radeon_encoder->is_mst_encoder = true; 652 return radeon_encoder; 653} 654 655int 656radeon_dp_mst_init(struct radeon_connector *radeon_connector) 657{ 658 struct drm_device *dev = radeon_connector->base.dev; 659 660 if (!radeon_connector->ddc_bus->has_aux) 661 return 0; 662 663 radeon_connector->mst_mgr.cbs = &mst_cbs; 664 return drm_dp_mst_topology_mgr_init(&radeon_connector->mst_mgr, dev->dev, 665 &radeon_connector->ddc_bus->aux, 16, 6, 666 radeon_connector->base.base.id); 667} 668 669int 670radeon_dp_mst_probe(struct radeon_connector *radeon_connector) 671{ 672 struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv; 673 struct drm_device *dev = radeon_connector->base.dev; 674 struct radeon_device *rdev = dev->dev_private; 675 int ret; 676 u8 msg[1]; 677 678 if (!radeon_mst) 679 return 0; 680 681 if (!ASIC_IS_DCE5(rdev)) 682 return 0; 683 684 if (dig_connector->dpcd[DP_DPCD_REV] < 0x12) 685 return 0; 686 687 ret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_MSTM_CAP, msg, 688 1); 689 if (ret) { 690 if (msg[0] & DP_MST_CAP) { 691 DRM_DEBUG_KMS("Sink is MST capable\n"); 692 dig_connector->is_mst = true; 693 } else { 694 DRM_DEBUG_KMS("Sink is not MST capable\n"); 695 dig_connector->is_mst = false; 696 } 697 698 } 699 drm_dp_mst_topology_mgr_set_mst(&radeon_connector->mst_mgr, 700 dig_connector->is_mst); 701 return dig_connector->is_mst; 702} 703 704int 705radeon_dp_mst_check_status(struct radeon_connector *radeon_connector) 706{ 707 struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv; 708 int retry; 709 710 if (dig_connector->is_mst) { 711 u8 esi[16] = { 0 }; 712 int dret; 713 int ret = 0; 714 bool handled; 715 716 dret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, 717 DP_SINK_COUNT_ESI, esi, 8); 718go_again: 719 if (dret == 8) { 720 DRM_DEBUG_KMS("got esi %02x %02x %02x\n", esi[0], esi[1], esi[2]); 721 ret = drm_dp_mst_hpd_irq(&radeon_connector->mst_mgr, esi, &handled); 722 723 if (handled) { 724 for (retry = 0; retry < 3; retry++) { 725 int wret; 726 wret = drm_dp_dpcd_write(&radeon_connector->ddc_bus->aux, 727 DP_SINK_COUNT_ESI + 1, &esi[1], 3); 728 if (wret == 3) 729 break; 730 } 731 732 dret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, 733 DP_SINK_COUNT_ESI, esi, 8); 734 if (dret == 8) { 735 DRM_DEBUG_KMS("got esi2 %02x %02x %02x\n", esi[0], esi[1], esi[2]); 736 goto go_again; 737 } 738 } else 739 ret = 0; 740 741 return ret; 742 } else { 743 DRM_DEBUG_KMS("failed to get ESI - device may have failed %d\n", ret); 744 dig_connector->is_mst = false; 745 drm_dp_mst_topology_mgr_set_mst(&radeon_connector->mst_mgr, 746 dig_connector->is_mst); 747 /* send a hotplug event */ 748 } 749 } 750 return -EINVAL; 751} 752 753#if defined(CONFIG_DEBUG_FS) 754 755static int radeon_debugfs_mst_info(struct seq_file *m, void *data) 756{ 757 struct drm_info_node *node = (struct drm_info_node *)m->private; 758 struct drm_device *dev = node->minor->dev; 759 struct drm_connector *connector; 760 struct radeon_connector *radeon_connector; 761 struct radeon_connector_atom_dig *dig_connector; 762 int i; 763 764 drm_modeset_lock_all(dev); 765 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 766 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) 767 continue; 768 769 radeon_connector = to_radeon_connector(connector); 770 dig_connector = radeon_connector->con_priv; 771 if (radeon_connector->is_mst_connector) 772 continue; 773 if (!dig_connector->is_mst) 774 continue; 775 drm_dp_mst_dump_topology(m, &radeon_connector->mst_mgr); 776 777 for (i = 0; i < radeon_connector->enabled_attribs; i++) 778 seq_printf(m, "attrib %d: %d %d\n", i, 779 radeon_connector->cur_stream_attribs[i].fe, 780 radeon_connector->cur_stream_attribs[i].slots); 781 } 782 drm_modeset_unlock_all(dev); 783 return 0; 784} 785 786static struct drm_info_list radeon_debugfs_mst_list[] = { 787 {"radeon_mst_info", &radeon_debugfs_mst_info, 0, NULL}, 788}; 789#endif 790 791int radeon_mst_debugfs_init(struct radeon_device *rdev) 792{ 793#if defined(CONFIG_DEBUG_FS) 794 return radeon_debugfs_add_files(rdev, radeon_debugfs_mst_list, 1); 795#endif 796 return 0; 797} 798