1/**
2 * \file radeon_drv.c
3 * ATI Radeon driver
4 *
5 * \author Gareth Hughes <gareth@valinux.com>
6 */
7
8/*
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
11 *
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
18 *
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
21 * Software.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
30 */
31
32#include <drm/drmP.h>
33#include <drm/radeon_drm.h>
34#include "radeon_drv.h"
35
36#include <drm/drm_pciids.h>
37#include <linux/console.h>
38#include <linux/module.h>
39#include <linux/pm_runtime.h>
40#include <linux/vga_switcheroo.h>
41#include <drm/drm_gem.h>
42
43#include "drm_crtc_helper.h"
44#include "radeon_kfd.h"
45
46/*
47 * KMS wrapper.
48 * - 2.0.0 - initial interface
49 * - 2.1.0 - add square tiling interface
50 * - 2.2.0 - add r6xx/r7xx const buffer support
51 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
52 * - 2.4.0 - add crtc id query
53 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
54 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
55 *   2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
56 *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
57 *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
58 *   2.10.0 - fusion 2D tiling
59 *   2.11.0 - backend map, initial compute support for the CS checker
60 *   2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
61 *   2.13.0 - virtual memory support, streamout
62 *   2.14.0 - add evergreen tiling informations
63 *   2.15.0 - add max_pipes query
64 *   2.16.0 - fix evergreen 2D tiled surface calculation
65 *   2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
66 *   2.18.0 - r600-eg: allow "invalid" DB formats
67 *   2.19.0 - r600-eg: MSAA textures
68 *   2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
69 *   2.21.0 - r600-r700: FMASK and CMASK
70 *   2.22.0 - r600 only: RESOLVE_BOX allowed
71 *   2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
72 *   2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
73 *   2.25.0 - eg+: new info request for num SE and num SH
74 *   2.26.0 - r600-eg: fix htile size computation
75 *   2.27.0 - r600-SI: Add CS ioctl support for async DMA
76 *   2.28.0 - r600-eg: Add MEM_WRITE packet support
77 *   2.29.0 - R500 FP16 color clear registers
78 *   2.30.0 - fix for FMASK texturing
79 *   2.31.0 - Add fastfb support for rs690
80 *   2.32.0 - new info request for rings working
81 *   2.33.0 - Add SI tiling mode array query
82 *   2.34.0 - Add CIK tiling mode array query
83 *   2.35.0 - Add CIK macrotile mode array query
84 *   2.36.0 - Fix CIK DCE tiling setup
85 *   2.37.0 - allow GS ring setup on r6xx/r7xx
86 *   2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN),
87 *            CIK: 1D and linear tiling modes contain valid PIPE_CONFIG
88 *   2.39.0 - Add INFO query for number of active CUs
89 *   2.40.0 - Add RADEON_GEM_GTT_WC/UC, flush HDP cache before submitting
90 *            CS to GPU on >= r600
91 *   2.41.0 - evergreen/cayman: Add SET_BASE/DRAW_INDIRECT command parsing support
92 *   2.42.0 - Add VCE/VUI (Video Usability Information) support
93 */
94#define KMS_DRIVER_MAJOR	2
95#define KMS_DRIVER_MINOR	42
96#define KMS_DRIVER_PATCHLEVEL	0
97int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
98int radeon_driver_unload_kms(struct drm_device *dev);
99void radeon_driver_lastclose_kms(struct drm_device *dev);
100int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
101void radeon_driver_postclose_kms(struct drm_device *dev,
102				 struct drm_file *file_priv);
103void radeon_driver_preclose_kms(struct drm_device *dev,
104				struct drm_file *file_priv);
105int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon);
106int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
107u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
108int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
109void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
110int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
111				    int *max_error,
112				    struct timeval *vblank_time,
113				    unsigned flags);
114void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
115int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
116void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
117irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg);
118void radeon_gem_object_free(struct drm_gem_object *obj);
119int radeon_gem_object_open(struct drm_gem_object *obj,
120				struct drm_file *file_priv);
121void radeon_gem_object_close(struct drm_gem_object *obj,
122				struct drm_file *file_priv);
123struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
124					struct drm_gem_object *gobj,
125					int flags);
126extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
127				      unsigned int flags,
128				      int *vpos, int *hpos, ktime_t *stime,
129				      ktime_t *etime);
130extern bool radeon_is_px(struct drm_device *dev);
131extern const struct drm_ioctl_desc radeon_ioctls_kms[];
132extern int radeon_max_kms_ioctl;
133int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
134int radeon_mode_dumb_mmap(struct drm_file *filp,
135			  struct drm_device *dev,
136			  uint32_t handle, uint64_t *offset_p);
137int radeon_mode_dumb_create(struct drm_file *file_priv,
138			    struct drm_device *dev,
139			    struct drm_mode_create_dumb *args);
140struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
141struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
142							struct dma_buf_attachment *,
143							struct sg_table *sg);
144int radeon_gem_prime_pin(struct drm_gem_object *obj);
145void radeon_gem_prime_unpin(struct drm_gem_object *obj);
146struct reservation_object *radeon_gem_prime_res_obj(struct drm_gem_object *);
147void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
148void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
149extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
150				    unsigned long arg);
151
152#if defined(CONFIG_DEBUG_FS)
153int radeon_debugfs_init(struct drm_minor *minor);
154void radeon_debugfs_cleanup(struct drm_minor *minor);
155#endif
156
157/* atpx handler */
158#if defined(CONFIG_VGA_SWITCHEROO)
159void radeon_register_atpx_handler(void);
160void radeon_unregister_atpx_handler(void);
161#else
162static inline void radeon_register_atpx_handler(void) {}
163static inline void radeon_unregister_atpx_handler(void) {}
164#endif
165
166int radeon_no_wb;
167int radeon_modeset = -1;
168int radeon_dynclks = -1;
169int radeon_r4xx_atom = 0;
170int radeon_agpmode = 0;
171int radeon_vram_limit = 0;
172int radeon_gart_size = -1; /* auto */
173int radeon_benchmarking = 0;
174int radeon_testing = 0;
175int radeon_connector_table = 0;
176int radeon_tv = 1;
177int radeon_audio = -1;
178int radeon_disp_priority = 0;
179int radeon_hw_i2c = 0;
180int radeon_pcie_gen2 = -1;
181int radeon_msi = -1;
182int radeon_lockup_timeout = 10000;
183int radeon_fastfb = 0;
184int radeon_dpm = -1;
185int radeon_aspm = -1;
186int radeon_runtime_pm = -1;
187int radeon_hard_reset = 0;
188int radeon_vm_size = 8;
189int radeon_vm_block_size = -1;
190int radeon_deep_color = 0;
191int radeon_use_pflipirq = 2;
192int radeon_bapm = -1;
193int radeon_backlight = -1;
194int radeon_auxch = -1;
195int radeon_mst = 0;
196
197MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
198module_param_named(no_wb, radeon_no_wb, int, 0444);
199
200MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
201module_param_named(modeset, radeon_modeset, int, 0400);
202
203MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
204module_param_named(dynclks, radeon_dynclks, int, 0444);
205
206MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
207module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
208
209MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
210module_param_named(vramlimit, radeon_vram_limit, int, 0600);
211
212MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
213module_param_named(agpmode, radeon_agpmode, int, 0444);
214
215MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
216module_param_named(gartsize, radeon_gart_size, int, 0600);
217
218MODULE_PARM_DESC(benchmark, "Run benchmark");
219module_param_named(benchmark, radeon_benchmarking, int, 0444);
220
221MODULE_PARM_DESC(test, "Run tests");
222module_param_named(test, radeon_testing, int, 0444);
223
224MODULE_PARM_DESC(connector_table, "Force connector table");
225module_param_named(connector_table, radeon_connector_table, int, 0444);
226
227MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
228module_param_named(tv, radeon_tv, int, 0444);
229
230MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
231module_param_named(audio, radeon_audio, int, 0444);
232
233MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
234module_param_named(disp_priority, radeon_disp_priority, int, 0444);
235
236MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
237module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
238
239MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
240module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
241
242MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
243module_param_named(msi, radeon_msi, int, 0444);
244
245MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default 10000 = 10 seconds, 0 = disable)");
246module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
247
248MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
249module_param_named(fastfb, radeon_fastfb, int, 0444);
250
251MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
252module_param_named(dpm, radeon_dpm, int, 0444);
253
254MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
255module_param_named(aspm, radeon_aspm, int, 0444);
256
257MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
258module_param_named(runpm, radeon_runtime_pm, int, 0444);
259
260MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))");
261module_param_named(hard_reset, radeon_hard_reset, int, 0444);
262
263MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)");
264module_param_named(vm_size, radeon_vm_size, int, 0444);
265
266MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");
267module_param_named(vm_block_size, radeon_vm_block_size, int, 0444);
268
269MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");
270module_param_named(deep_color, radeon_deep_color, int, 0444);
271
272MODULE_PARM_DESC(use_pflipirq, "Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))");
273module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444);
274
275MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
276module_param_named(bapm, radeon_bapm, int, 0444);
277
278MODULE_PARM_DESC(backlight, "backlight support (1 = enable, 0 = disable, -1 = auto)");
279module_param_named(backlight, radeon_backlight, int, 0444);
280
281MODULE_PARM_DESC(auxch, "Use native auxch experimental support (1 = enable, 0 = disable, -1 = auto)");
282module_param_named(auxch, radeon_auxch, int, 0444);
283
284MODULE_PARM_DESC(mst, "DisplayPort MST experimental support (1 = enable, 0 = disable)");
285module_param_named(mst, radeon_mst, int, 0444);
286
287static struct pci_device_id pciidlist[] = {
288	radeon_PCI_IDS
289};
290
291MODULE_DEVICE_TABLE(pci, pciidlist);
292
293#ifdef CONFIG_DRM_RADEON_UMS
294
295static int radeon_suspend(struct drm_device *dev, pm_message_t state)
296{
297	drm_radeon_private_t *dev_priv = dev->dev_private;
298
299	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
300		return 0;
301
302	/* Disable *all* interrupts */
303	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
304		RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
305	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
306	return 0;
307}
308
309static int radeon_resume(struct drm_device *dev)
310{
311	drm_radeon_private_t *dev_priv = dev->dev_private;
312
313	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
314		return 0;
315
316	/* Restore interrupt registers */
317	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
318		RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
319	RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
320	return 0;
321}
322
323
324static const struct file_operations radeon_driver_old_fops = {
325	.owner = THIS_MODULE,
326	.open = drm_open,
327	.release = drm_release,
328	.unlocked_ioctl = drm_ioctl,
329	.mmap = drm_legacy_mmap,
330	.poll = drm_poll,
331	.read = drm_read,
332#ifdef CONFIG_COMPAT
333	.compat_ioctl = radeon_compat_ioctl,
334#endif
335	.llseek = noop_llseek,
336};
337
338static struct drm_driver driver_old = {
339	.driver_features =
340	    DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
341	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
342	.dev_priv_size = sizeof(drm_radeon_buf_priv_t),
343	.load = radeon_driver_load,
344	.firstopen = radeon_driver_firstopen,
345	.open = radeon_driver_open,
346	.preclose = radeon_driver_preclose,
347	.postclose = radeon_driver_postclose,
348	.lastclose = radeon_driver_lastclose,
349	.set_busid = drm_pci_set_busid,
350	.unload = radeon_driver_unload,
351	.suspend = radeon_suspend,
352	.resume = radeon_resume,
353	.get_vblank_counter = radeon_get_vblank_counter,
354	.enable_vblank = radeon_enable_vblank,
355	.disable_vblank = radeon_disable_vblank,
356	.master_create = radeon_master_create,
357	.master_destroy = radeon_master_destroy,
358	.irq_preinstall = radeon_driver_irq_preinstall,
359	.irq_postinstall = radeon_driver_irq_postinstall,
360	.irq_uninstall = radeon_driver_irq_uninstall,
361	.irq_handler = radeon_driver_irq_handler,
362	.ioctls = radeon_ioctls,
363	.dma_ioctl = radeon_cp_buffers,
364	.fops = &radeon_driver_old_fops,
365	.name = DRIVER_NAME,
366	.desc = DRIVER_DESC,
367	.date = DRIVER_DATE,
368	.major = DRIVER_MAJOR,
369	.minor = DRIVER_MINOR,
370	.patchlevel = DRIVER_PATCHLEVEL,
371};
372
373#endif
374
375static struct drm_driver kms_driver;
376
377static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
378{
379	struct apertures_struct *ap;
380	bool primary = false;
381
382	ap = alloc_apertures(1);
383	if (!ap)
384		return -ENOMEM;
385
386	ap->ranges[0].base = pci_resource_start(pdev, 0);
387	ap->ranges[0].size = pci_resource_len(pdev, 0);
388
389#ifdef CONFIG_X86
390	primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
391#endif
392	remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
393	kfree(ap);
394
395	return 0;
396}
397
398static int radeon_pci_probe(struct pci_dev *pdev,
399			    const struct pci_device_id *ent)
400{
401	int ret;
402
403	/* Get rid of things like offb */
404	ret = radeon_kick_out_firmware_fb(pdev);
405	if (ret)
406		return ret;
407
408	return drm_get_pci_dev(pdev, ent, &kms_driver);
409}
410
411static void
412radeon_pci_remove(struct pci_dev *pdev)
413{
414	struct drm_device *dev = pci_get_drvdata(pdev);
415
416	drm_put_dev(dev);
417}
418
419static int radeon_pmops_suspend(struct device *dev)
420{
421	struct pci_dev *pdev = to_pci_dev(dev);
422	struct drm_device *drm_dev = pci_get_drvdata(pdev);
423	return radeon_suspend_kms(drm_dev, true, true);
424}
425
426static int radeon_pmops_resume(struct device *dev)
427{
428	struct pci_dev *pdev = to_pci_dev(dev);
429	struct drm_device *drm_dev = pci_get_drvdata(pdev);
430	return radeon_resume_kms(drm_dev, true, true);
431}
432
433static int radeon_pmops_freeze(struct device *dev)
434{
435	struct pci_dev *pdev = to_pci_dev(dev);
436	struct drm_device *drm_dev = pci_get_drvdata(pdev);
437	return radeon_suspend_kms(drm_dev, false, true);
438}
439
440static int radeon_pmops_thaw(struct device *dev)
441{
442	struct pci_dev *pdev = to_pci_dev(dev);
443	struct drm_device *drm_dev = pci_get_drvdata(pdev);
444	return radeon_resume_kms(drm_dev, false, true);
445}
446
447static int radeon_pmops_runtime_suspend(struct device *dev)
448{
449	struct pci_dev *pdev = to_pci_dev(dev);
450	struct drm_device *drm_dev = pci_get_drvdata(pdev);
451	int ret;
452
453	if (!radeon_is_px(drm_dev)) {
454		pm_runtime_forbid(dev);
455		return -EBUSY;
456	}
457
458	drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
459	drm_kms_helper_poll_disable(drm_dev);
460	vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
461
462	ret = radeon_suspend_kms(drm_dev, false, false);
463	pci_save_state(pdev);
464	pci_disable_device(pdev);
465	pci_ignore_hotplug(pdev);
466	pci_set_power_state(pdev, PCI_D3cold);
467	drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
468
469	return 0;
470}
471
472static int radeon_pmops_runtime_resume(struct device *dev)
473{
474	struct pci_dev *pdev = to_pci_dev(dev);
475	struct drm_device *drm_dev = pci_get_drvdata(pdev);
476	int ret;
477
478	if (!radeon_is_px(drm_dev))
479		return -EINVAL;
480
481	drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
482
483	pci_set_power_state(pdev, PCI_D0);
484	pci_restore_state(pdev);
485	ret = pci_enable_device(pdev);
486	if (ret)
487		return ret;
488	pci_set_master(pdev);
489
490	ret = radeon_resume_kms(drm_dev, false, false);
491	drm_kms_helper_poll_enable(drm_dev);
492	vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
493	drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
494	return 0;
495}
496
497static int radeon_pmops_runtime_idle(struct device *dev)
498{
499	struct pci_dev *pdev = to_pci_dev(dev);
500	struct drm_device *drm_dev = pci_get_drvdata(pdev);
501	struct drm_crtc *crtc;
502
503	if (!radeon_is_px(drm_dev)) {
504		pm_runtime_forbid(dev);
505		return -EBUSY;
506	}
507
508	list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
509		if (crtc->enabled) {
510			DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
511			return -EBUSY;
512		}
513	}
514
515	pm_runtime_mark_last_busy(dev);
516	pm_runtime_autosuspend(dev);
517	/* we don't want the main rpm_idle to call suspend - we want to autosuspend */
518	return 1;
519}
520
521long radeon_drm_ioctl(struct file *filp,
522		      unsigned int cmd, unsigned long arg)
523{
524	struct drm_file *file_priv = filp->private_data;
525	struct drm_device *dev;
526	long ret;
527	dev = file_priv->minor->dev;
528	ret = pm_runtime_get_sync(dev->dev);
529	if (ret < 0)
530		return ret;
531
532	ret = drm_ioctl(filp, cmd, arg);
533
534	pm_runtime_mark_last_busy(dev->dev);
535	pm_runtime_put_autosuspend(dev->dev);
536	return ret;
537}
538
539static const struct dev_pm_ops radeon_pm_ops = {
540	.suspend = radeon_pmops_suspend,
541	.resume = radeon_pmops_resume,
542	.freeze = radeon_pmops_freeze,
543	.thaw = radeon_pmops_thaw,
544	.poweroff = radeon_pmops_freeze,
545	.restore = radeon_pmops_resume,
546	.runtime_suspend = radeon_pmops_runtime_suspend,
547	.runtime_resume = radeon_pmops_runtime_resume,
548	.runtime_idle = radeon_pmops_runtime_idle,
549};
550
551static const struct file_operations radeon_driver_kms_fops = {
552	.owner = THIS_MODULE,
553	.open = drm_open,
554	.release = drm_release,
555	.unlocked_ioctl = radeon_drm_ioctl,
556	.mmap = radeon_mmap,
557	.poll = drm_poll,
558	.read = drm_read,
559#ifdef CONFIG_COMPAT
560	.compat_ioctl = radeon_kms_compat_ioctl,
561#endif
562};
563
564static struct drm_driver kms_driver = {
565	.driver_features =
566	    DRIVER_USE_AGP |
567	    DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
568	    DRIVER_PRIME | DRIVER_RENDER,
569	.load = radeon_driver_load_kms,
570	.open = radeon_driver_open_kms,
571	.preclose = radeon_driver_preclose_kms,
572	.postclose = radeon_driver_postclose_kms,
573	.lastclose = radeon_driver_lastclose_kms,
574	.set_busid = drm_pci_set_busid,
575	.unload = radeon_driver_unload_kms,
576	.get_vblank_counter = radeon_get_vblank_counter_kms,
577	.enable_vblank = radeon_enable_vblank_kms,
578	.disable_vblank = radeon_disable_vblank_kms,
579	.get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
580	.get_scanout_position = radeon_get_crtc_scanoutpos,
581#if defined(CONFIG_DEBUG_FS)
582	.debugfs_init = radeon_debugfs_init,
583	.debugfs_cleanup = radeon_debugfs_cleanup,
584#endif
585	.irq_preinstall = radeon_driver_irq_preinstall_kms,
586	.irq_postinstall = radeon_driver_irq_postinstall_kms,
587	.irq_uninstall = radeon_driver_irq_uninstall_kms,
588	.irq_handler = radeon_driver_irq_handler_kms,
589	.ioctls = radeon_ioctls_kms,
590	.gem_free_object = radeon_gem_object_free,
591	.gem_open_object = radeon_gem_object_open,
592	.gem_close_object = radeon_gem_object_close,
593	.dumb_create = radeon_mode_dumb_create,
594	.dumb_map_offset = radeon_mode_dumb_mmap,
595	.dumb_destroy = drm_gem_dumb_destroy,
596	.fops = &radeon_driver_kms_fops,
597
598	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
599	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
600	.gem_prime_export = radeon_gem_prime_export,
601	.gem_prime_import = drm_gem_prime_import,
602	.gem_prime_pin = radeon_gem_prime_pin,
603	.gem_prime_unpin = radeon_gem_prime_unpin,
604	.gem_prime_res_obj = radeon_gem_prime_res_obj,
605	.gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
606	.gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
607	.gem_prime_vmap = radeon_gem_prime_vmap,
608	.gem_prime_vunmap = radeon_gem_prime_vunmap,
609
610	.name = DRIVER_NAME,
611	.desc = DRIVER_DESC,
612	.date = DRIVER_DATE,
613	.major = KMS_DRIVER_MAJOR,
614	.minor = KMS_DRIVER_MINOR,
615	.patchlevel = KMS_DRIVER_PATCHLEVEL,
616};
617
618static struct drm_driver *driver;
619static struct pci_driver *pdriver;
620
621#ifdef CONFIG_DRM_RADEON_UMS
622static struct pci_driver radeon_pci_driver = {
623	.name = DRIVER_NAME,
624	.id_table = pciidlist,
625};
626#endif
627
628static struct pci_driver radeon_kms_pci_driver = {
629	.name = DRIVER_NAME,
630	.id_table = pciidlist,
631	.probe = radeon_pci_probe,
632	.remove = radeon_pci_remove,
633	.driver.pm = &radeon_pm_ops,
634};
635
636static int __init radeon_init(void)
637{
638#ifdef CONFIG_VGA_CONSOLE
639	if (vgacon_text_force() && radeon_modeset == -1) {
640		DRM_INFO("VGACON disable radeon kernel modesetting.\n");
641		radeon_modeset = 0;
642	}
643#endif
644	/* set to modesetting by default if not nomodeset */
645	if (radeon_modeset == -1)
646		radeon_modeset = 1;
647
648	if (radeon_modeset == 1) {
649		DRM_INFO("radeon kernel modesetting enabled.\n");
650		driver = &kms_driver;
651		pdriver = &radeon_kms_pci_driver;
652		driver->driver_features |= DRIVER_MODESET;
653		driver->num_ioctls = radeon_max_kms_ioctl;
654		radeon_register_atpx_handler();
655
656	} else {
657#ifdef CONFIG_DRM_RADEON_UMS
658		DRM_INFO("radeon userspace modesetting enabled.\n");
659		driver = &driver_old;
660		pdriver = &radeon_pci_driver;
661		driver->driver_features &= ~DRIVER_MODESET;
662		driver->num_ioctls = radeon_max_ioctl;
663#else
664		DRM_ERROR("No UMS support in radeon module!\n");
665		return -EINVAL;
666#endif
667	}
668
669	radeon_kfd_init();
670
671	/* let modprobe override vga console setting */
672	return drm_pci_init(driver, pdriver);
673}
674
675static void __exit radeon_exit(void)
676{
677	radeon_kfd_fini();
678	drm_pci_exit(driver, pdriver);
679	radeon_unregister_atpx_handler();
680}
681
682module_init(radeon_init);
683module_exit(radeon_exit);
684
685MODULE_AUTHOR(DRIVER_AUTHOR);
686MODULE_DESCRIPTION(DRIVER_DESC);
687MODULE_LICENSE("GPL and additional rights");
688