1/*************************************************************************** 2 * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> * 3 * Copyright (C) 2007-2011 Hans de Goede <hdegoede@redhat.com> * 4 * * 5 * This program is free software; you can redistribute it and/or modify * 6 * it under the terms of the GNU General Public License as published by * 7 * the Free Software Foundation; either version 2 of the License, or * 8 * (at your option) any later version. * 9 * * 10 * This program is distributed in the hope that it will be useful, * 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of * 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * 13 * GNU General Public License for more details. * 14 * * 15 * You should have received a copy of the GNU General Public License * 16 * along with this program; if not, write to the * 17 * Free Software Foundation, Inc., * 18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * 19 ***************************************************************************/ 20 21#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 22 23#include <linux/module.h> 24#include <linux/init.h> 25#include <linux/slab.h> 26#include <linux/jiffies.h> 27#include <linux/platform_device.h> 28#include <linux/hwmon.h> 29#include <linux/hwmon-sysfs.h> 30#include <linux/err.h> 31#include <linux/mutex.h> 32#include <linux/io.h> 33#include <linux/acpi.h> 34 35#define DRVNAME "f71882fg" 36 37#define SIO_F71858FG_LD_HWM 0x02 /* Hardware monitor logical device */ 38#define SIO_F71882FG_LD_HWM 0x04 /* Hardware monitor logical device */ 39#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */ 40#define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */ 41 42#define SIO_REG_LDSEL 0x07 /* Logical device select */ 43#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ 44#define SIO_REG_DEVREV 0x22 /* Device revision */ 45#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */ 46#define SIO_REG_ENABLE 0x30 /* Logical device enable */ 47#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */ 48 49#define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */ 50#define SIO_F71808E_ID 0x0901 /* Chipset ID */ 51#define SIO_F71808A_ID 0x1001 /* Chipset ID */ 52#define SIO_F71858_ID 0x0507 /* Chipset ID */ 53#define SIO_F71862_ID 0x0601 /* Chipset ID */ 54#define SIO_F71869_ID 0x0814 /* Chipset ID */ 55#define SIO_F71869A_ID 0x1007 /* Chipset ID */ 56#define SIO_F71882_ID 0x0541 /* Chipset ID */ 57#define SIO_F71889_ID 0x0723 /* Chipset ID */ 58#define SIO_F71889E_ID 0x0909 /* Chipset ID */ 59#define SIO_F71889A_ID 0x1005 /* Chipset ID */ 60#define SIO_F8000_ID 0x0581 /* Chipset ID */ 61#define SIO_F81865_ID 0x0704 /* Chipset ID */ 62 63#define REGION_LENGTH 8 64#define ADDR_REG_OFFSET 5 65#define DATA_REG_OFFSET 6 66 67#define F71882FG_REG_IN_STATUS 0x12 /* f7188x only */ 68#define F71882FG_REG_IN_BEEP 0x13 /* f7188x only */ 69#define F71882FG_REG_IN(nr) (0x20 + (nr)) 70#define F71882FG_REG_IN1_HIGH 0x32 /* f7188x only */ 71 72#define F71882FG_REG_FAN(nr) (0xA0 + (16 * (nr))) 73#define F71882FG_REG_FAN_TARGET(nr) (0xA2 + (16 * (nr))) 74#define F71882FG_REG_FAN_FULL_SPEED(nr) (0xA4 + (16 * (nr))) 75#define F71882FG_REG_FAN_STATUS 0x92 76#define F71882FG_REG_FAN_BEEP 0x93 77 78#define F71882FG_REG_TEMP(nr) (0x70 + 2 * (nr)) 79#define F71882FG_REG_TEMP_OVT(nr) (0x80 + 2 * (nr)) 80#define F71882FG_REG_TEMP_HIGH(nr) (0x81 + 2 * (nr)) 81#define F71882FG_REG_TEMP_STATUS 0x62 82#define F71882FG_REG_TEMP_BEEP 0x63 83#define F71882FG_REG_TEMP_CONFIG 0x69 84#define F71882FG_REG_TEMP_HYST(nr) (0x6C + (nr)) 85#define F71882FG_REG_TEMP_TYPE 0x6B 86#define F71882FG_REG_TEMP_DIODE_OPEN 0x6F 87 88#define F71882FG_REG_PWM(nr) (0xA3 + (16 * (nr))) 89#define F71882FG_REG_PWM_TYPE 0x94 90#define F71882FG_REG_PWM_ENABLE 0x96 91 92#define F71882FG_REG_FAN_HYST(nr) (0x98 + (nr)) 93 94#define F71882FG_REG_FAN_FAULT_T 0x9F 95#define F71882FG_FAN_NEG_TEMP_EN 0x20 96#define F71882FG_FAN_PROG_SEL 0x80 97 98#define F71882FG_REG_POINT_PWM(pwm, point) (0xAA + (point) + (16 * (pwm))) 99#define F71882FG_REG_POINT_TEMP(pwm, point) (0xA6 + (point) + (16 * (pwm))) 100#define F71882FG_REG_POINT_MAPPING(nr) (0xAF + 16 * (nr)) 101 102#define F71882FG_REG_START 0x01 103 104#define F71882FG_MAX_INS 9 105 106#define FAN_MIN_DETECT 366 /* Lowest detectable fanspeed */ 107 108static unsigned short force_id; 109module_param(force_id, ushort, 0); 110MODULE_PARM_DESC(force_id, "Override the detected device ID"); 111 112enum chips { f71808e, f71808a, f71858fg, f71862fg, f71869, f71869a, f71882fg, 113 f71889fg, f71889ed, f71889a, f8000, f81865f }; 114 115static const char *const f71882fg_names[] = { 116 "f71808e", 117 "f71808a", 118 "f71858fg", 119 "f71862fg", 120 "f71869", /* Both f71869f and f71869e, reg. compatible and same id */ 121 "f71869a", 122 "f71882fg", 123 "f71889fg", /* f81801u too, same id */ 124 "f71889ed", 125 "f71889a", 126 "f8000", 127 "f81865f", 128}; 129 130static const char f71882fg_has_in[][F71882FG_MAX_INS] = { 131 [f71808e] = { 1, 1, 1, 1, 1, 1, 0, 1, 1 }, 132 [f71808a] = { 1, 1, 1, 1, 0, 0, 0, 1, 1 }, 133 [f71858fg] = { 1, 1, 1, 0, 0, 0, 0, 0, 0 }, 134 [f71862fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 }, 135 [f71869] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 }, 136 [f71869a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 }, 137 [f71882fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 }, 138 [f71889fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 }, 139 [f71889ed] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 }, 140 [f71889a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 }, 141 [f8000] = { 1, 1, 1, 0, 0, 0, 0, 0, 0 }, 142 [f81865f] = { 1, 1, 1, 1, 1, 1, 1, 0, 0 }, 143}; 144 145static const char f71882fg_has_in1_alarm[] = { 146 [f71808e] = 0, 147 [f71808a] = 0, 148 [f71858fg] = 0, 149 [f71862fg] = 0, 150 [f71869] = 0, 151 [f71869a] = 0, 152 [f71882fg] = 1, 153 [f71889fg] = 1, 154 [f71889ed] = 1, 155 [f71889a] = 1, 156 [f8000] = 0, 157 [f81865f] = 1, 158}; 159 160static const char f71882fg_fan_has_beep[] = { 161 [f71808e] = 0, 162 [f71808a] = 0, 163 [f71858fg] = 0, 164 [f71862fg] = 1, 165 [f71869] = 1, 166 [f71869a] = 1, 167 [f71882fg] = 1, 168 [f71889fg] = 1, 169 [f71889ed] = 1, 170 [f71889a] = 1, 171 [f8000] = 0, 172 [f81865f] = 1, 173}; 174 175static const char f71882fg_nr_fans[] = { 176 [f71808e] = 3, 177 [f71808a] = 2, /* +1 fan which is monitor + simple pwm only */ 178 [f71858fg] = 3, 179 [f71862fg] = 3, 180 [f71869] = 3, 181 [f71869a] = 3, 182 [f71882fg] = 4, 183 [f71889fg] = 3, 184 [f71889ed] = 3, 185 [f71889a] = 3, 186 [f8000] = 3, /* +1 fan which is monitor only */ 187 [f81865f] = 2, 188}; 189 190static const char f71882fg_temp_has_beep[] = { 191 [f71808e] = 0, 192 [f71808a] = 1, 193 [f71858fg] = 0, 194 [f71862fg] = 1, 195 [f71869] = 1, 196 [f71869a] = 1, 197 [f71882fg] = 1, 198 [f71889fg] = 1, 199 [f71889ed] = 1, 200 [f71889a] = 1, 201 [f8000] = 0, 202 [f81865f] = 1, 203}; 204 205static const char f71882fg_nr_temps[] = { 206 [f71808e] = 2, 207 [f71808a] = 2, 208 [f71858fg] = 3, 209 [f71862fg] = 3, 210 [f71869] = 3, 211 [f71869a] = 3, 212 [f71882fg] = 3, 213 [f71889fg] = 3, 214 [f71889ed] = 3, 215 [f71889a] = 3, 216 [f8000] = 3, 217 [f81865f] = 2, 218}; 219 220static struct platform_device *f71882fg_pdev; 221 222/* Super-I/O Function prototypes */ 223static inline int superio_inb(int base, int reg); 224static inline int superio_inw(int base, int reg); 225static inline int superio_enter(int base); 226static inline void superio_select(int base, int ld); 227static inline void superio_exit(int base); 228 229struct f71882fg_sio_data { 230 enum chips type; 231}; 232 233struct f71882fg_data { 234 unsigned short addr; 235 enum chips type; 236 struct device *hwmon_dev; 237 238 struct mutex update_lock; 239 int temp_start; /* temp numbering start (0 or 1) */ 240 char valid; /* !=0 if following fields are valid */ 241 char auto_point_temp_signed; 242 unsigned long last_updated; /* In jiffies */ 243 unsigned long last_limits; /* In jiffies */ 244 245 /* Register Values */ 246 u8 in[F71882FG_MAX_INS]; 247 u8 in1_max; 248 u8 in_status; 249 u8 in_beep; 250 u16 fan[4]; 251 u16 fan_target[4]; 252 u16 fan_full_speed[4]; 253 u8 fan_status; 254 u8 fan_beep; 255 /* 256 * Note: all models have max 3 temperature channels, but on some 257 * they are addressed as 0-2 and on others as 1-3, so for coding 258 * convenience we reserve space for 4 channels 259 */ 260 u16 temp[4]; 261 u8 temp_ovt[4]; 262 u8 temp_high[4]; 263 u8 temp_hyst[2]; /* 2 hysts stored per reg */ 264 u8 temp_type[4]; 265 u8 temp_status; 266 u8 temp_beep; 267 u8 temp_diode_open; 268 u8 temp_config; 269 u8 pwm[4]; 270 u8 pwm_enable; 271 u8 pwm_auto_point_hyst[2]; 272 u8 pwm_auto_point_mapping[4]; 273 u8 pwm_auto_point_pwm[4][5]; 274 s8 pwm_auto_point_temp[4][4]; 275}; 276 277/* Sysfs in */ 278static ssize_t show_in(struct device *dev, struct device_attribute *devattr, 279 char *buf); 280static ssize_t show_in_max(struct device *dev, struct device_attribute 281 *devattr, char *buf); 282static ssize_t store_in_max(struct device *dev, struct device_attribute 283 *devattr, const char *buf, size_t count); 284static ssize_t show_in_beep(struct device *dev, struct device_attribute 285 *devattr, char *buf); 286static ssize_t store_in_beep(struct device *dev, struct device_attribute 287 *devattr, const char *buf, size_t count); 288static ssize_t show_in_alarm(struct device *dev, struct device_attribute 289 *devattr, char *buf); 290/* Sysfs Fan */ 291static ssize_t show_fan(struct device *dev, struct device_attribute *devattr, 292 char *buf); 293static ssize_t show_fan_full_speed(struct device *dev, 294 struct device_attribute *devattr, char *buf); 295static ssize_t store_fan_full_speed(struct device *dev, 296 struct device_attribute *devattr, const char *buf, size_t count); 297static ssize_t show_fan_beep(struct device *dev, struct device_attribute 298 *devattr, char *buf); 299static ssize_t store_fan_beep(struct device *dev, struct device_attribute 300 *devattr, const char *buf, size_t count); 301static ssize_t show_fan_alarm(struct device *dev, struct device_attribute 302 *devattr, char *buf); 303/* Sysfs Temp */ 304static ssize_t show_temp(struct device *dev, struct device_attribute 305 *devattr, char *buf); 306static ssize_t show_temp_max(struct device *dev, struct device_attribute 307 *devattr, char *buf); 308static ssize_t store_temp_max(struct device *dev, struct device_attribute 309 *devattr, const char *buf, size_t count); 310static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute 311 *devattr, char *buf); 312static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute 313 *devattr, const char *buf, size_t count); 314static ssize_t show_temp_crit(struct device *dev, struct device_attribute 315 *devattr, char *buf); 316static ssize_t store_temp_crit(struct device *dev, struct device_attribute 317 *devattr, const char *buf, size_t count); 318static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute 319 *devattr, char *buf); 320static ssize_t show_temp_type(struct device *dev, struct device_attribute 321 *devattr, char *buf); 322static ssize_t show_temp_beep(struct device *dev, struct device_attribute 323 *devattr, char *buf); 324static ssize_t store_temp_beep(struct device *dev, struct device_attribute 325 *devattr, const char *buf, size_t count); 326static ssize_t show_temp_alarm(struct device *dev, struct device_attribute 327 *devattr, char *buf); 328static ssize_t show_temp_fault(struct device *dev, struct device_attribute 329 *devattr, char *buf); 330/* PWM and Auto point control */ 331static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr, 332 char *buf); 333static ssize_t store_pwm(struct device *dev, struct device_attribute *devattr, 334 const char *buf, size_t count); 335static ssize_t show_simple_pwm(struct device *dev, 336 struct device_attribute *devattr, char *buf); 337static ssize_t store_simple_pwm(struct device *dev, 338 struct device_attribute *devattr, const char *buf, size_t count); 339static ssize_t show_pwm_enable(struct device *dev, 340 struct device_attribute *devattr, char *buf); 341static ssize_t store_pwm_enable(struct device *dev, 342 struct device_attribute *devattr, const char *buf, size_t count); 343static ssize_t show_pwm_interpolate(struct device *dev, 344 struct device_attribute *devattr, char *buf); 345static ssize_t store_pwm_interpolate(struct device *dev, 346 struct device_attribute *devattr, const char *buf, size_t count); 347static ssize_t show_pwm_auto_point_channel(struct device *dev, 348 struct device_attribute *devattr, char *buf); 349static ssize_t store_pwm_auto_point_channel(struct device *dev, 350 struct device_attribute *devattr, const char *buf, size_t count); 351static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev, 352 struct device_attribute *devattr, char *buf); 353static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev, 354 struct device_attribute *devattr, const char *buf, size_t count); 355static ssize_t show_pwm_auto_point_pwm(struct device *dev, 356 struct device_attribute *devattr, char *buf); 357static ssize_t store_pwm_auto_point_pwm(struct device *dev, 358 struct device_attribute *devattr, const char *buf, size_t count); 359static ssize_t show_pwm_auto_point_temp(struct device *dev, 360 struct device_attribute *devattr, char *buf); 361static ssize_t store_pwm_auto_point_temp(struct device *dev, 362 struct device_attribute *devattr, const char *buf, size_t count); 363/* Sysfs misc */ 364static ssize_t show_name(struct device *dev, struct device_attribute *devattr, 365 char *buf); 366 367static int f71882fg_probe(struct platform_device *pdev); 368static int f71882fg_remove(struct platform_device *pdev); 369 370static struct platform_driver f71882fg_driver = { 371 .driver = { 372 .name = DRVNAME, 373 }, 374 .probe = f71882fg_probe, 375 .remove = f71882fg_remove, 376}; 377 378static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); 379 380/* 381 * Temp attr for the f71858fg, the f71858fg is special as it has its 382 * temperature indexes start at 0 (the others start at 1) 383 */ 384static struct sensor_device_attribute_2 f71858fg_temp_attr[] = { 385 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0), 386 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max, 387 store_temp_max, 0, 0), 388 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst, 389 store_temp_max_hyst, 0, 0), 390 SENSOR_ATTR_2(temp1_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 0), 391 SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit, 392 store_temp_crit, 0, 0), 393 SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL, 394 0, 0), 395 SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4), 396 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0), 397 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1), 398 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max, 399 store_temp_max, 0, 1), 400 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst, 401 store_temp_max_hyst, 0, 1), 402 SENSOR_ATTR_2(temp2_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1), 403 SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit, 404 store_temp_crit, 0, 1), 405 SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL, 406 0, 1), 407 SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5), 408 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1), 409 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2), 410 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max, 411 store_temp_max, 0, 2), 412 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst, 413 store_temp_max_hyst, 0, 2), 414 SENSOR_ATTR_2(temp3_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2), 415 SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit, 416 store_temp_crit, 0, 2), 417 SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL, 418 0, 2), 419 SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6), 420 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2), 421}; 422 423/* Temp attr for the standard models */ 424static struct sensor_device_attribute_2 fxxxx_temp_attr[3][9] = { { 425 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 1), 426 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max, 427 store_temp_max, 0, 1), 428 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst, 429 store_temp_max_hyst, 0, 1), 430 /* 431 * Should really be temp1_max_alarm, but older versions did not handle 432 * the max and crit alarms separately and lm_sensors v2 depends on the 433 * presence of temp#_alarm files. The same goes for temp2/3 _alarm. 434 */ 435 SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1), 436 SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit, 437 store_temp_crit, 0, 1), 438 SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL, 439 0, 1), 440 SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5), 441 SENSOR_ATTR_2(temp1_type, S_IRUGO, show_temp_type, NULL, 0, 1), 442 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 1), 443}, { 444 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 2), 445 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max, 446 store_temp_max, 0, 2), 447 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst, 448 store_temp_max_hyst, 0, 2), 449 /* Should be temp2_max_alarm, see temp1_alarm note */ 450 SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2), 451 SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit, 452 store_temp_crit, 0, 2), 453 SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL, 454 0, 2), 455 SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6), 456 SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 2), 457 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 2), 458}, { 459 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 3), 460 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max, 461 store_temp_max, 0, 3), 462 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst, 463 store_temp_max_hyst, 0, 3), 464 /* Should be temp3_max_alarm, see temp1_alarm note */ 465 SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 3), 466 SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit, 467 store_temp_crit, 0, 3), 468 SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL, 469 0, 3), 470 SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 7), 471 SENSOR_ATTR_2(temp3_type, S_IRUGO, show_temp_type, NULL, 0, 3), 472 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 3), 473} }; 474 475/* Temp attr for models which can beep on temp alarm */ 476static struct sensor_device_attribute_2 fxxxx_temp_beep_attr[3][2] = { { 477 SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep, 478 store_temp_beep, 0, 1), 479 SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep, 480 store_temp_beep, 0, 5), 481}, { 482 SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep, 483 store_temp_beep, 0, 2), 484 SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep, 485 store_temp_beep, 0, 6), 486}, { 487 SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep, 488 store_temp_beep, 0, 3), 489 SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep, 490 store_temp_beep, 0, 7), 491} }; 492 493/* 494 * Temp attr for the f8000 495 * Note on the f8000 temp_ovt (crit) is used as max, and temp_high (max) 496 * is used as hysteresis value to clear alarms 497 * Also like the f71858fg its temperature indexes start at 0 498 */ 499static struct sensor_device_attribute_2 f8000_temp_attr[] = { 500 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0), 501 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_crit, 502 store_temp_crit, 0, 0), 503 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max, 504 store_temp_max, 0, 0), 505 SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4), 506 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0), 507 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1), 508 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_crit, 509 store_temp_crit, 0, 1), 510 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max, 511 store_temp_max, 0, 1), 512 SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5), 513 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1), 514 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2), 515 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_crit, 516 store_temp_crit, 0, 2), 517 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max, 518 store_temp_max, 0, 2), 519 SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6), 520 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2), 521}; 522 523/* in attr for all models */ 524static struct sensor_device_attribute_2 fxxxx_in_attr[] = { 525 SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0), 526 SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1), 527 SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2), 528 SENSOR_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 0, 3), 529 SENSOR_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 0, 4), 530 SENSOR_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 0, 5), 531 SENSOR_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 0, 6), 532 SENSOR_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 0, 7), 533 SENSOR_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 0, 8), 534}; 535 536/* For models with in1 alarm capability */ 537static struct sensor_device_attribute_2 fxxxx_in1_alarm_attr[] = { 538 SENSOR_ATTR_2(in1_max, S_IRUGO|S_IWUSR, show_in_max, store_in_max, 539 0, 1), 540 SENSOR_ATTR_2(in1_beep, S_IRUGO|S_IWUSR, show_in_beep, store_in_beep, 541 0, 1), 542 SENSOR_ATTR_2(in1_alarm, S_IRUGO, show_in_alarm, NULL, 0, 1), 543}; 544 545/* Fan / PWM attr common to all models */ 546static struct sensor_device_attribute_2 fxxxx_fan_attr[4][6] = { { 547 SENSOR_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0), 548 SENSOR_ATTR_2(fan1_full_speed, S_IRUGO|S_IWUSR, 549 show_fan_full_speed, 550 store_fan_full_speed, 0, 0), 551 SENSOR_ATTR_2(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 0), 552 SENSOR_ATTR_2(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 0), 553 SENSOR_ATTR_2(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable, 554 store_pwm_enable, 0, 0), 555 SENSOR_ATTR_2(pwm1_interpolate, S_IRUGO|S_IWUSR, 556 show_pwm_interpolate, store_pwm_interpolate, 0, 0), 557}, { 558 SENSOR_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 0, 1), 559 SENSOR_ATTR_2(fan2_full_speed, S_IRUGO|S_IWUSR, 560 show_fan_full_speed, 561 store_fan_full_speed, 0, 1), 562 SENSOR_ATTR_2(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 1), 563 SENSOR_ATTR_2(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 1), 564 SENSOR_ATTR_2(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable, 565 store_pwm_enable, 0, 1), 566 SENSOR_ATTR_2(pwm2_interpolate, S_IRUGO|S_IWUSR, 567 show_pwm_interpolate, store_pwm_interpolate, 0, 1), 568}, { 569 SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2), 570 SENSOR_ATTR_2(fan3_full_speed, S_IRUGO|S_IWUSR, 571 show_fan_full_speed, 572 store_fan_full_speed, 0, 2), 573 SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2), 574 SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 2), 575 SENSOR_ATTR_2(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable, 576 store_pwm_enable, 0, 2), 577 SENSOR_ATTR_2(pwm3_interpolate, S_IRUGO|S_IWUSR, 578 show_pwm_interpolate, store_pwm_interpolate, 0, 2), 579}, { 580 SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3), 581 SENSOR_ATTR_2(fan4_full_speed, S_IRUGO|S_IWUSR, 582 show_fan_full_speed, 583 store_fan_full_speed, 0, 3), 584 SENSOR_ATTR_2(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 3), 585 SENSOR_ATTR_2(pwm4, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 3), 586 SENSOR_ATTR_2(pwm4_enable, S_IRUGO|S_IWUSR, show_pwm_enable, 587 store_pwm_enable, 0, 3), 588 SENSOR_ATTR_2(pwm4_interpolate, S_IRUGO|S_IWUSR, 589 show_pwm_interpolate, store_pwm_interpolate, 0, 3), 590} }; 591 592/* Attr for the third fan of the f71808a, which only has manual pwm */ 593static struct sensor_device_attribute_2 f71808a_fan3_attr[] = { 594 SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2), 595 SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2), 596 SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, 597 show_simple_pwm, store_simple_pwm, 0, 2), 598}; 599 600/* Attr for models which can beep on Fan alarm */ 601static struct sensor_device_attribute_2 fxxxx_fan_beep_attr[] = { 602 SENSOR_ATTR_2(fan1_beep, S_IRUGO|S_IWUSR, show_fan_beep, 603 store_fan_beep, 0, 0), 604 SENSOR_ATTR_2(fan2_beep, S_IRUGO|S_IWUSR, show_fan_beep, 605 store_fan_beep, 0, 1), 606 SENSOR_ATTR_2(fan3_beep, S_IRUGO|S_IWUSR, show_fan_beep, 607 store_fan_beep, 0, 2), 608 SENSOR_ATTR_2(fan4_beep, S_IRUGO|S_IWUSR, show_fan_beep, 609 store_fan_beep, 0, 3), 610}; 611 612/* 613 * PWM attr for the f71862fg, fewer pwms and fewer zones per pwm than the 614 * standard models 615 */ 616static struct sensor_device_attribute_2 f71862fg_auto_pwm_attr[3][7] = { { 617 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR, 618 show_pwm_auto_point_channel, 619 store_pwm_auto_point_channel, 0, 0), 620 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR, 621 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 622 1, 0), 623 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR, 624 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 625 4, 0), 626 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR, 627 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 628 0, 0), 629 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR, 630 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 631 3, 0), 632 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 633 show_pwm_auto_point_temp_hyst, 634 store_pwm_auto_point_temp_hyst, 635 0, 0), 636 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO, 637 show_pwm_auto_point_temp_hyst, NULL, 3, 0), 638}, { 639 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR, 640 show_pwm_auto_point_channel, 641 store_pwm_auto_point_channel, 0, 1), 642 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR, 643 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 644 1, 1), 645 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR, 646 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 647 4, 1), 648 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR, 649 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 650 0, 1), 651 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR, 652 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 653 3, 1), 654 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 655 show_pwm_auto_point_temp_hyst, 656 store_pwm_auto_point_temp_hyst, 657 0, 1), 658 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO, 659 show_pwm_auto_point_temp_hyst, NULL, 3, 1), 660}, { 661 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR, 662 show_pwm_auto_point_channel, 663 store_pwm_auto_point_channel, 0, 2), 664 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR, 665 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 666 1, 2), 667 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR, 668 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 669 4, 2), 670 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR, 671 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 672 0, 2), 673 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR, 674 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 675 3, 2), 676 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 677 show_pwm_auto_point_temp_hyst, 678 store_pwm_auto_point_temp_hyst, 679 0, 2), 680 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO, 681 show_pwm_auto_point_temp_hyst, NULL, 3, 2), 682} }; 683 684/* 685 * PWM attr for the f71808e/f71869, almost identical to the f71862fg, but the 686 * pwm setting when the temperature is above the pwmX_auto_point1_temp can be 687 * programmed instead of being hardcoded to 0xff 688 */ 689static struct sensor_device_attribute_2 f71869_auto_pwm_attr[3][8] = { { 690 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR, 691 show_pwm_auto_point_channel, 692 store_pwm_auto_point_channel, 0, 0), 693 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR, 694 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 695 0, 0), 696 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR, 697 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 698 1, 0), 699 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR, 700 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 701 4, 0), 702 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR, 703 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 704 0, 0), 705 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR, 706 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 707 3, 0), 708 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 709 show_pwm_auto_point_temp_hyst, 710 store_pwm_auto_point_temp_hyst, 711 0, 0), 712 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO, 713 show_pwm_auto_point_temp_hyst, NULL, 3, 0), 714}, { 715 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR, 716 show_pwm_auto_point_channel, 717 store_pwm_auto_point_channel, 0, 1), 718 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR, 719 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 720 0, 1), 721 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR, 722 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 723 1, 1), 724 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR, 725 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 726 4, 1), 727 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR, 728 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 729 0, 1), 730 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR, 731 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 732 3, 1), 733 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 734 show_pwm_auto_point_temp_hyst, 735 store_pwm_auto_point_temp_hyst, 736 0, 1), 737 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO, 738 show_pwm_auto_point_temp_hyst, NULL, 3, 1), 739}, { 740 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR, 741 show_pwm_auto_point_channel, 742 store_pwm_auto_point_channel, 0, 2), 743 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR, 744 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 745 0, 2), 746 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR, 747 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 748 1, 2), 749 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR, 750 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 751 4, 2), 752 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR, 753 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 754 0, 2), 755 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR, 756 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 757 3, 2), 758 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 759 show_pwm_auto_point_temp_hyst, 760 store_pwm_auto_point_temp_hyst, 761 0, 2), 762 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO, 763 show_pwm_auto_point_temp_hyst, NULL, 3, 2), 764} }; 765 766/* PWM attr for the standard models */ 767static struct sensor_device_attribute_2 fxxxx_auto_pwm_attr[4][14] = { { 768 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR, 769 show_pwm_auto_point_channel, 770 store_pwm_auto_point_channel, 0, 0), 771 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR, 772 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 773 0, 0), 774 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR, 775 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 776 1, 0), 777 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR, 778 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 779 2, 0), 780 SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO|S_IWUSR, 781 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 782 3, 0), 783 SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IRUGO|S_IWUSR, 784 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 785 4, 0), 786 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR, 787 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 788 0, 0), 789 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR, 790 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 791 1, 0), 792 SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IRUGO|S_IWUSR, 793 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 794 2, 0), 795 SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IRUGO|S_IWUSR, 796 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 797 3, 0), 798 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 799 show_pwm_auto_point_temp_hyst, 800 store_pwm_auto_point_temp_hyst, 801 0, 0), 802 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO, 803 show_pwm_auto_point_temp_hyst, NULL, 1, 0), 804 SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IRUGO, 805 show_pwm_auto_point_temp_hyst, NULL, 2, 0), 806 SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IRUGO, 807 show_pwm_auto_point_temp_hyst, NULL, 3, 0), 808}, { 809 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR, 810 show_pwm_auto_point_channel, 811 store_pwm_auto_point_channel, 0, 1), 812 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR, 813 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 814 0, 1), 815 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR, 816 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 817 1, 1), 818 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR, 819 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 820 2, 1), 821 SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO|S_IWUSR, 822 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 823 3, 1), 824 SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IRUGO|S_IWUSR, 825 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 826 4, 1), 827 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR, 828 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 829 0, 1), 830 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR, 831 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 832 1, 1), 833 SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IRUGO|S_IWUSR, 834 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 835 2, 1), 836 SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IRUGO|S_IWUSR, 837 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 838 3, 1), 839 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 840 show_pwm_auto_point_temp_hyst, 841 store_pwm_auto_point_temp_hyst, 842 0, 1), 843 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO, 844 show_pwm_auto_point_temp_hyst, NULL, 1, 1), 845 SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IRUGO, 846 show_pwm_auto_point_temp_hyst, NULL, 2, 1), 847 SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IRUGO, 848 show_pwm_auto_point_temp_hyst, NULL, 3, 1), 849}, { 850 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR, 851 show_pwm_auto_point_channel, 852 store_pwm_auto_point_channel, 0, 2), 853 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR, 854 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 855 0, 2), 856 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR, 857 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 858 1, 2), 859 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR, 860 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 861 2, 2), 862 SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO|S_IWUSR, 863 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 864 3, 2), 865 SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IRUGO|S_IWUSR, 866 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 867 4, 2), 868 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR, 869 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 870 0, 2), 871 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR, 872 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 873 1, 2), 874 SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IRUGO|S_IWUSR, 875 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 876 2, 2), 877 SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IRUGO|S_IWUSR, 878 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 879 3, 2), 880 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 881 show_pwm_auto_point_temp_hyst, 882 store_pwm_auto_point_temp_hyst, 883 0, 2), 884 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO, 885 show_pwm_auto_point_temp_hyst, NULL, 1, 2), 886 SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IRUGO, 887 show_pwm_auto_point_temp_hyst, NULL, 2, 2), 888 SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IRUGO, 889 show_pwm_auto_point_temp_hyst, NULL, 3, 2), 890}, { 891 SENSOR_ATTR_2(pwm4_auto_channels_temp, S_IRUGO|S_IWUSR, 892 show_pwm_auto_point_channel, 893 store_pwm_auto_point_channel, 0, 3), 894 SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IRUGO|S_IWUSR, 895 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 896 0, 3), 897 SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IRUGO|S_IWUSR, 898 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 899 1, 3), 900 SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IRUGO|S_IWUSR, 901 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 902 2, 3), 903 SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IRUGO|S_IWUSR, 904 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 905 3, 3), 906 SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IRUGO|S_IWUSR, 907 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 908 4, 3), 909 SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IRUGO|S_IWUSR, 910 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 911 0, 3), 912 SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IRUGO|S_IWUSR, 913 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 914 1, 3), 915 SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IRUGO|S_IWUSR, 916 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 917 2, 3), 918 SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IRUGO|S_IWUSR, 919 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 920 3, 3), 921 SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 922 show_pwm_auto_point_temp_hyst, 923 store_pwm_auto_point_temp_hyst, 924 0, 3), 925 SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IRUGO, 926 show_pwm_auto_point_temp_hyst, NULL, 1, 3), 927 SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IRUGO, 928 show_pwm_auto_point_temp_hyst, NULL, 2, 3), 929 SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IRUGO, 930 show_pwm_auto_point_temp_hyst, NULL, 3, 3), 931} }; 932 933/* Fan attr specific to the f8000 (4th fan input can only measure speed) */ 934static struct sensor_device_attribute_2 f8000_fan_attr[] = { 935 SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3), 936}; 937 938/* 939 * PWM attr for the f8000, zones mapped to temp instead of to pwm! 940 * Also the register block at offset A0 maps to TEMP1 (so our temp2, as the 941 * F8000 starts counting temps at 0), B0 maps the TEMP2 and C0 maps to TEMP0 942 */ 943static struct sensor_device_attribute_2 f8000_auto_pwm_attr[3][14] = { { 944 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR, 945 show_pwm_auto_point_channel, 946 store_pwm_auto_point_channel, 0, 0), 947 SENSOR_ATTR_2(temp1_auto_point1_pwm, S_IRUGO|S_IWUSR, 948 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 949 0, 2), 950 SENSOR_ATTR_2(temp1_auto_point2_pwm, S_IRUGO|S_IWUSR, 951 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 952 1, 2), 953 SENSOR_ATTR_2(temp1_auto_point3_pwm, S_IRUGO|S_IWUSR, 954 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 955 2, 2), 956 SENSOR_ATTR_2(temp1_auto_point4_pwm, S_IRUGO|S_IWUSR, 957 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 958 3, 2), 959 SENSOR_ATTR_2(temp1_auto_point5_pwm, S_IRUGO|S_IWUSR, 960 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 961 4, 2), 962 SENSOR_ATTR_2(temp1_auto_point1_temp, S_IRUGO|S_IWUSR, 963 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 964 0, 2), 965 SENSOR_ATTR_2(temp1_auto_point2_temp, S_IRUGO|S_IWUSR, 966 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 967 1, 2), 968 SENSOR_ATTR_2(temp1_auto_point3_temp, S_IRUGO|S_IWUSR, 969 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 970 2, 2), 971 SENSOR_ATTR_2(temp1_auto_point4_temp, S_IRUGO|S_IWUSR, 972 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 973 3, 2), 974 SENSOR_ATTR_2(temp1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 975 show_pwm_auto_point_temp_hyst, 976 store_pwm_auto_point_temp_hyst, 977 0, 2), 978 SENSOR_ATTR_2(temp1_auto_point2_temp_hyst, S_IRUGO, 979 show_pwm_auto_point_temp_hyst, NULL, 1, 2), 980 SENSOR_ATTR_2(temp1_auto_point3_temp_hyst, S_IRUGO, 981 show_pwm_auto_point_temp_hyst, NULL, 2, 2), 982 SENSOR_ATTR_2(temp1_auto_point4_temp_hyst, S_IRUGO, 983 show_pwm_auto_point_temp_hyst, NULL, 3, 2), 984}, { 985 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR, 986 show_pwm_auto_point_channel, 987 store_pwm_auto_point_channel, 0, 1), 988 SENSOR_ATTR_2(temp2_auto_point1_pwm, S_IRUGO|S_IWUSR, 989 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 990 0, 0), 991 SENSOR_ATTR_2(temp2_auto_point2_pwm, S_IRUGO|S_IWUSR, 992 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 993 1, 0), 994 SENSOR_ATTR_2(temp2_auto_point3_pwm, S_IRUGO|S_IWUSR, 995 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 996 2, 0), 997 SENSOR_ATTR_2(temp2_auto_point4_pwm, S_IRUGO|S_IWUSR, 998 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 999 3, 0), 1000 SENSOR_ATTR_2(temp2_auto_point5_pwm, S_IRUGO|S_IWUSR, 1001 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1002 4, 0), 1003 SENSOR_ATTR_2(temp2_auto_point1_temp, S_IRUGO|S_IWUSR, 1004 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1005 0, 0), 1006 SENSOR_ATTR_2(temp2_auto_point2_temp, S_IRUGO|S_IWUSR, 1007 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1008 1, 0), 1009 SENSOR_ATTR_2(temp2_auto_point3_temp, S_IRUGO|S_IWUSR, 1010 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1011 2, 0), 1012 SENSOR_ATTR_2(temp2_auto_point4_temp, S_IRUGO|S_IWUSR, 1013 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1014 3, 0), 1015 SENSOR_ATTR_2(temp2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 1016 show_pwm_auto_point_temp_hyst, 1017 store_pwm_auto_point_temp_hyst, 1018 0, 0), 1019 SENSOR_ATTR_2(temp2_auto_point2_temp_hyst, S_IRUGO, 1020 show_pwm_auto_point_temp_hyst, NULL, 1, 0), 1021 SENSOR_ATTR_2(temp2_auto_point3_temp_hyst, S_IRUGO, 1022 show_pwm_auto_point_temp_hyst, NULL, 2, 0), 1023 SENSOR_ATTR_2(temp2_auto_point4_temp_hyst, S_IRUGO, 1024 show_pwm_auto_point_temp_hyst, NULL, 3, 0), 1025}, { 1026 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR, 1027 show_pwm_auto_point_channel, 1028 store_pwm_auto_point_channel, 0, 2), 1029 SENSOR_ATTR_2(temp3_auto_point1_pwm, S_IRUGO|S_IWUSR, 1030 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1031 0, 1), 1032 SENSOR_ATTR_2(temp3_auto_point2_pwm, S_IRUGO|S_IWUSR, 1033 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1034 1, 1), 1035 SENSOR_ATTR_2(temp3_auto_point3_pwm, S_IRUGO|S_IWUSR, 1036 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1037 2, 1), 1038 SENSOR_ATTR_2(temp3_auto_point4_pwm, S_IRUGO|S_IWUSR, 1039 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1040 3, 1), 1041 SENSOR_ATTR_2(temp3_auto_point5_pwm, S_IRUGO|S_IWUSR, 1042 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1043 4, 1), 1044 SENSOR_ATTR_2(temp3_auto_point1_temp, S_IRUGO|S_IWUSR, 1045 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1046 0, 1), 1047 SENSOR_ATTR_2(temp3_auto_point2_temp, S_IRUGO|S_IWUSR, 1048 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1049 1, 1), 1050 SENSOR_ATTR_2(temp3_auto_point3_temp, S_IRUGO|S_IWUSR, 1051 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1052 2, 1), 1053 SENSOR_ATTR_2(temp3_auto_point4_temp, S_IRUGO|S_IWUSR, 1054 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1055 3, 1), 1056 SENSOR_ATTR_2(temp3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 1057 show_pwm_auto_point_temp_hyst, 1058 store_pwm_auto_point_temp_hyst, 1059 0, 1), 1060 SENSOR_ATTR_2(temp3_auto_point2_temp_hyst, S_IRUGO, 1061 show_pwm_auto_point_temp_hyst, NULL, 1, 1), 1062 SENSOR_ATTR_2(temp3_auto_point3_temp_hyst, S_IRUGO, 1063 show_pwm_auto_point_temp_hyst, NULL, 2, 1), 1064 SENSOR_ATTR_2(temp3_auto_point4_temp_hyst, S_IRUGO, 1065 show_pwm_auto_point_temp_hyst, NULL, 3, 1), 1066} }; 1067 1068/* Super I/O functions */ 1069static inline int superio_inb(int base, int reg) 1070{ 1071 outb(reg, base); 1072 return inb(base + 1); 1073} 1074 1075static int superio_inw(int base, int reg) 1076{ 1077 int val; 1078 val = superio_inb(base, reg) << 8; 1079 val |= superio_inb(base, reg + 1); 1080 return val; 1081} 1082 1083static inline int superio_enter(int base) 1084{ 1085 /* Don't step on other drivers' I/O space by accident */ 1086 if (!request_muxed_region(base, 2, DRVNAME)) { 1087 pr_err("I/O address 0x%04x already in use\n", base); 1088 return -EBUSY; 1089 } 1090 1091 /* according to the datasheet the key must be send twice! */ 1092 outb(SIO_UNLOCK_KEY, base); 1093 outb(SIO_UNLOCK_KEY, base); 1094 1095 return 0; 1096} 1097 1098static inline void superio_select(int base, int ld) 1099{ 1100 outb(SIO_REG_LDSEL, base); 1101 outb(ld, base + 1); 1102} 1103 1104static inline void superio_exit(int base) 1105{ 1106 outb(SIO_LOCK_KEY, base); 1107 release_region(base, 2); 1108} 1109 1110static inline int fan_from_reg(u16 reg) 1111{ 1112 return reg ? (1500000 / reg) : 0; 1113} 1114 1115static inline u16 fan_to_reg(int fan) 1116{ 1117 return fan ? (1500000 / fan) : 0; 1118} 1119 1120static u8 f71882fg_read8(struct f71882fg_data *data, u8 reg) 1121{ 1122 u8 val; 1123 1124 outb(reg, data->addr + ADDR_REG_OFFSET); 1125 val = inb(data->addr + DATA_REG_OFFSET); 1126 1127 return val; 1128} 1129 1130static u16 f71882fg_read16(struct f71882fg_data *data, u8 reg) 1131{ 1132 u16 val; 1133 1134 val = f71882fg_read8(data, reg) << 8; 1135 val |= f71882fg_read8(data, reg + 1); 1136 1137 return val; 1138} 1139 1140static void f71882fg_write8(struct f71882fg_data *data, u8 reg, u8 val) 1141{ 1142 outb(reg, data->addr + ADDR_REG_OFFSET); 1143 outb(val, data->addr + DATA_REG_OFFSET); 1144} 1145 1146static void f71882fg_write16(struct f71882fg_data *data, u8 reg, u16 val) 1147{ 1148 f71882fg_write8(data, reg, val >> 8); 1149 f71882fg_write8(data, reg + 1, val & 0xff); 1150} 1151 1152static u16 f71882fg_read_temp(struct f71882fg_data *data, int nr) 1153{ 1154 if (data->type == f71858fg) 1155 return f71882fg_read16(data, F71882FG_REG_TEMP(nr)); 1156 else 1157 return f71882fg_read8(data, F71882FG_REG_TEMP(nr)); 1158} 1159 1160static struct f71882fg_data *f71882fg_update_device(struct device *dev) 1161{ 1162 struct f71882fg_data *data = dev_get_drvdata(dev); 1163 int nr_fans = f71882fg_nr_fans[data->type]; 1164 int nr_temps = f71882fg_nr_temps[data->type]; 1165 int nr, reg, point; 1166 1167 mutex_lock(&data->update_lock); 1168 1169 /* Update once every 60 seconds */ 1170 if (time_after(jiffies, data->last_limits + 60 * HZ) || 1171 !data->valid) { 1172 if (f71882fg_has_in1_alarm[data->type]) { 1173 data->in1_max = 1174 f71882fg_read8(data, F71882FG_REG_IN1_HIGH); 1175 data->in_beep = 1176 f71882fg_read8(data, F71882FG_REG_IN_BEEP); 1177 } 1178 1179 /* Get High & boundary temps*/ 1180 for (nr = data->temp_start; nr < nr_temps + data->temp_start; 1181 nr++) { 1182 data->temp_ovt[nr] = f71882fg_read8(data, 1183 F71882FG_REG_TEMP_OVT(nr)); 1184 data->temp_high[nr] = f71882fg_read8(data, 1185 F71882FG_REG_TEMP_HIGH(nr)); 1186 } 1187 1188 if (data->type != f8000) { 1189 data->temp_hyst[0] = f71882fg_read8(data, 1190 F71882FG_REG_TEMP_HYST(0)); 1191 data->temp_hyst[1] = f71882fg_read8(data, 1192 F71882FG_REG_TEMP_HYST(1)); 1193 } 1194 /* All but the f71858fg / f8000 have this register */ 1195 if ((data->type != f71858fg) && (data->type != f8000)) { 1196 reg = f71882fg_read8(data, F71882FG_REG_TEMP_TYPE); 1197 data->temp_type[1] = (reg & 0x02) ? 2 : 4; 1198 data->temp_type[2] = (reg & 0x04) ? 2 : 4; 1199 data->temp_type[3] = (reg & 0x08) ? 2 : 4; 1200 } 1201 1202 if (f71882fg_fan_has_beep[data->type]) 1203 data->fan_beep = f71882fg_read8(data, 1204 F71882FG_REG_FAN_BEEP); 1205 1206 if (f71882fg_temp_has_beep[data->type]) 1207 data->temp_beep = f71882fg_read8(data, 1208 F71882FG_REG_TEMP_BEEP); 1209 1210 data->pwm_enable = f71882fg_read8(data, 1211 F71882FG_REG_PWM_ENABLE); 1212 data->pwm_auto_point_hyst[0] = 1213 f71882fg_read8(data, F71882FG_REG_FAN_HYST(0)); 1214 data->pwm_auto_point_hyst[1] = 1215 f71882fg_read8(data, F71882FG_REG_FAN_HYST(1)); 1216 1217 for (nr = 0; nr < nr_fans; nr++) { 1218 data->pwm_auto_point_mapping[nr] = 1219 f71882fg_read8(data, 1220 F71882FG_REG_POINT_MAPPING(nr)); 1221 1222 switch (data->type) { 1223 default: 1224 for (point = 0; point < 5; point++) { 1225 data->pwm_auto_point_pwm[nr][point] = 1226 f71882fg_read8(data, 1227 F71882FG_REG_POINT_PWM 1228 (nr, point)); 1229 } 1230 for (point = 0; point < 4; point++) { 1231 data->pwm_auto_point_temp[nr][point] = 1232 f71882fg_read8(data, 1233 F71882FG_REG_POINT_TEMP 1234 (nr, point)); 1235 } 1236 break; 1237 case f71808e: 1238 case f71869: 1239 data->pwm_auto_point_pwm[nr][0] = 1240 f71882fg_read8(data, 1241 F71882FG_REG_POINT_PWM(nr, 0)); 1242 /* Fall through */ 1243 case f71862fg: 1244 data->pwm_auto_point_pwm[nr][1] = 1245 f71882fg_read8(data, 1246 F71882FG_REG_POINT_PWM 1247 (nr, 1)); 1248 data->pwm_auto_point_pwm[nr][4] = 1249 f71882fg_read8(data, 1250 F71882FG_REG_POINT_PWM 1251 (nr, 4)); 1252 data->pwm_auto_point_temp[nr][0] = 1253 f71882fg_read8(data, 1254 F71882FG_REG_POINT_TEMP 1255 (nr, 0)); 1256 data->pwm_auto_point_temp[nr][3] = 1257 f71882fg_read8(data, 1258 F71882FG_REG_POINT_TEMP 1259 (nr, 3)); 1260 break; 1261 } 1262 } 1263 data->last_limits = jiffies; 1264 } 1265 1266 /* Update every second */ 1267 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) { 1268 data->temp_status = f71882fg_read8(data, 1269 F71882FG_REG_TEMP_STATUS); 1270 data->temp_diode_open = f71882fg_read8(data, 1271 F71882FG_REG_TEMP_DIODE_OPEN); 1272 for (nr = data->temp_start; nr < nr_temps + data->temp_start; 1273 nr++) 1274 data->temp[nr] = f71882fg_read_temp(data, nr); 1275 1276 data->fan_status = f71882fg_read8(data, 1277 F71882FG_REG_FAN_STATUS); 1278 for (nr = 0; nr < nr_fans; nr++) { 1279 data->fan[nr] = f71882fg_read16(data, 1280 F71882FG_REG_FAN(nr)); 1281 data->fan_target[nr] = 1282 f71882fg_read16(data, F71882FG_REG_FAN_TARGET(nr)); 1283 data->fan_full_speed[nr] = 1284 f71882fg_read16(data, 1285 F71882FG_REG_FAN_FULL_SPEED(nr)); 1286 data->pwm[nr] = 1287 f71882fg_read8(data, F71882FG_REG_PWM(nr)); 1288 } 1289 /* Some models have 1 more fan with limited capabilities */ 1290 if (data->type == f71808a) { 1291 data->fan[2] = f71882fg_read16(data, 1292 F71882FG_REG_FAN(2)); 1293 data->pwm[2] = f71882fg_read8(data, 1294 F71882FG_REG_PWM(2)); 1295 } 1296 if (data->type == f8000) 1297 data->fan[3] = f71882fg_read16(data, 1298 F71882FG_REG_FAN(3)); 1299 1300 if (f71882fg_has_in1_alarm[data->type]) 1301 data->in_status = f71882fg_read8(data, 1302 F71882FG_REG_IN_STATUS); 1303 for (nr = 0; nr < F71882FG_MAX_INS; nr++) 1304 if (f71882fg_has_in[data->type][nr]) 1305 data->in[nr] = f71882fg_read8(data, 1306 F71882FG_REG_IN(nr)); 1307 1308 data->last_updated = jiffies; 1309 data->valid = 1; 1310 } 1311 1312 mutex_unlock(&data->update_lock); 1313 1314 return data; 1315} 1316 1317/* Sysfs Interface */ 1318static ssize_t show_fan(struct device *dev, struct device_attribute *devattr, 1319 char *buf) 1320{ 1321 struct f71882fg_data *data = f71882fg_update_device(dev); 1322 int nr = to_sensor_dev_attr_2(devattr)->index; 1323 int speed = fan_from_reg(data->fan[nr]); 1324 1325 if (speed == FAN_MIN_DETECT) 1326 speed = 0; 1327 1328 return sprintf(buf, "%d\n", speed); 1329} 1330 1331static ssize_t show_fan_full_speed(struct device *dev, 1332 struct device_attribute *devattr, char *buf) 1333{ 1334 struct f71882fg_data *data = f71882fg_update_device(dev); 1335 int nr = to_sensor_dev_attr_2(devattr)->index; 1336 int speed = fan_from_reg(data->fan_full_speed[nr]); 1337 return sprintf(buf, "%d\n", speed); 1338} 1339 1340static ssize_t store_fan_full_speed(struct device *dev, 1341 struct device_attribute *devattr, 1342 const char *buf, size_t count) 1343{ 1344 struct f71882fg_data *data = dev_get_drvdata(dev); 1345 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1346 long val; 1347 1348 err = kstrtol(buf, 10, &val); 1349 if (err) 1350 return err; 1351 1352 val = clamp_val(val, 23, 1500000); 1353 val = fan_to_reg(val); 1354 1355 mutex_lock(&data->update_lock); 1356 f71882fg_write16(data, F71882FG_REG_FAN_FULL_SPEED(nr), val); 1357 data->fan_full_speed[nr] = val; 1358 mutex_unlock(&data->update_lock); 1359 1360 return count; 1361} 1362 1363static ssize_t show_fan_beep(struct device *dev, struct device_attribute 1364 *devattr, char *buf) 1365{ 1366 struct f71882fg_data *data = f71882fg_update_device(dev); 1367 int nr = to_sensor_dev_attr_2(devattr)->index; 1368 1369 if (data->fan_beep & (1 << nr)) 1370 return sprintf(buf, "1\n"); 1371 else 1372 return sprintf(buf, "0\n"); 1373} 1374 1375static ssize_t store_fan_beep(struct device *dev, struct device_attribute 1376 *devattr, const char *buf, size_t count) 1377{ 1378 struct f71882fg_data *data = dev_get_drvdata(dev); 1379 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1380 unsigned long val; 1381 1382 err = kstrtoul(buf, 10, &val); 1383 if (err) 1384 return err; 1385 1386 mutex_lock(&data->update_lock); 1387 data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP); 1388 if (val) 1389 data->fan_beep |= 1 << nr; 1390 else 1391 data->fan_beep &= ~(1 << nr); 1392 1393 f71882fg_write8(data, F71882FG_REG_FAN_BEEP, data->fan_beep); 1394 mutex_unlock(&data->update_lock); 1395 1396 return count; 1397} 1398 1399static ssize_t show_fan_alarm(struct device *dev, struct device_attribute 1400 *devattr, char *buf) 1401{ 1402 struct f71882fg_data *data = f71882fg_update_device(dev); 1403 int nr = to_sensor_dev_attr_2(devattr)->index; 1404 1405 if (data->fan_status & (1 << nr)) 1406 return sprintf(buf, "1\n"); 1407 else 1408 return sprintf(buf, "0\n"); 1409} 1410 1411static ssize_t show_in(struct device *dev, struct device_attribute *devattr, 1412 char *buf) 1413{ 1414 struct f71882fg_data *data = f71882fg_update_device(dev); 1415 int nr = to_sensor_dev_attr_2(devattr)->index; 1416 1417 return sprintf(buf, "%d\n", data->in[nr] * 8); 1418} 1419 1420static ssize_t show_in_max(struct device *dev, struct device_attribute 1421 *devattr, char *buf) 1422{ 1423 struct f71882fg_data *data = f71882fg_update_device(dev); 1424 1425 return sprintf(buf, "%d\n", data->in1_max * 8); 1426} 1427 1428static ssize_t store_in_max(struct device *dev, struct device_attribute 1429 *devattr, const char *buf, size_t count) 1430{ 1431 struct f71882fg_data *data = dev_get_drvdata(dev); 1432 int err; 1433 long val; 1434 1435 err = kstrtol(buf, 10, &val); 1436 if (err) 1437 return err; 1438 1439 val /= 8; 1440 val = clamp_val(val, 0, 255); 1441 1442 mutex_lock(&data->update_lock); 1443 f71882fg_write8(data, F71882FG_REG_IN1_HIGH, val); 1444 data->in1_max = val; 1445 mutex_unlock(&data->update_lock); 1446 1447 return count; 1448} 1449 1450static ssize_t show_in_beep(struct device *dev, struct device_attribute 1451 *devattr, char *buf) 1452{ 1453 struct f71882fg_data *data = f71882fg_update_device(dev); 1454 int nr = to_sensor_dev_attr_2(devattr)->index; 1455 1456 if (data->in_beep & (1 << nr)) 1457 return sprintf(buf, "1\n"); 1458 else 1459 return sprintf(buf, "0\n"); 1460} 1461 1462static ssize_t store_in_beep(struct device *dev, struct device_attribute 1463 *devattr, const char *buf, size_t count) 1464{ 1465 struct f71882fg_data *data = dev_get_drvdata(dev); 1466 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1467 unsigned long val; 1468 1469 err = kstrtoul(buf, 10, &val); 1470 if (err) 1471 return err; 1472 1473 mutex_lock(&data->update_lock); 1474 data->in_beep = f71882fg_read8(data, F71882FG_REG_IN_BEEP); 1475 if (val) 1476 data->in_beep |= 1 << nr; 1477 else 1478 data->in_beep &= ~(1 << nr); 1479 1480 f71882fg_write8(data, F71882FG_REG_IN_BEEP, data->in_beep); 1481 mutex_unlock(&data->update_lock); 1482 1483 return count; 1484} 1485 1486static ssize_t show_in_alarm(struct device *dev, struct device_attribute 1487 *devattr, char *buf) 1488{ 1489 struct f71882fg_data *data = f71882fg_update_device(dev); 1490 int nr = to_sensor_dev_attr_2(devattr)->index; 1491 1492 if (data->in_status & (1 << nr)) 1493 return sprintf(buf, "1\n"); 1494 else 1495 return sprintf(buf, "0\n"); 1496} 1497 1498static ssize_t show_temp(struct device *dev, struct device_attribute *devattr, 1499 char *buf) 1500{ 1501 struct f71882fg_data *data = f71882fg_update_device(dev); 1502 int nr = to_sensor_dev_attr_2(devattr)->index; 1503 int sign, temp; 1504 1505 if (data->type == f71858fg) { 1506 /* TEMP_TABLE_SEL 1 or 3 ? */ 1507 if (data->temp_config & 1) { 1508 sign = data->temp[nr] & 0x0001; 1509 temp = (data->temp[nr] >> 5) & 0x7ff; 1510 } else { 1511 sign = data->temp[nr] & 0x8000; 1512 temp = (data->temp[nr] >> 5) & 0x3ff; 1513 } 1514 temp *= 125; 1515 if (sign) 1516 temp -= 128000; 1517 } else 1518 temp = data->temp[nr] * 1000; 1519 1520 return sprintf(buf, "%d\n", temp); 1521} 1522 1523static ssize_t show_temp_max(struct device *dev, struct device_attribute 1524 *devattr, char *buf) 1525{ 1526 struct f71882fg_data *data = f71882fg_update_device(dev); 1527 int nr = to_sensor_dev_attr_2(devattr)->index; 1528 1529 return sprintf(buf, "%d\n", data->temp_high[nr] * 1000); 1530} 1531 1532static ssize_t store_temp_max(struct device *dev, struct device_attribute 1533 *devattr, const char *buf, size_t count) 1534{ 1535 struct f71882fg_data *data = dev_get_drvdata(dev); 1536 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1537 long val; 1538 1539 err = kstrtol(buf, 10, &val); 1540 if (err) 1541 return err; 1542 1543 val /= 1000; 1544 val = clamp_val(val, 0, 255); 1545 1546 mutex_lock(&data->update_lock); 1547 f71882fg_write8(data, F71882FG_REG_TEMP_HIGH(nr), val); 1548 data->temp_high[nr] = val; 1549 mutex_unlock(&data->update_lock); 1550 1551 return count; 1552} 1553 1554static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute 1555 *devattr, char *buf) 1556{ 1557 struct f71882fg_data *data = f71882fg_update_device(dev); 1558 int nr = to_sensor_dev_attr_2(devattr)->index; 1559 int temp_max_hyst; 1560 1561 mutex_lock(&data->update_lock); 1562 if (nr & 1) 1563 temp_max_hyst = data->temp_hyst[nr / 2] >> 4; 1564 else 1565 temp_max_hyst = data->temp_hyst[nr / 2] & 0x0f; 1566 temp_max_hyst = (data->temp_high[nr] - temp_max_hyst) * 1000; 1567 mutex_unlock(&data->update_lock); 1568 1569 return sprintf(buf, "%d\n", temp_max_hyst); 1570} 1571 1572static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute 1573 *devattr, const char *buf, size_t count) 1574{ 1575 struct f71882fg_data *data = dev_get_drvdata(dev); 1576 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1577 ssize_t ret = count; 1578 u8 reg; 1579 long val; 1580 1581 err = kstrtol(buf, 10, &val); 1582 if (err) 1583 return err; 1584 1585 val /= 1000; 1586 1587 mutex_lock(&data->update_lock); 1588 1589 /* convert abs to relative and check */ 1590 data->temp_high[nr] = f71882fg_read8(data, F71882FG_REG_TEMP_HIGH(nr)); 1591 val = clamp_val(val, data->temp_high[nr] - 15, data->temp_high[nr]); 1592 val = data->temp_high[nr] - val; 1593 1594 /* convert value to register contents */ 1595 reg = f71882fg_read8(data, F71882FG_REG_TEMP_HYST(nr / 2)); 1596 if (nr & 1) 1597 reg = (reg & 0x0f) | (val << 4); 1598 else 1599 reg = (reg & 0xf0) | val; 1600 f71882fg_write8(data, F71882FG_REG_TEMP_HYST(nr / 2), reg); 1601 data->temp_hyst[nr / 2] = reg; 1602 1603 mutex_unlock(&data->update_lock); 1604 return ret; 1605} 1606 1607static ssize_t show_temp_crit(struct device *dev, struct device_attribute 1608 *devattr, char *buf) 1609{ 1610 struct f71882fg_data *data = f71882fg_update_device(dev); 1611 int nr = to_sensor_dev_attr_2(devattr)->index; 1612 1613 return sprintf(buf, "%d\n", data->temp_ovt[nr] * 1000); 1614} 1615 1616static ssize_t store_temp_crit(struct device *dev, struct device_attribute 1617 *devattr, const char *buf, size_t count) 1618{ 1619 struct f71882fg_data *data = dev_get_drvdata(dev); 1620 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1621 long val; 1622 1623 err = kstrtol(buf, 10, &val); 1624 if (err) 1625 return err; 1626 1627 val /= 1000; 1628 val = clamp_val(val, 0, 255); 1629 1630 mutex_lock(&data->update_lock); 1631 f71882fg_write8(data, F71882FG_REG_TEMP_OVT(nr), val); 1632 data->temp_ovt[nr] = val; 1633 mutex_unlock(&data->update_lock); 1634 1635 return count; 1636} 1637 1638static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute 1639 *devattr, char *buf) 1640{ 1641 struct f71882fg_data *data = f71882fg_update_device(dev); 1642 int nr = to_sensor_dev_attr_2(devattr)->index; 1643 int temp_crit_hyst; 1644 1645 mutex_lock(&data->update_lock); 1646 if (nr & 1) 1647 temp_crit_hyst = data->temp_hyst[nr / 2] >> 4; 1648 else 1649 temp_crit_hyst = data->temp_hyst[nr / 2] & 0x0f; 1650 temp_crit_hyst = (data->temp_ovt[nr] - temp_crit_hyst) * 1000; 1651 mutex_unlock(&data->update_lock); 1652 1653 return sprintf(buf, "%d\n", temp_crit_hyst); 1654} 1655 1656static ssize_t show_temp_type(struct device *dev, struct device_attribute 1657 *devattr, char *buf) 1658{ 1659 struct f71882fg_data *data = f71882fg_update_device(dev); 1660 int nr = to_sensor_dev_attr_2(devattr)->index; 1661 1662 return sprintf(buf, "%d\n", data->temp_type[nr]); 1663} 1664 1665static ssize_t show_temp_beep(struct device *dev, struct device_attribute 1666 *devattr, char *buf) 1667{ 1668 struct f71882fg_data *data = f71882fg_update_device(dev); 1669 int nr = to_sensor_dev_attr_2(devattr)->index; 1670 1671 if (data->temp_beep & (1 << nr)) 1672 return sprintf(buf, "1\n"); 1673 else 1674 return sprintf(buf, "0\n"); 1675} 1676 1677static ssize_t store_temp_beep(struct device *dev, struct device_attribute 1678 *devattr, const char *buf, size_t count) 1679{ 1680 struct f71882fg_data *data = dev_get_drvdata(dev); 1681 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1682 unsigned long val; 1683 1684 err = kstrtoul(buf, 10, &val); 1685 if (err) 1686 return err; 1687 1688 mutex_lock(&data->update_lock); 1689 data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP); 1690 if (val) 1691 data->temp_beep |= 1 << nr; 1692 else 1693 data->temp_beep &= ~(1 << nr); 1694 1695 f71882fg_write8(data, F71882FG_REG_TEMP_BEEP, data->temp_beep); 1696 mutex_unlock(&data->update_lock); 1697 1698 return count; 1699} 1700 1701static ssize_t show_temp_alarm(struct device *dev, struct device_attribute 1702 *devattr, char *buf) 1703{ 1704 struct f71882fg_data *data = f71882fg_update_device(dev); 1705 int nr = to_sensor_dev_attr_2(devattr)->index; 1706 1707 if (data->temp_status & (1 << nr)) 1708 return sprintf(buf, "1\n"); 1709 else 1710 return sprintf(buf, "0\n"); 1711} 1712 1713static ssize_t show_temp_fault(struct device *dev, struct device_attribute 1714 *devattr, char *buf) 1715{ 1716 struct f71882fg_data *data = f71882fg_update_device(dev); 1717 int nr = to_sensor_dev_attr_2(devattr)->index; 1718 1719 if (data->temp_diode_open & (1 << nr)) 1720 return sprintf(buf, "1\n"); 1721 else 1722 return sprintf(buf, "0\n"); 1723} 1724 1725static ssize_t show_pwm(struct device *dev, 1726 struct device_attribute *devattr, char *buf) 1727{ 1728 struct f71882fg_data *data = f71882fg_update_device(dev); 1729 int val, nr = to_sensor_dev_attr_2(devattr)->index; 1730 mutex_lock(&data->update_lock); 1731 if (data->pwm_enable & (1 << (2 * nr))) 1732 /* PWM mode */ 1733 val = data->pwm[nr]; 1734 else { 1735 /* RPM mode */ 1736 val = 255 * fan_from_reg(data->fan_target[nr]) 1737 / fan_from_reg(data->fan_full_speed[nr]); 1738 } 1739 mutex_unlock(&data->update_lock); 1740 return sprintf(buf, "%d\n", val); 1741} 1742 1743static ssize_t store_pwm(struct device *dev, 1744 struct device_attribute *devattr, const char *buf, 1745 size_t count) 1746{ 1747 struct f71882fg_data *data = dev_get_drvdata(dev); 1748 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1749 long val; 1750 1751 err = kstrtol(buf, 10, &val); 1752 if (err) 1753 return err; 1754 1755 val = clamp_val(val, 0, 255); 1756 1757 mutex_lock(&data->update_lock); 1758 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE); 1759 if ((data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 3) != 2) || 1760 (data->type != f8000 && !((data->pwm_enable >> 2 * nr) & 2))) { 1761 count = -EROFS; 1762 goto leave; 1763 } 1764 if (data->pwm_enable & (1 << (2 * nr))) { 1765 /* PWM mode */ 1766 f71882fg_write8(data, F71882FG_REG_PWM(nr), val); 1767 data->pwm[nr] = val; 1768 } else { 1769 /* RPM mode */ 1770 int target, full_speed; 1771 full_speed = f71882fg_read16(data, 1772 F71882FG_REG_FAN_FULL_SPEED(nr)); 1773 target = fan_to_reg(val * fan_from_reg(full_speed) / 255); 1774 f71882fg_write16(data, F71882FG_REG_FAN_TARGET(nr), target); 1775 data->fan_target[nr] = target; 1776 data->fan_full_speed[nr] = full_speed; 1777 } 1778leave: 1779 mutex_unlock(&data->update_lock); 1780 1781 return count; 1782} 1783 1784static ssize_t show_simple_pwm(struct device *dev, 1785 struct device_attribute *devattr, char *buf) 1786{ 1787 struct f71882fg_data *data = f71882fg_update_device(dev); 1788 int val, nr = to_sensor_dev_attr_2(devattr)->index; 1789 1790 val = data->pwm[nr]; 1791 return sprintf(buf, "%d\n", val); 1792} 1793 1794static ssize_t store_simple_pwm(struct device *dev, 1795 struct device_attribute *devattr, 1796 const char *buf, size_t count) 1797{ 1798 struct f71882fg_data *data = dev_get_drvdata(dev); 1799 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1800 long val; 1801 1802 err = kstrtol(buf, 10, &val); 1803 if (err) 1804 return err; 1805 1806 val = clamp_val(val, 0, 255); 1807 1808 mutex_lock(&data->update_lock); 1809 f71882fg_write8(data, F71882FG_REG_PWM(nr), val); 1810 data->pwm[nr] = val; 1811 mutex_unlock(&data->update_lock); 1812 1813 return count; 1814} 1815 1816static ssize_t show_pwm_enable(struct device *dev, 1817 struct device_attribute *devattr, char *buf) 1818{ 1819 int result = 0; 1820 struct f71882fg_data *data = f71882fg_update_device(dev); 1821 int nr = to_sensor_dev_attr_2(devattr)->index; 1822 1823 switch ((data->pwm_enable >> 2 * nr) & 3) { 1824 case 0: 1825 case 1: 1826 result = 2; /* Normal auto mode */ 1827 break; 1828 case 2: 1829 result = 1; /* Manual mode */ 1830 break; 1831 case 3: 1832 if (data->type == f8000) 1833 result = 3; /* Thermostat mode */ 1834 else 1835 result = 1; /* Manual mode */ 1836 break; 1837 } 1838 1839 return sprintf(buf, "%d\n", result); 1840} 1841 1842static ssize_t store_pwm_enable(struct device *dev, struct device_attribute 1843 *devattr, const char *buf, size_t count) 1844{ 1845 struct f71882fg_data *data = dev_get_drvdata(dev); 1846 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1847 long val; 1848 1849 err = kstrtol(buf, 10, &val); 1850 if (err) 1851 return err; 1852 1853 /* Special case for F8000 pwm channel 3 which only does auto mode */ 1854 if (data->type == f8000 && nr == 2 && val != 2) 1855 return -EINVAL; 1856 1857 mutex_lock(&data->update_lock); 1858 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE); 1859 /* Special case for F8000 auto PWM mode / Thermostat mode */ 1860 if (data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 1)) { 1861 switch (val) { 1862 case 2: 1863 data->pwm_enable &= ~(2 << (2 * nr)); 1864 break; /* Normal auto mode */ 1865 case 3: 1866 data->pwm_enable |= 2 << (2 * nr); 1867 break; /* Thermostat mode */ 1868 default: 1869 count = -EINVAL; 1870 goto leave; 1871 } 1872 } else { 1873 switch (val) { 1874 case 1: 1875 /* The f71858fg does not support manual RPM mode */ 1876 if (data->type == f71858fg && 1877 ((data->pwm_enable >> (2 * nr)) & 1)) { 1878 count = -EINVAL; 1879 goto leave; 1880 } 1881 data->pwm_enable |= 2 << (2 * nr); 1882 break; /* Manual */ 1883 case 2: 1884 data->pwm_enable &= ~(2 << (2 * nr)); 1885 break; /* Normal auto mode */ 1886 default: 1887 count = -EINVAL; 1888 goto leave; 1889 } 1890 } 1891 f71882fg_write8(data, F71882FG_REG_PWM_ENABLE, data->pwm_enable); 1892leave: 1893 mutex_unlock(&data->update_lock); 1894 1895 return count; 1896} 1897 1898static ssize_t show_pwm_auto_point_pwm(struct device *dev, 1899 struct device_attribute *devattr, 1900 char *buf) 1901{ 1902 int result; 1903 struct f71882fg_data *data = f71882fg_update_device(dev); 1904 int pwm = to_sensor_dev_attr_2(devattr)->index; 1905 int point = to_sensor_dev_attr_2(devattr)->nr; 1906 1907 mutex_lock(&data->update_lock); 1908 if (data->pwm_enable & (1 << (2 * pwm))) { 1909 /* PWM mode */ 1910 result = data->pwm_auto_point_pwm[pwm][point]; 1911 } else { 1912 /* RPM mode */ 1913 result = 32 * 255 / (32 + data->pwm_auto_point_pwm[pwm][point]); 1914 } 1915 mutex_unlock(&data->update_lock); 1916 1917 return sprintf(buf, "%d\n", result); 1918} 1919 1920static ssize_t store_pwm_auto_point_pwm(struct device *dev, 1921 struct device_attribute *devattr, 1922 const char *buf, size_t count) 1923{ 1924 struct f71882fg_data *data = dev_get_drvdata(dev); 1925 int err, pwm = to_sensor_dev_attr_2(devattr)->index; 1926 int point = to_sensor_dev_attr_2(devattr)->nr; 1927 long val; 1928 1929 err = kstrtol(buf, 10, &val); 1930 if (err) 1931 return err; 1932 1933 val = clamp_val(val, 0, 255); 1934 1935 mutex_lock(&data->update_lock); 1936 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE); 1937 if (data->pwm_enable & (1 << (2 * pwm))) { 1938 /* PWM mode */ 1939 } else { 1940 /* RPM mode */ 1941 if (val < 29) /* Prevent negative numbers */ 1942 val = 255; 1943 else 1944 val = (255 - val) * 32 / val; 1945 } 1946 f71882fg_write8(data, F71882FG_REG_POINT_PWM(pwm, point), val); 1947 data->pwm_auto_point_pwm[pwm][point] = val; 1948 mutex_unlock(&data->update_lock); 1949 1950 return count; 1951} 1952 1953static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev, 1954 struct device_attribute *devattr, 1955 char *buf) 1956{ 1957 int result = 0; 1958 struct f71882fg_data *data = f71882fg_update_device(dev); 1959 int nr = to_sensor_dev_attr_2(devattr)->index; 1960 int point = to_sensor_dev_attr_2(devattr)->nr; 1961 1962 mutex_lock(&data->update_lock); 1963 if (nr & 1) 1964 result = data->pwm_auto_point_hyst[nr / 2] >> 4; 1965 else 1966 result = data->pwm_auto_point_hyst[nr / 2] & 0x0f; 1967 result = 1000 * (data->pwm_auto_point_temp[nr][point] - result); 1968 mutex_unlock(&data->update_lock); 1969 1970 return sprintf(buf, "%d\n", result); 1971} 1972 1973static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev, 1974 struct device_attribute *devattr, 1975 const char *buf, size_t count) 1976{ 1977 struct f71882fg_data *data = dev_get_drvdata(dev); 1978 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1979 int point = to_sensor_dev_attr_2(devattr)->nr; 1980 u8 reg; 1981 long val; 1982 1983 err = kstrtol(buf, 10, &val); 1984 if (err) 1985 return err; 1986 1987 val /= 1000; 1988 1989 mutex_lock(&data->update_lock); 1990 data->pwm_auto_point_temp[nr][point] = 1991 f71882fg_read8(data, F71882FG_REG_POINT_TEMP(nr, point)); 1992 val = clamp_val(val, data->pwm_auto_point_temp[nr][point] - 15, 1993 data->pwm_auto_point_temp[nr][point]); 1994 val = data->pwm_auto_point_temp[nr][point] - val; 1995 1996 reg = f71882fg_read8(data, F71882FG_REG_FAN_HYST(nr / 2)); 1997 if (nr & 1) 1998 reg = (reg & 0x0f) | (val << 4); 1999 else 2000 reg = (reg & 0xf0) | val; 2001 2002 f71882fg_write8(data, F71882FG_REG_FAN_HYST(nr / 2), reg); 2003 data->pwm_auto_point_hyst[nr / 2] = reg; 2004 mutex_unlock(&data->update_lock); 2005 2006 return count; 2007} 2008 2009static ssize_t show_pwm_interpolate(struct device *dev, 2010 struct device_attribute *devattr, char *buf) 2011{ 2012 int result; 2013 struct f71882fg_data *data = f71882fg_update_device(dev); 2014 int nr = to_sensor_dev_attr_2(devattr)->index; 2015 2016 result = (data->pwm_auto_point_mapping[nr] >> 4) & 1; 2017 2018 return sprintf(buf, "%d\n", result); 2019} 2020 2021static ssize_t store_pwm_interpolate(struct device *dev, 2022 struct device_attribute *devattr, 2023 const char *buf, size_t count) 2024{ 2025 struct f71882fg_data *data = dev_get_drvdata(dev); 2026 int err, nr = to_sensor_dev_attr_2(devattr)->index; 2027 unsigned long val; 2028 2029 err = kstrtoul(buf, 10, &val); 2030 if (err) 2031 return err; 2032 2033 mutex_lock(&data->update_lock); 2034 data->pwm_auto_point_mapping[nr] = 2035 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr)); 2036 if (val) 2037 val = data->pwm_auto_point_mapping[nr] | (1 << 4); 2038 else 2039 val = data->pwm_auto_point_mapping[nr] & (~(1 << 4)); 2040 f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val); 2041 data->pwm_auto_point_mapping[nr] = val; 2042 mutex_unlock(&data->update_lock); 2043 2044 return count; 2045} 2046 2047static ssize_t show_pwm_auto_point_channel(struct device *dev, 2048 struct device_attribute *devattr, 2049 char *buf) 2050{ 2051 int result; 2052 struct f71882fg_data *data = f71882fg_update_device(dev); 2053 int nr = to_sensor_dev_attr_2(devattr)->index; 2054 2055 result = 1 << ((data->pwm_auto_point_mapping[nr] & 3) - 2056 data->temp_start); 2057 2058 return sprintf(buf, "%d\n", result); 2059} 2060 2061static ssize_t store_pwm_auto_point_channel(struct device *dev, 2062 struct device_attribute *devattr, 2063 const char *buf, size_t count) 2064{ 2065 struct f71882fg_data *data = dev_get_drvdata(dev); 2066 int err, nr = to_sensor_dev_attr_2(devattr)->index; 2067 long val; 2068 2069 err = kstrtol(buf, 10, &val); 2070 if (err) 2071 return err; 2072 2073 switch (val) { 2074 case 1: 2075 val = 0; 2076 break; 2077 case 2: 2078 val = 1; 2079 break; 2080 case 4: 2081 val = 2; 2082 break; 2083 default: 2084 return -EINVAL; 2085 } 2086 val += data->temp_start; 2087 mutex_lock(&data->update_lock); 2088 data->pwm_auto_point_mapping[nr] = 2089 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr)); 2090 val = (data->pwm_auto_point_mapping[nr] & 0xfc) | val; 2091 f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val); 2092 data->pwm_auto_point_mapping[nr] = val; 2093 mutex_unlock(&data->update_lock); 2094 2095 return count; 2096} 2097 2098static ssize_t show_pwm_auto_point_temp(struct device *dev, 2099 struct device_attribute *devattr, 2100 char *buf) 2101{ 2102 int result; 2103 struct f71882fg_data *data = f71882fg_update_device(dev); 2104 int pwm = to_sensor_dev_attr_2(devattr)->index; 2105 int point = to_sensor_dev_attr_2(devattr)->nr; 2106 2107 result = data->pwm_auto_point_temp[pwm][point]; 2108 return sprintf(buf, "%d\n", 1000 * result); 2109} 2110 2111static ssize_t store_pwm_auto_point_temp(struct device *dev, 2112 struct device_attribute *devattr, 2113 const char *buf, size_t count) 2114{ 2115 struct f71882fg_data *data = dev_get_drvdata(dev); 2116 int err, pwm = to_sensor_dev_attr_2(devattr)->index; 2117 int point = to_sensor_dev_attr_2(devattr)->nr; 2118 long val; 2119 2120 err = kstrtol(buf, 10, &val); 2121 if (err) 2122 return err; 2123 2124 val /= 1000; 2125 2126 if (data->auto_point_temp_signed) 2127 val = clamp_val(val, -128, 127); 2128 else 2129 val = clamp_val(val, 0, 127); 2130 2131 mutex_lock(&data->update_lock); 2132 f71882fg_write8(data, F71882FG_REG_POINT_TEMP(pwm, point), val); 2133 data->pwm_auto_point_temp[pwm][point] = val; 2134 mutex_unlock(&data->update_lock); 2135 2136 return count; 2137} 2138 2139static ssize_t show_name(struct device *dev, struct device_attribute *devattr, 2140 char *buf) 2141{ 2142 struct f71882fg_data *data = dev_get_drvdata(dev); 2143 return sprintf(buf, "%s\n", f71882fg_names[data->type]); 2144} 2145 2146static int f71882fg_create_sysfs_files(struct platform_device *pdev, 2147 struct sensor_device_attribute_2 *attr, int count) 2148{ 2149 int err, i; 2150 2151 for (i = 0; i < count; i++) { 2152 err = device_create_file(&pdev->dev, &attr[i].dev_attr); 2153 if (err) 2154 return err; 2155 } 2156 return 0; 2157} 2158 2159static void f71882fg_remove_sysfs_files(struct platform_device *pdev, 2160 struct sensor_device_attribute_2 *attr, int count) 2161{ 2162 int i; 2163 2164 for (i = 0; i < count; i++) 2165 device_remove_file(&pdev->dev, &attr[i].dev_attr); 2166} 2167 2168static int f71882fg_create_fan_sysfs_files( 2169 struct platform_device *pdev, int idx) 2170{ 2171 struct f71882fg_data *data = platform_get_drvdata(pdev); 2172 int err; 2173 2174 /* Sanity check the pwm setting */ 2175 err = 0; 2176 switch (data->type) { 2177 case f71858fg: 2178 if (((data->pwm_enable >> (idx * 2)) & 3) == 3) 2179 err = 1; 2180 break; 2181 case f71862fg: 2182 if (((data->pwm_enable >> (idx * 2)) & 1) != 1) 2183 err = 1; 2184 break; 2185 case f8000: 2186 if (idx == 2) 2187 err = data->pwm_enable & 0x20; 2188 break; 2189 default: 2190 break; 2191 } 2192 if (err) { 2193 dev_err(&pdev->dev, 2194 "Invalid (reserved) pwm settings: 0x%02x, " 2195 "skipping fan %d\n", 2196 (data->pwm_enable >> (idx * 2)) & 3, idx + 1); 2197 return 0; /* This is a non fatal condition */ 2198 } 2199 2200 err = f71882fg_create_sysfs_files(pdev, &fxxxx_fan_attr[idx][0], 2201 ARRAY_SIZE(fxxxx_fan_attr[0])); 2202 if (err) 2203 return err; 2204 2205 if (f71882fg_fan_has_beep[data->type]) { 2206 err = f71882fg_create_sysfs_files(pdev, 2207 &fxxxx_fan_beep_attr[idx], 2208 1); 2209 if (err) 2210 return err; 2211 } 2212 2213 dev_info(&pdev->dev, "Fan: %d is in %s mode\n", idx + 1, 2214 (data->pwm_enable & (1 << (2 * idx))) ? "duty-cycle" : "RPM"); 2215 2216 /* Check for unsupported auto pwm settings */ 2217 switch (data->type) { 2218 case f71808e: 2219 case f71808a: 2220 case f71869: 2221 case f71869a: 2222 case f71889fg: 2223 case f71889ed: 2224 case f71889a: 2225 data->pwm_auto_point_mapping[idx] = 2226 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(idx)); 2227 if ((data->pwm_auto_point_mapping[idx] & 0x80) || 2228 (data->pwm_auto_point_mapping[idx] & 3) == 0) { 2229 dev_warn(&pdev->dev, 2230 "Auto pwm controlled by raw digital " 2231 "data, disabling pwm auto_point " 2232 "sysfs attributes for fan %d\n", idx + 1); 2233 return 0; /* This is a non fatal condition */ 2234 } 2235 break; 2236 default: 2237 break; 2238 } 2239 2240 switch (data->type) { 2241 case f71862fg: 2242 err = f71882fg_create_sysfs_files(pdev, 2243 &f71862fg_auto_pwm_attr[idx][0], 2244 ARRAY_SIZE(f71862fg_auto_pwm_attr[0])); 2245 break; 2246 case f71808e: 2247 case f71869: 2248 err = f71882fg_create_sysfs_files(pdev, 2249 &f71869_auto_pwm_attr[idx][0], 2250 ARRAY_SIZE(f71869_auto_pwm_attr[0])); 2251 break; 2252 case f8000: 2253 err = f71882fg_create_sysfs_files(pdev, 2254 &f8000_auto_pwm_attr[idx][0], 2255 ARRAY_SIZE(f8000_auto_pwm_attr[0])); 2256 break; 2257 default: 2258 err = f71882fg_create_sysfs_files(pdev, 2259 &fxxxx_auto_pwm_attr[idx][0], 2260 ARRAY_SIZE(fxxxx_auto_pwm_attr[0])); 2261 } 2262 2263 return err; 2264} 2265 2266static int f71882fg_probe(struct platform_device *pdev) 2267{ 2268 struct f71882fg_data *data; 2269 struct f71882fg_sio_data *sio_data = dev_get_platdata(&pdev->dev); 2270 int nr_fans = f71882fg_nr_fans[sio_data->type]; 2271 int nr_temps = f71882fg_nr_temps[sio_data->type]; 2272 int err, i; 2273 u8 start_reg, reg; 2274 2275 data = devm_kzalloc(&pdev->dev, sizeof(struct f71882fg_data), 2276 GFP_KERNEL); 2277 if (!data) 2278 return -ENOMEM; 2279 2280 data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start; 2281 data->type = sio_data->type; 2282 data->temp_start = 2283 (data->type == f71858fg || data->type == f8000) ? 0 : 1; 2284 mutex_init(&data->update_lock); 2285 platform_set_drvdata(pdev, data); 2286 2287 start_reg = f71882fg_read8(data, F71882FG_REG_START); 2288 if (start_reg & 0x04) { 2289 dev_warn(&pdev->dev, "Hardware monitor is powered down\n"); 2290 return -ENODEV; 2291 } 2292 if (!(start_reg & 0x03)) { 2293 dev_warn(&pdev->dev, "Hardware monitoring not activated\n"); 2294 return -ENODEV; 2295 } 2296 2297 /* Register sysfs interface files */ 2298 err = device_create_file(&pdev->dev, &dev_attr_name); 2299 if (err) 2300 goto exit_unregister_sysfs; 2301 2302 if (start_reg & 0x01) { 2303 switch (data->type) { 2304 case f71858fg: 2305 data->temp_config = 2306 f71882fg_read8(data, F71882FG_REG_TEMP_CONFIG); 2307 if (data->temp_config & 0x10) 2308 /* 2309 * The f71858fg temperature alarms behave as 2310 * the f8000 alarms in this mode 2311 */ 2312 err = f71882fg_create_sysfs_files(pdev, 2313 f8000_temp_attr, 2314 ARRAY_SIZE(f8000_temp_attr)); 2315 else 2316 err = f71882fg_create_sysfs_files(pdev, 2317 f71858fg_temp_attr, 2318 ARRAY_SIZE(f71858fg_temp_attr)); 2319 break; 2320 case f8000: 2321 err = f71882fg_create_sysfs_files(pdev, 2322 f8000_temp_attr, 2323 ARRAY_SIZE(f8000_temp_attr)); 2324 break; 2325 default: 2326 err = f71882fg_create_sysfs_files(pdev, 2327 &fxxxx_temp_attr[0][0], 2328 ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps); 2329 } 2330 if (err) 2331 goto exit_unregister_sysfs; 2332 2333 if (f71882fg_temp_has_beep[data->type]) { 2334 err = f71882fg_create_sysfs_files(pdev, 2335 &fxxxx_temp_beep_attr[0][0], 2336 ARRAY_SIZE(fxxxx_temp_beep_attr[0]) 2337 * nr_temps); 2338 if (err) 2339 goto exit_unregister_sysfs; 2340 } 2341 2342 for (i = 0; i < F71882FG_MAX_INS; i++) { 2343 if (f71882fg_has_in[data->type][i]) { 2344 err = device_create_file(&pdev->dev, 2345 &fxxxx_in_attr[i].dev_attr); 2346 if (err) 2347 goto exit_unregister_sysfs; 2348 } 2349 } 2350 if (f71882fg_has_in1_alarm[data->type]) { 2351 err = f71882fg_create_sysfs_files(pdev, 2352 fxxxx_in1_alarm_attr, 2353 ARRAY_SIZE(fxxxx_in1_alarm_attr)); 2354 if (err) 2355 goto exit_unregister_sysfs; 2356 } 2357 } 2358 2359 if (start_reg & 0x02) { 2360 switch (data->type) { 2361 case f71808e: 2362 case f71808a: 2363 case f71869: 2364 case f71869a: 2365 /* These always have signed auto point temps */ 2366 data->auto_point_temp_signed = 1; 2367 /* Fall through to select correct fan/pwm reg bank! */ 2368 case f71889fg: 2369 case f71889ed: 2370 case f71889a: 2371 reg = f71882fg_read8(data, F71882FG_REG_FAN_FAULT_T); 2372 if (reg & F71882FG_FAN_NEG_TEMP_EN) 2373 data->auto_point_temp_signed = 1; 2374 /* Ensure banked pwm registers point to right bank */ 2375 reg &= ~F71882FG_FAN_PROG_SEL; 2376 f71882fg_write8(data, F71882FG_REG_FAN_FAULT_T, reg); 2377 break; 2378 default: 2379 break; 2380 } 2381 2382 data->pwm_enable = 2383 f71882fg_read8(data, F71882FG_REG_PWM_ENABLE); 2384 2385 for (i = 0; i < nr_fans; i++) { 2386 err = f71882fg_create_fan_sysfs_files(pdev, i); 2387 if (err) 2388 goto exit_unregister_sysfs; 2389 } 2390 2391 /* Some types have 1 extra fan with limited functionality */ 2392 switch (data->type) { 2393 case f71808a: 2394 err = f71882fg_create_sysfs_files(pdev, 2395 f71808a_fan3_attr, 2396 ARRAY_SIZE(f71808a_fan3_attr)); 2397 break; 2398 case f8000: 2399 err = f71882fg_create_sysfs_files(pdev, 2400 f8000_fan_attr, 2401 ARRAY_SIZE(f8000_fan_attr)); 2402 break; 2403 default: 2404 break; 2405 } 2406 if (err) 2407 goto exit_unregister_sysfs; 2408 } 2409 2410 data->hwmon_dev = hwmon_device_register(&pdev->dev); 2411 if (IS_ERR(data->hwmon_dev)) { 2412 err = PTR_ERR(data->hwmon_dev); 2413 data->hwmon_dev = NULL; 2414 goto exit_unregister_sysfs; 2415 } 2416 2417 return 0; 2418 2419exit_unregister_sysfs: 2420 f71882fg_remove(pdev); /* Will unregister the sysfs files for us */ 2421 return err; /* f71882fg_remove() also frees our data */ 2422} 2423 2424static int f71882fg_remove(struct platform_device *pdev) 2425{ 2426 struct f71882fg_data *data = platform_get_drvdata(pdev); 2427 int nr_fans = f71882fg_nr_fans[data->type]; 2428 int nr_temps = f71882fg_nr_temps[data->type]; 2429 int i; 2430 u8 start_reg = f71882fg_read8(data, F71882FG_REG_START); 2431 2432 if (data->hwmon_dev) 2433 hwmon_device_unregister(data->hwmon_dev); 2434 2435 device_remove_file(&pdev->dev, &dev_attr_name); 2436 2437 if (start_reg & 0x01) { 2438 switch (data->type) { 2439 case f71858fg: 2440 if (data->temp_config & 0x10) 2441 f71882fg_remove_sysfs_files(pdev, 2442 f8000_temp_attr, 2443 ARRAY_SIZE(f8000_temp_attr)); 2444 else 2445 f71882fg_remove_sysfs_files(pdev, 2446 f71858fg_temp_attr, 2447 ARRAY_SIZE(f71858fg_temp_attr)); 2448 break; 2449 case f8000: 2450 f71882fg_remove_sysfs_files(pdev, 2451 f8000_temp_attr, 2452 ARRAY_SIZE(f8000_temp_attr)); 2453 break; 2454 default: 2455 f71882fg_remove_sysfs_files(pdev, 2456 &fxxxx_temp_attr[0][0], 2457 ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps); 2458 } 2459 if (f71882fg_temp_has_beep[data->type]) { 2460 f71882fg_remove_sysfs_files(pdev, 2461 &fxxxx_temp_beep_attr[0][0], 2462 ARRAY_SIZE(fxxxx_temp_beep_attr[0]) * nr_temps); 2463 } 2464 2465 for (i = 0; i < F71882FG_MAX_INS; i++) { 2466 if (f71882fg_has_in[data->type][i]) { 2467 device_remove_file(&pdev->dev, 2468 &fxxxx_in_attr[i].dev_attr); 2469 } 2470 } 2471 if (f71882fg_has_in1_alarm[data->type]) { 2472 f71882fg_remove_sysfs_files(pdev, 2473 fxxxx_in1_alarm_attr, 2474 ARRAY_SIZE(fxxxx_in1_alarm_attr)); 2475 } 2476 } 2477 2478 if (start_reg & 0x02) { 2479 f71882fg_remove_sysfs_files(pdev, &fxxxx_fan_attr[0][0], 2480 ARRAY_SIZE(fxxxx_fan_attr[0]) * nr_fans); 2481 2482 if (f71882fg_fan_has_beep[data->type]) { 2483 f71882fg_remove_sysfs_files(pdev, 2484 fxxxx_fan_beep_attr, nr_fans); 2485 } 2486 2487 switch (data->type) { 2488 case f71808a: 2489 f71882fg_remove_sysfs_files(pdev, 2490 &fxxxx_auto_pwm_attr[0][0], 2491 ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans); 2492 f71882fg_remove_sysfs_files(pdev, 2493 f71808a_fan3_attr, 2494 ARRAY_SIZE(f71808a_fan3_attr)); 2495 break; 2496 case f71862fg: 2497 f71882fg_remove_sysfs_files(pdev, 2498 &f71862fg_auto_pwm_attr[0][0], 2499 ARRAY_SIZE(f71862fg_auto_pwm_attr[0]) * 2500 nr_fans); 2501 break; 2502 case f71808e: 2503 case f71869: 2504 f71882fg_remove_sysfs_files(pdev, 2505 &f71869_auto_pwm_attr[0][0], 2506 ARRAY_SIZE(f71869_auto_pwm_attr[0]) * nr_fans); 2507 break; 2508 case f8000: 2509 f71882fg_remove_sysfs_files(pdev, 2510 f8000_fan_attr, 2511 ARRAY_SIZE(f8000_fan_attr)); 2512 f71882fg_remove_sysfs_files(pdev, 2513 &f8000_auto_pwm_attr[0][0], 2514 ARRAY_SIZE(f8000_auto_pwm_attr[0]) * nr_fans); 2515 break; 2516 default: 2517 f71882fg_remove_sysfs_files(pdev, 2518 &fxxxx_auto_pwm_attr[0][0], 2519 ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans); 2520 } 2521 } 2522 return 0; 2523} 2524 2525static int __init f71882fg_find(int sioaddr, struct f71882fg_sio_data *sio_data) 2526{ 2527 u16 devid; 2528 unsigned short address; 2529 int err = superio_enter(sioaddr); 2530 if (err) 2531 return err; 2532 2533 devid = superio_inw(sioaddr, SIO_REG_MANID); 2534 if (devid != SIO_FINTEK_ID) { 2535 pr_debug("Not a Fintek device\n"); 2536 err = -ENODEV; 2537 goto exit; 2538 } 2539 2540 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID); 2541 switch (devid) { 2542 case SIO_F71808E_ID: 2543 sio_data->type = f71808e; 2544 break; 2545 case SIO_F71808A_ID: 2546 sio_data->type = f71808a; 2547 break; 2548 case SIO_F71858_ID: 2549 sio_data->type = f71858fg; 2550 break; 2551 case SIO_F71862_ID: 2552 sio_data->type = f71862fg; 2553 break; 2554 case SIO_F71869_ID: 2555 sio_data->type = f71869; 2556 break; 2557 case SIO_F71869A_ID: 2558 sio_data->type = f71869a; 2559 break; 2560 case SIO_F71882_ID: 2561 sio_data->type = f71882fg; 2562 break; 2563 case SIO_F71889_ID: 2564 sio_data->type = f71889fg; 2565 break; 2566 case SIO_F71889E_ID: 2567 sio_data->type = f71889ed; 2568 break; 2569 case SIO_F71889A_ID: 2570 sio_data->type = f71889a; 2571 break; 2572 case SIO_F8000_ID: 2573 sio_data->type = f8000; 2574 break; 2575 case SIO_F81865_ID: 2576 sio_data->type = f81865f; 2577 break; 2578 default: 2579 pr_info("Unsupported Fintek device: %04x\n", 2580 (unsigned int)devid); 2581 err = -ENODEV; 2582 goto exit; 2583 } 2584 2585 if (sio_data->type == f71858fg) 2586 superio_select(sioaddr, SIO_F71858FG_LD_HWM); 2587 else 2588 superio_select(sioaddr, SIO_F71882FG_LD_HWM); 2589 2590 if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) { 2591 pr_warn("Device not activated\n"); 2592 err = -ENODEV; 2593 goto exit; 2594 } 2595 2596 address = superio_inw(sioaddr, SIO_REG_ADDR); 2597 if (address == 0) { 2598 pr_warn("Base address not set\n"); 2599 err = -ENODEV; 2600 goto exit; 2601 } 2602 address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */ 2603 2604 err = address; 2605 pr_info("Found %s chip at %#x, revision %d\n", 2606 f71882fg_names[sio_data->type], (unsigned int)address, 2607 (int)superio_inb(sioaddr, SIO_REG_DEVREV)); 2608exit: 2609 superio_exit(sioaddr); 2610 return err; 2611} 2612 2613static int __init f71882fg_device_add(int address, 2614 const struct f71882fg_sio_data *sio_data) 2615{ 2616 struct resource res = { 2617 .start = address, 2618 .end = address + REGION_LENGTH - 1, 2619 .flags = IORESOURCE_IO, 2620 }; 2621 int err; 2622 2623 f71882fg_pdev = platform_device_alloc(DRVNAME, address); 2624 if (!f71882fg_pdev) 2625 return -ENOMEM; 2626 2627 res.name = f71882fg_pdev->name; 2628 err = acpi_check_resource_conflict(&res); 2629 if (err) 2630 goto exit_device_put; 2631 2632 err = platform_device_add_resources(f71882fg_pdev, &res, 1); 2633 if (err) { 2634 pr_err("Device resource addition failed\n"); 2635 goto exit_device_put; 2636 } 2637 2638 err = platform_device_add_data(f71882fg_pdev, sio_data, 2639 sizeof(struct f71882fg_sio_data)); 2640 if (err) { 2641 pr_err("Platform data allocation failed\n"); 2642 goto exit_device_put; 2643 } 2644 2645 err = platform_device_add(f71882fg_pdev); 2646 if (err) { 2647 pr_err("Device addition failed\n"); 2648 goto exit_device_put; 2649 } 2650 2651 return 0; 2652 2653exit_device_put: 2654 platform_device_put(f71882fg_pdev); 2655 2656 return err; 2657} 2658 2659static int __init f71882fg_init(void) 2660{ 2661 int err; 2662 int address; 2663 struct f71882fg_sio_data sio_data; 2664 2665 memset(&sio_data, 0, sizeof(sio_data)); 2666 2667 address = f71882fg_find(0x2e, &sio_data); 2668 if (address < 0) 2669 address = f71882fg_find(0x4e, &sio_data); 2670 if (address < 0) 2671 return address; 2672 2673 err = platform_driver_register(&f71882fg_driver); 2674 if (err) 2675 return err; 2676 2677 err = f71882fg_device_add(address, &sio_data); 2678 if (err) 2679 goto exit_driver; 2680 2681 return 0; 2682 2683exit_driver: 2684 platform_driver_unregister(&f71882fg_driver); 2685 return err; 2686} 2687 2688static void __exit f71882fg_exit(void) 2689{ 2690 platform_device_unregister(f71882fg_pdev); 2691 platform_driver_unregister(&f71882fg_driver); 2692} 2693 2694MODULE_DESCRIPTION("F71882FG Hardware Monitoring Driver"); 2695MODULE_AUTHOR("Hans Edgington, Hans de Goede <hdegoede@redhat.com>"); 2696MODULE_LICENSE("GPL"); 2697 2698module_init(f71882fg_init); 2699module_exit(f71882fg_exit); 2700