1/* 2 * Driver for the NXP SAA7164 PCIe bridge 3 * 4 * Copyright (c) 2010 Steven Toth <stoth@kernellabs.com> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 20 */ 21 22#include <linux/init.h> 23#include <linux/list.h> 24#include <linux/module.h> 25#include <linux/moduleparam.h> 26#include <linux/kmod.h> 27#include <linux/kernel.h> 28#include <linux/slab.h> 29#include <linux/interrupt.h> 30#include <linux/delay.h> 31#include <asm/div64.h> 32 33#ifdef CONFIG_PROC_FS 34#include <linux/proc_fs.h> 35#endif 36#include "saa7164.h" 37 38MODULE_DESCRIPTION("Driver for NXP SAA7164 based TV cards"); 39MODULE_AUTHOR("Steven Toth <stoth@kernellabs.com>"); 40MODULE_LICENSE("GPL"); 41 42/* 43 * 1 Basic 44 * 2 45 * 4 i2c 46 * 8 api 47 * 16 cmd 48 * 32 bus 49 */ 50 51unsigned int saa_debug; 52module_param_named(debug, saa_debug, int, 0644); 53MODULE_PARM_DESC(debug, "enable debug messages"); 54 55static unsigned int fw_debug; 56module_param(fw_debug, int, 0644); 57MODULE_PARM_DESC(fw_debug, "Firmware debug level def:2"); 58 59unsigned int encoder_buffers = SAA7164_MAX_ENCODER_BUFFERS; 60module_param(encoder_buffers, int, 0644); 61MODULE_PARM_DESC(encoder_buffers, "Total buffers in read queue 16-512 def:64"); 62 63unsigned int vbi_buffers = SAA7164_MAX_VBI_BUFFERS; 64module_param(vbi_buffers, int, 0644); 65MODULE_PARM_DESC(vbi_buffers, "Total buffers in read queue 16-512 def:64"); 66 67unsigned int waitsecs = 10; 68module_param(waitsecs, int, 0644); 69MODULE_PARM_DESC(waitsecs, "timeout on firmware messages"); 70 71static unsigned int card[] = {[0 ... (SAA7164_MAXBOARDS - 1)] = UNSET }; 72module_param_array(card, int, NULL, 0444); 73MODULE_PARM_DESC(card, "card type"); 74 75static unsigned int print_histogram = 64; 76module_param(print_histogram, int, 0644); 77MODULE_PARM_DESC(print_histogram, "print histogram values once"); 78 79unsigned int crc_checking = 1; 80module_param(crc_checking, int, 0644); 81MODULE_PARM_DESC(crc_checking, "enable crc sanity checking on buffers"); 82 83static unsigned int guard_checking = 1; 84module_param(guard_checking, int, 0644); 85MODULE_PARM_DESC(guard_checking, 86 "enable dma sanity checking for buffer overruns"); 87 88static unsigned int saa7164_devcount; 89 90static DEFINE_MUTEX(devlist); 91LIST_HEAD(saa7164_devlist); 92 93#define INT_SIZE 16 94 95static void saa7164_pack_verifier(struct saa7164_buffer *buf) 96{ 97 u8 *p = (u8 *)buf->cpu; 98 int i; 99 100 for (i = 0; i < buf->actual_size; i += 2048) { 101 102 if ((*(p + i + 0) != 0x00) || (*(p + i + 1) != 0x00) || 103 (*(p + i + 2) != 0x01) || (*(p + i + 3) != 0xBA)) { 104 printk(KERN_ERR "No pack at 0x%x\n", i); 105#if 0 106 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1, 107 p + 1, 32, false); 108#endif 109 } 110 } 111} 112 113#define FIXED_VIDEO_PID 0xf1 114#define FIXED_AUDIO_PID 0xf2 115 116static void saa7164_ts_verifier(struct saa7164_buffer *buf) 117{ 118 struct saa7164_port *port = buf->port; 119 u32 i; 120 u8 cc, a; 121 u16 pid; 122 u8 *bufcpu = (u8 *)buf->cpu; 123 124 port->sync_errors = 0; 125 port->v_cc_errors = 0; 126 port->a_cc_errors = 0; 127 128 for (i = 0; i < buf->actual_size; i += 188) { 129 if (*(bufcpu + i) != 0x47) 130 port->sync_errors++; 131 132 /* TODO: Query pid lower 8 bits, ignoring upper bits intensionally */ 133 pid = ((*(bufcpu + i + 1) & 0x1f) << 8) | *(bufcpu + i + 2); 134 cc = *(bufcpu + i + 3) & 0x0f; 135 136 if (pid == FIXED_VIDEO_PID) { 137 a = ((port->last_v_cc + 1) & 0x0f); 138 if (a != cc) { 139 printk(KERN_ERR "video cc last = %x current = %x i = %d\n", 140 port->last_v_cc, cc, i); 141 port->v_cc_errors++; 142 } 143 144 port->last_v_cc = cc; 145 } else 146 if (pid == FIXED_AUDIO_PID) { 147 a = ((port->last_a_cc + 1) & 0x0f); 148 if (a != cc) { 149 printk(KERN_ERR "audio cc last = %x current = %x i = %d\n", 150 port->last_a_cc, cc, i); 151 port->a_cc_errors++; 152 } 153 154 port->last_a_cc = cc; 155 } 156 157 } 158 159 /* Only report errors if we've been through this function atleast 160 * once already and the cached cc values are primed. First time through 161 * always generates errors. 162 */ 163 if (port->v_cc_errors && (port->done_first_interrupt > 1)) 164 printk(KERN_ERR "video pid cc, %d errors\n", port->v_cc_errors); 165 166 if (port->a_cc_errors && (port->done_first_interrupt > 1)) 167 printk(KERN_ERR "audio pid cc, %d errors\n", port->a_cc_errors); 168 169 if (port->sync_errors && (port->done_first_interrupt > 1)) 170 printk(KERN_ERR "sync_errors = %d\n", port->sync_errors); 171 172 if (port->done_first_interrupt == 1) 173 port->done_first_interrupt++; 174} 175 176static void saa7164_histogram_reset(struct saa7164_histogram *hg, char *name) 177{ 178 int i; 179 180 memset(hg, 0, sizeof(struct saa7164_histogram)); 181 strcpy(hg->name, name); 182 183 /* First 30ms x 1ms */ 184 for (i = 0; i < 30; i++) 185 hg->counter1[0 + i].val = i; 186 187 /* 30 - 200ms x 10ms */ 188 for (i = 0; i < 18; i++) 189 hg->counter1[30 + i].val = 30 + (i * 10); 190 191 /* 200 - 2000ms x 100ms */ 192 for (i = 0; i < 15; i++) 193 hg->counter1[48 + i].val = 200 + (i * 200); 194 195 /* Catch all massive value (2secs) */ 196 hg->counter1[55].val = 2000; 197 198 /* Catch all massive value (4secs) */ 199 hg->counter1[56].val = 4000; 200 201 /* Catch all massive value (8secs) */ 202 hg->counter1[57].val = 8000; 203 204 /* Catch all massive value (15secs) */ 205 hg->counter1[58].val = 15000; 206 207 /* Catch all massive value (30secs) */ 208 hg->counter1[59].val = 30000; 209 210 /* Catch all massive value (60secs) */ 211 hg->counter1[60].val = 60000; 212 213 /* Catch all massive value (5mins) */ 214 hg->counter1[61].val = 300000; 215 216 /* Catch all massive value (15mins) */ 217 hg->counter1[62].val = 900000; 218 219 /* Catch all massive values (1hr) */ 220 hg->counter1[63].val = 3600000; 221} 222 223void saa7164_histogram_update(struct saa7164_histogram *hg, u32 val) 224{ 225 int i; 226 for (i = 0; i < 64; i++) { 227 if (val <= hg->counter1[i].val) { 228 hg->counter1[i].count++; 229 hg->counter1[i].update_time = jiffies; 230 break; 231 } 232 } 233} 234 235static void saa7164_histogram_print(struct saa7164_port *port, 236 struct saa7164_histogram *hg) 237{ 238 u32 entries = 0; 239 int i; 240 241 printk(KERN_ERR "Histogram named %s (ms, count, last_update_jiffy)\n", hg->name); 242 for (i = 0; i < 64; i++) { 243 if (hg->counter1[i].count == 0) 244 continue; 245 246 printk(KERN_ERR " %4d %12d %Ld\n", 247 hg->counter1[i].val, 248 hg->counter1[i].count, 249 hg->counter1[i].update_time); 250 251 entries++; 252 } 253 printk(KERN_ERR "Total: %d\n", entries); 254} 255 256static void saa7164_work_enchandler_helper(struct saa7164_port *port, int bufnr) 257{ 258 struct saa7164_dev *dev = port->dev; 259 struct saa7164_buffer *buf = NULL; 260 struct saa7164_user_buffer *ubuf = NULL; 261 struct list_head *c, *n; 262 int i = 0; 263 u8 *p; 264 265 mutex_lock(&port->dmaqueue_lock); 266 list_for_each_safe(c, n, &port->dmaqueue.list) { 267 268 buf = list_entry(c, struct saa7164_buffer, list); 269 if (i++ > port->hwcfg.buffercount) { 270 printk(KERN_ERR "%s() illegal i count %d\n", 271 __func__, i); 272 break; 273 } 274 275 if (buf->idx == bufnr) { 276 277 /* Found the buffer, deal with it */ 278 dprintk(DBGLVL_IRQ, "%s() bufnr: %d\n", __func__, bufnr); 279 280 if (crc_checking) { 281 /* Throw a new checksum on the dma buffer */ 282 buf->crc = crc32(0, buf->cpu, buf->actual_size); 283 } 284 285 if (guard_checking) { 286 p = (u8 *)buf->cpu; 287 if ((*(p + buf->actual_size + 0) != 0xff) || 288 (*(p + buf->actual_size + 1) != 0xff) || 289 (*(p + buf->actual_size + 2) != 0xff) || 290 (*(p + buf->actual_size + 3) != 0xff) || 291 (*(p + buf->actual_size + 0x10) != 0xff) || 292 (*(p + buf->actual_size + 0x11) != 0xff) || 293 (*(p + buf->actual_size + 0x12) != 0xff) || 294 (*(p + buf->actual_size + 0x13) != 0xff)) { 295 printk(KERN_ERR "%s() buf %p guard buffer breach\n", 296 __func__, buf); 297#if 0 298 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1, 299 p + buf->actual_size - 32, 64, false); 300#endif 301 } 302 } 303 304 if ((port->nr != SAA7164_PORT_VBI1) && (port->nr != SAA7164_PORT_VBI2)) { 305 /* Validate the incoming buffer content */ 306 if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_TS) 307 saa7164_ts_verifier(buf); 308 else if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_PS) 309 saa7164_pack_verifier(buf); 310 } 311 312 /* find a free user buffer and clone to it */ 313 if (!list_empty(&port->list_buf_free.list)) { 314 315 /* Pull the first buffer from the used list */ 316 ubuf = list_first_entry(&port->list_buf_free.list, 317 struct saa7164_user_buffer, list); 318 319 if (buf->actual_size <= ubuf->actual_size) { 320 321 memcpy(ubuf->data, buf->cpu, ubuf->actual_size); 322 323 if (crc_checking) { 324 /* Throw a new checksum on the read buffer */ 325 ubuf->crc = crc32(0, ubuf->data, ubuf->actual_size); 326 } 327 328 /* Requeue the buffer on the free list */ 329 ubuf->pos = 0; 330 331 list_move_tail(&ubuf->list, 332 &port->list_buf_used.list); 333 334 /* Flag any userland waiters */ 335 wake_up_interruptible(&port->wait_read); 336 337 } else { 338 printk(KERN_ERR "buf %p bufsize fails match\n", buf); 339 } 340 341 } else 342 printk(KERN_ERR "encirq no free buffers, increase param encoder_buffers\n"); 343 344 /* Ensure offset into buffer remains 0, fill buffer 345 * with known bad data. We check for this data at a later point 346 * in time. */ 347 saa7164_buffer_zero_offsets(port, bufnr); 348 memset(buf->cpu, 0xff, buf->pci_size); 349 if (crc_checking) { 350 /* Throw yet aanother new checksum on the dma buffer */ 351 buf->crc = crc32(0, buf->cpu, buf->actual_size); 352 } 353 354 break; 355 } 356 } 357 mutex_unlock(&port->dmaqueue_lock); 358} 359 360static void saa7164_work_enchandler(struct work_struct *w) 361{ 362 struct saa7164_port *port = 363 container_of(w, struct saa7164_port, workenc); 364 struct saa7164_dev *dev = port->dev; 365 366 u32 wp, mcb, rp, cnt = 0; 367 368 port->last_svc_msecs_diff = port->last_svc_msecs; 369 port->last_svc_msecs = jiffies_to_msecs(jiffies); 370 371 port->last_svc_msecs_diff = port->last_svc_msecs - 372 port->last_svc_msecs_diff; 373 374 saa7164_histogram_update(&port->svc_interval, 375 port->last_svc_msecs_diff); 376 377 port->last_irq_svc_msecs_diff = port->last_svc_msecs - 378 port->last_irq_msecs; 379 380 saa7164_histogram_update(&port->irq_svc_interval, 381 port->last_irq_svc_msecs_diff); 382 383 dprintk(DBGLVL_IRQ, 384 "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n", 385 __func__, 386 port->last_svc_msecs_diff, 387 port->last_irq_svc_msecs_diff, 388 port->last_svc_wp, 389 port->last_svc_rp 390 ); 391 392 /* Current write position */ 393 wp = saa7164_readl(port->bufcounter); 394 if (wp > (port->hwcfg.buffercount - 1)) { 395 printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp); 396 return; 397 } 398 399 /* Most current complete buffer */ 400 if (wp == 0) 401 mcb = (port->hwcfg.buffercount - 1); 402 else 403 mcb = wp - 1; 404 405 while (1) { 406 if (port->done_first_interrupt == 0) { 407 port->done_first_interrupt++; 408 rp = mcb; 409 } else 410 rp = (port->last_svc_rp + 1) % 8; 411 412 if (rp > (port->hwcfg.buffercount - 1)) { 413 printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp); 414 break; 415 } 416 417 saa7164_work_enchandler_helper(port, rp); 418 port->last_svc_rp = rp; 419 cnt++; 420 421 if (rp == mcb) 422 break; 423 } 424 425 /* TODO: Convert this into a /proc/saa7164 style readable file */ 426 if (print_histogram == port->nr) { 427 saa7164_histogram_print(port, &port->irq_interval); 428 saa7164_histogram_print(port, &port->svc_interval); 429 saa7164_histogram_print(port, &port->irq_svc_interval); 430 saa7164_histogram_print(port, &port->read_interval); 431 saa7164_histogram_print(port, &port->poll_interval); 432 /* TODO: fix this to preserve any previous state */ 433 print_histogram = 64 + port->nr; 434 } 435} 436 437static void saa7164_work_vbihandler(struct work_struct *w) 438{ 439 struct saa7164_port *port = 440 container_of(w, struct saa7164_port, workenc); 441 struct saa7164_dev *dev = port->dev; 442 443 u32 wp, mcb, rp, cnt = 0; 444 445 port->last_svc_msecs_diff = port->last_svc_msecs; 446 port->last_svc_msecs = jiffies_to_msecs(jiffies); 447 port->last_svc_msecs_diff = port->last_svc_msecs - 448 port->last_svc_msecs_diff; 449 450 saa7164_histogram_update(&port->svc_interval, 451 port->last_svc_msecs_diff); 452 453 port->last_irq_svc_msecs_diff = port->last_svc_msecs - 454 port->last_irq_msecs; 455 456 saa7164_histogram_update(&port->irq_svc_interval, 457 port->last_irq_svc_msecs_diff); 458 459 dprintk(DBGLVL_IRQ, 460 "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n", 461 __func__, 462 port->last_svc_msecs_diff, 463 port->last_irq_svc_msecs_diff, 464 port->last_svc_wp, 465 port->last_svc_rp 466 ); 467 468 /* Current write position */ 469 wp = saa7164_readl(port->bufcounter); 470 if (wp > (port->hwcfg.buffercount - 1)) { 471 printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp); 472 return; 473 } 474 475 /* Most current complete buffer */ 476 if (wp == 0) 477 mcb = (port->hwcfg.buffercount - 1); 478 else 479 mcb = wp - 1; 480 481 while (1) { 482 if (port->done_first_interrupt == 0) { 483 port->done_first_interrupt++; 484 rp = mcb; 485 } else 486 rp = (port->last_svc_rp + 1) % 8; 487 488 if (rp > (port->hwcfg.buffercount - 1)) { 489 printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp); 490 break; 491 } 492 493 saa7164_work_enchandler_helper(port, rp); 494 port->last_svc_rp = rp; 495 cnt++; 496 497 if (rp == mcb) 498 break; 499 } 500 501 /* TODO: Convert this into a /proc/saa7164 style readable file */ 502 if (print_histogram == port->nr) { 503 saa7164_histogram_print(port, &port->irq_interval); 504 saa7164_histogram_print(port, &port->svc_interval); 505 saa7164_histogram_print(port, &port->irq_svc_interval); 506 saa7164_histogram_print(port, &port->read_interval); 507 saa7164_histogram_print(port, &port->poll_interval); 508 /* TODO: fix this to preserve any previous state */ 509 print_histogram = 64 + port->nr; 510 } 511} 512 513static void saa7164_work_cmdhandler(struct work_struct *w) 514{ 515 struct saa7164_dev *dev = container_of(w, struct saa7164_dev, workcmd); 516 517 /* Wake up any complete commands */ 518 saa7164_irq_dequeue(dev); 519} 520 521static void saa7164_buffer_deliver(struct saa7164_buffer *buf) 522{ 523 struct saa7164_port *port = buf->port; 524 525 /* Feed the transport payload into the kernel demux */ 526 dvb_dmx_swfilter_packets(&port->dvb.demux, (u8 *)buf->cpu, 527 SAA7164_TS_NUMBER_OF_LINES); 528 529} 530 531static irqreturn_t saa7164_irq_vbi(struct saa7164_port *port) 532{ 533 struct saa7164_dev *dev = port->dev; 534 535 /* Store old time */ 536 port->last_irq_msecs_diff = port->last_irq_msecs; 537 538 /* Collect new stats */ 539 port->last_irq_msecs = jiffies_to_msecs(jiffies); 540 541 /* Calculate stats */ 542 port->last_irq_msecs_diff = port->last_irq_msecs - 543 port->last_irq_msecs_diff; 544 545 saa7164_histogram_update(&port->irq_interval, 546 port->last_irq_msecs_diff); 547 548 dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__, 549 port->last_irq_msecs_diff); 550 551 /* Tis calls the vbi irq handler */ 552 schedule_work(&port->workenc); 553 return 0; 554} 555 556static irqreturn_t saa7164_irq_encoder(struct saa7164_port *port) 557{ 558 struct saa7164_dev *dev = port->dev; 559 560 /* Store old time */ 561 port->last_irq_msecs_diff = port->last_irq_msecs; 562 563 /* Collect new stats */ 564 port->last_irq_msecs = jiffies_to_msecs(jiffies); 565 566 /* Calculate stats */ 567 port->last_irq_msecs_diff = port->last_irq_msecs - 568 port->last_irq_msecs_diff; 569 570 saa7164_histogram_update(&port->irq_interval, 571 port->last_irq_msecs_diff); 572 573 dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__, 574 port->last_irq_msecs_diff); 575 576 schedule_work(&port->workenc); 577 return 0; 578} 579 580static irqreturn_t saa7164_irq_ts(struct saa7164_port *port) 581{ 582 struct saa7164_dev *dev = port->dev; 583 struct saa7164_buffer *buf; 584 struct list_head *c, *n; 585 int wp, i = 0, rp; 586 587 /* Find the current write point from the hardware */ 588 wp = saa7164_readl(port->bufcounter); 589 if (wp > (port->hwcfg.buffercount - 1)) 590 BUG(); 591 592 /* Find the previous buffer to the current write point */ 593 if (wp == 0) 594 rp = (port->hwcfg.buffercount - 1); 595 else 596 rp = wp - 1; 597 598 /* Lookup the WP in the buffer list */ 599 /* TODO: turn this into a worker thread */ 600 list_for_each_safe(c, n, &port->dmaqueue.list) { 601 buf = list_entry(c, struct saa7164_buffer, list); 602 if (i++ > port->hwcfg.buffercount) 603 BUG(); 604 605 if (buf->idx == rp) { 606 /* Found the buffer, deal with it */ 607 dprintk(DBGLVL_IRQ, "%s() wp: %d processing: %d\n", 608 __func__, wp, rp); 609 saa7164_buffer_deliver(buf); 610 break; 611 } 612 613 } 614 return 0; 615} 616 617/* Primary IRQ handler and dispatch mechanism */ 618static irqreturn_t saa7164_irq(int irq, void *dev_id) 619{ 620 struct saa7164_dev *dev = dev_id; 621 struct saa7164_port *porta = &dev->ports[SAA7164_PORT_TS1]; 622 struct saa7164_port *portb = &dev->ports[SAA7164_PORT_TS2]; 623 struct saa7164_port *portc = &dev->ports[SAA7164_PORT_ENC1]; 624 struct saa7164_port *portd = &dev->ports[SAA7164_PORT_ENC2]; 625 struct saa7164_port *porte = &dev->ports[SAA7164_PORT_VBI1]; 626 struct saa7164_port *portf = &dev->ports[SAA7164_PORT_VBI2]; 627 628 u32 intid, intstat[INT_SIZE/4]; 629 int i, handled = 0, bit; 630 631 if (dev == NULL) { 632 printk(KERN_ERR "%s() No device specified\n", __func__); 633 handled = 0; 634 goto out; 635 } 636 637 /* Check that the hardware is accessible. If the status bytes are 638 * 0xFF then the device is not accessible, the the IRQ belongs 639 * to another driver. 640 * 4 x u32 interrupt registers. 641 */ 642 for (i = 0; i < INT_SIZE/4; i++) { 643 644 /* TODO: Convert into saa7164_readl() */ 645 /* Read the 4 hardware interrupt registers */ 646 intstat[i] = saa7164_readl(dev->int_status + (i * 4)); 647 648 if (intstat[i]) 649 handled = 1; 650 } 651 if (handled == 0) 652 goto out; 653 654 /* For each of the HW interrupt registers */ 655 for (i = 0; i < INT_SIZE/4; i++) { 656 657 if (intstat[i]) { 658 /* Each function of the board has it's own interruptid. 659 * Find the function that triggered then call 660 * it's handler. 661 */ 662 for (bit = 0; bit < 32; bit++) { 663 664 if (((intstat[i] >> bit) & 0x00000001) == 0) 665 continue; 666 667 /* Calculate the interrupt id (0x00 to 0x7f) */ 668 669 intid = (i * 32) + bit; 670 if (intid == dev->intfdesc.bInterruptId) { 671 /* A response to an cmd/api call */ 672 schedule_work(&dev->workcmd); 673 } else if (intid == porta->hwcfg.interruptid) { 674 675 /* Transport path 1 */ 676 saa7164_irq_ts(porta); 677 678 } else if (intid == portb->hwcfg.interruptid) { 679 680 /* Transport path 2 */ 681 saa7164_irq_ts(portb); 682 683 } else if (intid == portc->hwcfg.interruptid) { 684 685 /* Encoder path 1 */ 686 saa7164_irq_encoder(portc); 687 688 } else if (intid == portd->hwcfg.interruptid) { 689 690 /* Encoder path 2 */ 691 saa7164_irq_encoder(portd); 692 693 } else if (intid == porte->hwcfg.interruptid) { 694 695 /* VBI path 1 */ 696 saa7164_irq_vbi(porte); 697 698 } else if (intid == portf->hwcfg.interruptid) { 699 700 /* VBI path 2 */ 701 saa7164_irq_vbi(portf); 702 703 } else { 704 /* Find the function */ 705 dprintk(DBGLVL_IRQ, 706 "%s() unhandled interrupt " 707 "reg 0x%x bit 0x%x " 708 "intid = 0x%x\n", 709 __func__, i, bit, intid); 710 } 711 } 712 713 /* Ack it */ 714 saa7164_writel(dev->int_ack + (i * 4), intstat[i]); 715 716 } 717 } 718out: 719 return IRQ_RETVAL(handled); 720} 721 722void saa7164_getfirmwarestatus(struct saa7164_dev *dev) 723{ 724 struct saa7164_fw_status *s = &dev->fw_status; 725 726 dev->fw_status.status = saa7164_readl(SAA_DEVICE_SYSINIT_STATUS); 727 dev->fw_status.mode = saa7164_readl(SAA_DEVICE_SYSINIT_MODE); 728 dev->fw_status.spec = saa7164_readl(SAA_DEVICE_SYSINIT_SPEC); 729 dev->fw_status.inst = saa7164_readl(SAA_DEVICE_SYSINIT_INST); 730 dev->fw_status.cpuload = saa7164_readl(SAA_DEVICE_SYSINIT_CPULOAD); 731 dev->fw_status.remainheap = 732 saa7164_readl(SAA_DEVICE_SYSINIT_REMAINHEAP); 733 734 dprintk(1, "Firmware status:\n"); 735 dprintk(1, " .status = 0x%08x\n", s->status); 736 dprintk(1, " .mode = 0x%08x\n", s->mode); 737 dprintk(1, " .spec = 0x%08x\n", s->spec); 738 dprintk(1, " .inst = 0x%08x\n", s->inst); 739 dprintk(1, " .cpuload = 0x%08x\n", s->cpuload); 740 dprintk(1, " .remainheap = 0x%08x\n", s->remainheap); 741} 742 743u32 saa7164_getcurrentfirmwareversion(struct saa7164_dev *dev) 744{ 745 u32 reg; 746 747 reg = saa7164_readl(SAA_DEVICE_VERSION); 748 dprintk(1, "Device running firmware version %d.%d.%d.%d (0x%x)\n", 749 (reg & 0x0000fc00) >> 10, 750 (reg & 0x000003e0) >> 5, 751 (reg & 0x0000001f), 752 (reg & 0xffff0000) >> 16, 753 reg); 754 755 return reg; 756} 757 758/* TODO: Debugging func, remove */ 759void saa7164_dumpregs(struct saa7164_dev *dev, u32 addr) 760{ 761 int i; 762 763 dprintk(1, "--------------------> " 764 "00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n"); 765 766 for (i = 0; i < 0x100; i += 16) 767 dprintk(1, "region0[0x%08x] = " 768 "%02x %02x %02x %02x %02x %02x %02x %02x" 769 " %02x %02x %02x %02x %02x %02x %02x %02x\n", i, 770 (u8)saa7164_readb(addr + i + 0), 771 (u8)saa7164_readb(addr + i + 1), 772 (u8)saa7164_readb(addr + i + 2), 773 (u8)saa7164_readb(addr + i + 3), 774 (u8)saa7164_readb(addr + i + 4), 775 (u8)saa7164_readb(addr + i + 5), 776 (u8)saa7164_readb(addr + i + 6), 777 (u8)saa7164_readb(addr + i + 7), 778 (u8)saa7164_readb(addr + i + 8), 779 (u8)saa7164_readb(addr + i + 9), 780 (u8)saa7164_readb(addr + i + 10), 781 (u8)saa7164_readb(addr + i + 11), 782 (u8)saa7164_readb(addr + i + 12), 783 (u8)saa7164_readb(addr + i + 13), 784 (u8)saa7164_readb(addr + i + 14), 785 (u8)saa7164_readb(addr + i + 15) 786 ); 787} 788 789static void saa7164_dump_hwdesc(struct saa7164_dev *dev) 790{ 791 dprintk(1, "@0x%p hwdesc sizeof(struct tmComResHWDescr) = %d bytes\n", 792 &dev->hwdesc, (u32)sizeof(struct tmComResHWDescr)); 793 794 dprintk(1, " .bLength = 0x%x\n", dev->hwdesc.bLength); 795 dprintk(1, " .bDescriptorType = 0x%x\n", dev->hwdesc.bDescriptorType); 796 dprintk(1, " .bDescriptorSubtype = 0x%x\n", 797 dev->hwdesc.bDescriptorSubtype); 798 799 dprintk(1, " .bcdSpecVersion = 0x%x\n", dev->hwdesc.bcdSpecVersion); 800 dprintk(1, " .dwClockFrequency = 0x%x\n", dev->hwdesc.dwClockFrequency); 801 dprintk(1, " .dwClockUpdateRes = 0x%x\n", dev->hwdesc.dwClockUpdateRes); 802 dprintk(1, " .bCapabilities = 0x%x\n", dev->hwdesc.bCapabilities); 803 dprintk(1, " .dwDeviceRegistersLocation = 0x%x\n", 804 dev->hwdesc.dwDeviceRegistersLocation); 805 806 dprintk(1, " .dwHostMemoryRegion = 0x%x\n", 807 dev->hwdesc.dwHostMemoryRegion); 808 809 dprintk(1, " .dwHostMemoryRegionSize = 0x%x\n", 810 dev->hwdesc.dwHostMemoryRegionSize); 811 812 dprintk(1, " .dwHostHibernatMemRegion = 0x%x\n", 813 dev->hwdesc.dwHostHibernatMemRegion); 814 815 dprintk(1, " .dwHostHibernatMemRegionSize = 0x%x\n", 816 dev->hwdesc.dwHostHibernatMemRegionSize); 817} 818 819static void saa7164_dump_intfdesc(struct saa7164_dev *dev) 820{ 821 dprintk(1, "@0x%p intfdesc " 822 "sizeof(struct tmComResInterfaceDescr) = %d bytes\n", 823 &dev->intfdesc, (u32)sizeof(struct tmComResInterfaceDescr)); 824 825 dprintk(1, " .bLength = 0x%x\n", dev->intfdesc.bLength); 826 dprintk(1, " .bDescriptorType = 0x%x\n", dev->intfdesc.bDescriptorType); 827 dprintk(1, " .bDescriptorSubtype = 0x%x\n", 828 dev->intfdesc.bDescriptorSubtype); 829 830 dprintk(1, " .bFlags = 0x%x\n", dev->intfdesc.bFlags); 831 dprintk(1, " .bInterfaceType = 0x%x\n", dev->intfdesc.bInterfaceType); 832 dprintk(1, " .bInterfaceId = 0x%x\n", dev->intfdesc.bInterfaceId); 833 dprintk(1, " .bBaseInterface = 0x%x\n", dev->intfdesc.bBaseInterface); 834 dprintk(1, " .bInterruptId = 0x%x\n", dev->intfdesc.bInterruptId); 835 dprintk(1, " .bDebugInterruptId = 0x%x\n", 836 dev->intfdesc.bDebugInterruptId); 837 838 dprintk(1, " .BARLocation = 0x%x\n", dev->intfdesc.BARLocation); 839} 840 841static void saa7164_dump_busdesc(struct saa7164_dev *dev) 842{ 843 dprintk(1, "@0x%p busdesc sizeof(struct tmComResBusDescr) = %d bytes\n", 844 &dev->busdesc, (u32)sizeof(struct tmComResBusDescr)); 845 846 dprintk(1, " .CommandRing = 0x%016Lx\n", dev->busdesc.CommandRing); 847 dprintk(1, " .ResponseRing = 0x%016Lx\n", dev->busdesc.ResponseRing); 848 dprintk(1, " .CommandWrite = 0x%x\n", dev->busdesc.CommandWrite); 849 dprintk(1, " .CommandRead = 0x%x\n", dev->busdesc.CommandRead); 850 dprintk(1, " .ResponseWrite = 0x%x\n", dev->busdesc.ResponseWrite); 851 dprintk(1, " .ResponseRead = 0x%x\n", dev->busdesc.ResponseRead); 852} 853 854/* Much of the hardware configuration and PCI registers are configured 855 * dynamically depending on firmware. We have to cache some initial 856 * structures then use these to locate other important structures 857 * from PCI space. 858 */ 859static void saa7164_get_descriptors(struct saa7164_dev *dev) 860{ 861 memcpy_fromio(&dev->hwdesc, dev->bmmio, sizeof(struct tmComResHWDescr)); 862 memcpy_fromio(&dev->intfdesc, dev->bmmio + sizeof(struct tmComResHWDescr), 863 sizeof(struct tmComResInterfaceDescr)); 864 memcpy_fromio(&dev->busdesc, dev->bmmio + dev->intfdesc.BARLocation, 865 sizeof(struct tmComResBusDescr)); 866 867 if (dev->hwdesc.bLength != sizeof(struct tmComResHWDescr)) { 868 printk(KERN_ERR "Structure struct tmComResHWDescr is mangled\n"); 869 printk(KERN_ERR "Need %x got %d\n", dev->hwdesc.bLength, 870 (u32)sizeof(struct tmComResHWDescr)); 871 } else 872 saa7164_dump_hwdesc(dev); 873 874 if (dev->intfdesc.bLength != sizeof(struct tmComResInterfaceDescr)) { 875 printk(KERN_ERR "struct struct tmComResInterfaceDescr is mangled\n"); 876 printk(KERN_ERR "Need %x got %d\n", dev->intfdesc.bLength, 877 (u32)sizeof(struct tmComResInterfaceDescr)); 878 } else 879 saa7164_dump_intfdesc(dev); 880 881 saa7164_dump_busdesc(dev); 882} 883 884static int saa7164_pci_quirks(struct saa7164_dev *dev) 885{ 886 return 0; 887} 888 889static int get_resources(struct saa7164_dev *dev) 890{ 891 if (request_mem_region(pci_resource_start(dev->pci, 0), 892 pci_resource_len(dev->pci, 0), dev->name)) { 893 894 if (request_mem_region(pci_resource_start(dev->pci, 2), 895 pci_resource_len(dev->pci, 2), dev->name)) 896 return 0; 897 } 898 899 printk(KERN_ERR "%s: can't get MMIO memory @ 0x%llx or 0x%llx\n", 900 dev->name, 901 (u64)pci_resource_start(dev->pci, 0), 902 (u64)pci_resource_start(dev->pci, 2)); 903 904 return -EBUSY; 905} 906 907static int saa7164_port_init(struct saa7164_dev *dev, int portnr) 908{ 909 struct saa7164_port *port = NULL; 910 911 if ((portnr < 0) || (portnr >= SAA7164_MAX_PORTS)) 912 BUG(); 913 914 port = &dev->ports[portnr]; 915 916 port->dev = dev; 917 port->nr = portnr; 918 919 if ((portnr == SAA7164_PORT_TS1) || (portnr == SAA7164_PORT_TS2)) 920 port->type = SAA7164_MPEG_DVB; 921 else 922 if ((portnr == SAA7164_PORT_ENC1) || (portnr == SAA7164_PORT_ENC2)) { 923 port->type = SAA7164_MPEG_ENCODER; 924 925 /* We need a deferred interrupt handler for cmd handling */ 926 INIT_WORK(&port->workenc, saa7164_work_enchandler); 927 } else if ((portnr == SAA7164_PORT_VBI1) || (portnr == SAA7164_PORT_VBI2)) { 928 port->type = SAA7164_MPEG_VBI; 929 930 /* We need a deferred interrupt handler for cmd handling */ 931 INIT_WORK(&port->workenc, saa7164_work_vbihandler); 932 } else 933 BUG(); 934 935 /* Init all the critical resources */ 936 mutex_init(&port->dvb.lock); 937 INIT_LIST_HEAD(&port->dmaqueue.list); 938 mutex_init(&port->dmaqueue_lock); 939 940 INIT_LIST_HEAD(&port->list_buf_used.list); 941 INIT_LIST_HEAD(&port->list_buf_free.list); 942 init_waitqueue_head(&port->wait_read); 943 944 945 saa7164_histogram_reset(&port->irq_interval, "irq intervals"); 946 saa7164_histogram_reset(&port->svc_interval, "deferred intervals"); 947 saa7164_histogram_reset(&port->irq_svc_interval, 948 "irq to deferred intervals"); 949 saa7164_histogram_reset(&port->read_interval, 950 "encoder/vbi read() intervals"); 951 saa7164_histogram_reset(&port->poll_interval, 952 "encoder/vbi poll() intervals"); 953 954 return 0; 955} 956 957static int saa7164_dev_setup(struct saa7164_dev *dev) 958{ 959 int i; 960 961 mutex_init(&dev->lock); 962 atomic_inc(&dev->refcount); 963 dev->nr = saa7164_devcount++; 964 965 snprintf(dev->name, sizeof(dev->name), "saa7164[%d]", dev->nr); 966 967 mutex_lock(&devlist); 968 list_add_tail(&dev->devlist, &saa7164_devlist); 969 mutex_unlock(&devlist); 970 971 /* board config */ 972 dev->board = UNSET; 973 if (card[dev->nr] < saa7164_bcount) 974 dev->board = card[dev->nr]; 975 976 for (i = 0; UNSET == dev->board && i < saa7164_idcount; i++) 977 if (dev->pci->subsystem_vendor == saa7164_subids[i].subvendor && 978 dev->pci->subsystem_device == 979 saa7164_subids[i].subdevice) 980 dev->board = saa7164_subids[i].card; 981 982 if (UNSET == dev->board) { 983 dev->board = SAA7164_BOARD_UNKNOWN; 984 saa7164_card_list(dev); 985 } 986 987 dev->pci_bus = dev->pci->bus->number; 988 dev->pci_slot = PCI_SLOT(dev->pci->devfn); 989 990 /* I2C Defaults / setup */ 991 dev->i2c_bus[0].dev = dev; 992 dev->i2c_bus[0].nr = 0; 993 dev->i2c_bus[1].dev = dev; 994 dev->i2c_bus[1].nr = 1; 995 dev->i2c_bus[2].dev = dev; 996 dev->i2c_bus[2].nr = 2; 997 998 /* Transport + Encoder ports 1, 2, 3, 4 - Defaults / setup */ 999 saa7164_port_init(dev, SAA7164_PORT_TS1); 1000 saa7164_port_init(dev, SAA7164_PORT_TS2); 1001 saa7164_port_init(dev, SAA7164_PORT_ENC1); 1002 saa7164_port_init(dev, SAA7164_PORT_ENC2); 1003 saa7164_port_init(dev, SAA7164_PORT_VBI1); 1004 saa7164_port_init(dev, SAA7164_PORT_VBI2); 1005 1006 if (get_resources(dev) < 0) { 1007 printk(KERN_ERR "CORE %s No more PCIe resources for " 1008 "subsystem: %04x:%04x\n", 1009 dev->name, dev->pci->subsystem_vendor, 1010 dev->pci->subsystem_device); 1011 1012 saa7164_devcount--; 1013 return -ENODEV; 1014 } 1015 1016 /* PCI/e allocations */ 1017 dev->lmmio = ioremap(pci_resource_start(dev->pci, 0), 1018 pci_resource_len(dev->pci, 0)); 1019 1020 dev->lmmio2 = ioremap(pci_resource_start(dev->pci, 2), 1021 pci_resource_len(dev->pci, 2)); 1022 1023 dev->bmmio = (u8 __iomem *)dev->lmmio; 1024 dev->bmmio2 = (u8 __iomem *)dev->lmmio2; 1025 1026 /* Inerrupt and ack register locations offset of bmmio */ 1027 dev->int_status = 0x183000 + 0xf80; 1028 dev->int_ack = 0x183000 + 0xf90; 1029 1030 printk(KERN_INFO 1031 "CORE %s: subsystem: %04x:%04x, board: %s [card=%d,%s]\n", 1032 dev->name, dev->pci->subsystem_vendor, 1033 dev->pci->subsystem_device, saa7164_boards[dev->board].name, 1034 dev->board, card[dev->nr] == dev->board ? 1035 "insmod option" : "autodetected"); 1036 1037 saa7164_pci_quirks(dev); 1038 1039 return 0; 1040} 1041 1042static void saa7164_dev_unregister(struct saa7164_dev *dev) 1043{ 1044 dprintk(1, "%s()\n", __func__); 1045 1046 release_mem_region(pci_resource_start(dev->pci, 0), 1047 pci_resource_len(dev->pci, 0)); 1048 1049 release_mem_region(pci_resource_start(dev->pci, 2), 1050 pci_resource_len(dev->pci, 2)); 1051 1052 if (!atomic_dec_and_test(&dev->refcount)) 1053 return; 1054 1055 iounmap(dev->lmmio); 1056 iounmap(dev->lmmio2); 1057 1058 return; 1059} 1060 1061#ifdef CONFIG_PROC_FS 1062static int saa7164_proc_show(struct seq_file *m, void *v) 1063{ 1064 struct saa7164_dev *dev; 1065 struct tmComResBusInfo *b; 1066 struct list_head *list; 1067 int i, c; 1068 1069 if (saa7164_devcount == 0) 1070 return 0; 1071 1072 list_for_each(list, &saa7164_devlist) { 1073 dev = list_entry(list, struct saa7164_dev, devlist); 1074 seq_printf(m, "%s = %p\n", dev->name, dev); 1075 1076 /* Lock the bus from any other access */ 1077 b = &dev->bus; 1078 mutex_lock(&b->lock); 1079 1080 seq_printf(m, " .m_pdwSetWritePos = 0x%x (0x%08x)\n", 1081 b->m_dwSetReadPos, saa7164_readl(b->m_dwSetReadPos)); 1082 1083 seq_printf(m, " .m_pdwSetReadPos = 0x%x (0x%08x)\n", 1084 b->m_dwSetWritePos, saa7164_readl(b->m_dwSetWritePos)); 1085 1086 seq_printf(m, " .m_pdwGetWritePos = 0x%x (0x%08x)\n", 1087 b->m_dwGetReadPos, saa7164_readl(b->m_dwGetReadPos)); 1088 1089 seq_printf(m, " .m_pdwGetReadPos = 0x%x (0x%08x)\n", 1090 b->m_dwGetWritePos, saa7164_readl(b->m_dwGetWritePos)); 1091 c = 0; 1092 seq_printf(m, "\n Set Ring:\n"); 1093 seq_printf(m, "\n addr 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n"); 1094 for (i = 0; i < b->m_dwSizeSetRing; i++) { 1095 if (c == 0) 1096 seq_printf(m, " %04x:", i); 1097 1098 seq_printf(m, " %02x", readb(b->m_pdwSetRing + i)); 1099 1100 if (++c == 16) { 1101 seq_printf(m, "\n"); 1102 c = 0; 1103 } 1104 } 1105 1106 c = 0; 1107 seq_printf(m, "\n Get Ring:\n"); 1108 seq_printf(m, "\n addr 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n"); 1109 for (i = 0; i < b->m_dwSizeGetRing; i++) { 1110 if (c == 0) 1111 seq_printf(m, " %04x:", i); 1112 1113 seq_printf(m, " %02x", readb(b->m_pdwGetRing + i)); 1114 1115 if (++c == 16) { 1116 seq_printf(m, "\n"); 1117 c = 0; 1118 } 1119 } 1120 1121 mutex_unlock(&b->lock); 1122 1123 } 1124 1125 return 0; 1126} 1127 1128static int saa7164_proc_open(struct inode *inode, struct file *filp) 1129{ 1130 return single_open(filp, saa7164_proc_show, NULL); 1131} 1132 1133static const struct file_operations saa7164_proc_fops = { 1134 .open = saa7164_proc_open, 1135 .read = seq_read, 1136 .llseek = seq_lseek, 1137 .release = single_release, 1138}; 1139 1140static int saa7164_proc_create(void) 1141{ 1142 struct proc_dir_entry *pe; 1143 1144 pe = proc_create("saa7164", S_IRUGO, NULL, &saa7164_proc_fops); 1145 if (!pe) 1146 return -ENOMEM; 1147 1148 return 0; 1149} 1150#endif 1151 1152static int saa7164_thread_function(void *data) 1153{ 1154 struct saa7164_dev *dev = data; 1155 struct tmFwInfoStruct fwinfo; 1156 u64 last_poll_time = 0; 1157 1158 dprintk(DBGLVL_THR, "thread started\n"); 1159 1160 set_freezable(); 1161 1162 while (1) { 1163 msleep_interruptible(100); 1164 if (kthread_should_stop()) 1165 break; 1166 try_to_freeze(); 1167 1168 dprintk(DBGLVL_THR, "thread running\n"); 1169 1170 /* Dump the firmware debug message to console */ 1171 /* Polling this costs us 1-2% of the arm CPU */ 1172 /* convert this into a respnde to interrupt 0x7a */ 1173 saa7164_api_collect_debug(dev); 1174 1175 /* Monitor CPU load every 1 second */ 1176 if ((last_poll_time + 1000 /* ms */) < jiffies_to_msecs(jiffies)) { 1177 saa7164_api_get_load_info(dev, &fwinfo); 1178 last_poll_time = jiffies_to_msecs(jiffies); 1179 } 1180 1181 } 1182 1183 dprintk(DBGLVL_THR, "thread exiting\n"); 1184 return 0; 1185} 1186 1187static int saa7164_initdev(struct pci_dev *pci_dev, 1188 const struct pci_device_id *pci_id) 1189{ 1190 struct saa7164_dev *dev; 1191 int err, i; 1192 u32 version; 1193 1194 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1195 if (NULL == dev) 1196 return -ENOMEM; 1197 1198 err = v4l2_device_register(&pci_dev->dev, &dev->v4l2_dev); 1199 if (err < 0) { 1200 dev_err(&pci_dev->dev, "v4l2_device_register failed\n"); 1201 goto fail_free; 1202 } 1203 1204 /* pci init */ 1205 dev->pci = pci_dev; 1206 if (pci_enable_device(pci_dev)) { 1207 err = -EIO; 1208 goto fail_free; 1209 } 1210 1211 if (saa7164_dev_setup(dev) < 0) { 1212 err = -EINVAL; 1213 goto fail_free; 1214 } 1215 1216 /* print pci info */ 1217 dev->pci_rev = pci_dev->revision; 1218 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat); 1219 printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, " 1220 "latency: %d, mmio: 0x%llx\n", dev->name, 1221 pci_name(pci_dev), dev->pci_rev, pci_dev->irq, 1222 dev->pci_lat, 1223 (unsigned long long)pci_resource_start(pci_dev, 0)); 1224 1225 pci_set_master(pci_dev); 1226 /* TODO */ 1227 if (!pci_dma_supported(pci_dev, 0xffffffff)) { 1228 printk("%s/0: Oops: no 32bit PCI DMA ???\n", dev->name); 1229 err = -EIO; 1230 goto fail_irq; 1231 } 1232 1233 err = request_irq(pci_dev->irq, saa7164_irq, 1234 IRQF_SHARED, dev->name, dev); 1235 if (err < 0) { 1236 printk(KERN_ERR "%s: can't get IRQ %d\n", dev->name, 1237 pci_dev->irq); 1238 err = -EIO; 1239 goto fail_irq; 1240 } 1241 1242 pci_set_drvdata(pci_dev, dev); 1243 1244 /* Init the internal command list */ 1245 for (i = 0; i < SAA_CMD_MAX_MSG_UNITS; i++) { 1246 dev->cmds[i].seqno = i; 1247 dev->cmds[i].inuse = 0; 1248 mutex_init(&dev->cmds[i].lock); 1249 init_waitqueue_head(&dev->cmds[i].wait); 1250 } 1251 1252 /* We need a deferred interrupt handler for cmd handling */ 1253 INIT_WORK(&dev->workcmd, saa7164_work_cmdhandler); 1254 1255 /* Only load the firmware if we know the board */ 1256 if (dev->board != SAA7164_BOARD_UNKNOWN) { 1257 1258 err = saa7164_downloadfirmware(dev); 1259 if (err < 0) { 1260 printk(KERN_ERR 1261 "Failed to boot firmware, no features " 1262 "registered\n"); 1263 goto fail_fw; 1264 } 1265 1266 saa7164_get_descriptors(dev); 1267 saa7164_dumpregs(dev, 0); 1268 saa7164_getcurrentfirmwareversion(dev); 1269 saa7164_getfirmwarestatus(dev); 1270 err = saa7164_bus_setup(dev); 1271 if (err < 0) 1272 printk(KERN_ERR 1273 "Failed to setup the bus, will continue\n"); 1274 saa7164_bus_dump(dev); 1275 1276 /* Ping the running firmware via the command bus and get the 1277 * firmware version, this checks the bus is running OK. 1278 */ 1279 version = 0; 1280 if (saa7164_api_get_fw_version(dev, &version) == SAA_OK) 1281 dprintk(1, "Bus is operating correctly using " 1282 "version %d.%d.%d.%d (0x%x)\n", 1283 (version & 0x0000fc00) >> 10, 1284 (version & 0x000003e0) >> 5, 1285 (version & 0x0000001f), 1286 (version & 0xffff0000) >> 16, 1287 version); 1288 else 1289 printk(KERN_ERR 1290 "Failed to communicate with the firmware\n"); 1291 1292 /* Bring up the I2C buses */ 1293 saa7164_i2c_register(&dev->i2c_bus[0]); 1294 saa7164_i2c_register(&dev->i2c_bus[1]); 1295 saa7164_i2c_register(&dev->i2c_bus[2]); 1296 saa7164_gpio_setup(dev); 1297 saa7164_card_setup(dev); 1298 1299 /* Parse the dynamic device configuration, find various 1300 * media endpoints (MPEG, WMV, PS, TS) and cache their 1301 * configuration details into the driver, so we can 1302 * reference them later during simething_register() func, 1303 * interrupt handlers, deferred work handlers etc. 1304 */ 1305 saa7164_api_enum_subdevs(dev); 1306 1307 /* Begin to create the video sub-systems and register funcs */ 1308 if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB) { 1309 if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS1]) < 0) { 1310 printk(KERN_ERR "%s() Failed to register " 1311 "dvb adapters on porta\n", 1312 __func__); 1313 } 1314 } 1315 1316 if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB) { 1317 if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS2]) < 0) { 1318 printk(KERN_ERR"%s() Failed to register " 1319 "dvb adapters on portb\n", 1320 __func__); 1321 } 1322 } 1323 1324 if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER) { 1325 if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC1]) < 0) { 1326 printk(KERN_ERR"%s() Failed to register " 1327 "mpeg encoder\n", __func__); 1328 } 1329 } 1330 1331 if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER) { 1332 if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC2]) < 0) { 1333 printk(KERN_ERR"%s() Failed to register " 1334 "mpeg encoder\n", __func__); 1335 } 1336 } 1337 1338 if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI) { 1339 if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI1]) < 0) { 1340 printk(KERN_ERR"%s() Failed to register " 1341 "vbi device\n", __func__); 1342 } 1343 } 1344 1345 if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI) { 1346 if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI2]) < 0) { 1347 printk(KERN_ERR"%s() Failed to register " 1348 "vbi device\n", __func__); 1349 } 1350 } 1351 saa7164_api_set_debug(dev, fw_debug); 1352 1353 if (fw_debug) { 1354 dev->kthread = kthread_run(saa7164_thread_function, dev, 1355 "saa7164 debug"); 1356 if (IS_ERR(dev->kthread)) { 1357 dev->kthread = NULL; 1358 printk(KERN_ERR "%s() Failed to create " 1359 "debug kernel thread\n", __func__); 1360 } 1361 } 1362 1363 } /* != BOARD_UNKNOWN */ 1364 else 1365 printk(KERN_ERR "%s() Unsupported board detected, " 1366 "registering without firmware\n", __func__); 1367 1368 dprintk(1, "%s() parameter debug = %d\n", __func__, saa_debug); 1369 dprintk(1, "%s() parameter waitsecs = %d\n", __func__, waitsecs); 1370 1371fail_fw: 1372 return 0; 1373 1374fail_irq: 1375 saa7164_dev_unregister(dev); 1376fail_free: 1377 v4l2_device_unregister(&dev->v4l2_dev); 1378 kfree(dev); 1379 return err; 1380} 1381 1382static void saa7164_shutdown(struct saa7164_dev *dev) 1383{ 1384 dprintk(1, "%s()\n", __func__); 1385} 1386 1387static void saa7164_finidev(struct pci_dev *pci_dev) 1388{ 1389 struct saa7164_dev *dev = pci_get_drvdata(pci_dev); 1390 1391 if (dev->board != SAA7164_BOARD_UNKNOWN) { 1392 if (fw_debug && dev->kthread) { 1393 kthread_stop(dev->kthread); 1394 dev->kthread = NULL; 1395 } 1396 if (dev->firmwareloaded) 1397 saa7164_api_set_debug(dev, 0x00); 1398 } 1399 1400 saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1], 1401 &dev->ports[SAA7164_PORT_ENC1].irq_interval); 1402 saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1], 1403 &dev->ports[SAA7164_PORT_ENC1].svc_interval); 1404 saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1], 1405 &dev->ports[SAA7164_PORT_ENC1].irq_svc_interval); 1406 saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1], 1407 &dev->ports[SAA7164_PORT_ENC1].read_interval); 1408 saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1], 1409 &dev->ports[SAA7164_PORT_ENC1].poll_interval); 1410 saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI1], 1411 &dev->ports[SAA7164_PORT_VBI1].read_interval); 1412 saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI2], 1413 &dev->ports[SAA7164_PORT_VBI2].poll_interval); 1414 1415 saa7164_shutdown(dev); 1416 1417 if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB) 1418 saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS1]); 1419 1420 if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB) 1421 saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS2]); 1422 1423 if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER) 1424 saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC1]); 1425 1426 if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER) 1427 saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC2]); 1428 1429 if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI) 1430 saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI1]); 1431 1432 if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI) 1433 saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI2]); 1434 1435 saa7164_i2c_unregister(&dev->i2c_bus[0]); 1436 saa7164_i2c_unregister(&dev->i2c_bus[1]); 1437 saa7164_i2c_unregister(&dev->i2c_bus[2]); 1438 1439 /* unregister stuff */ 1440 free_irq(pci_dev->irq, dev); 1441 1442 pci_disable_device(pci_dev); 1443 1444 mutex_lock(&devlist); 1445 list_del(&dev->devlist); 1446 mutex_unlock(&devlist); 1447 1448 saa7164_dev_unregister(dev); 1449 v4l2_device_unregister(&dev->v4l2_dev); 1450 kfree(dev); 1451} 1452 1453static struct pci_device_id saa7164_pci_tbl[] = { 1454 { 1455 /* SAA7164 */ 1456 .vendor = 0x1131, 1457 .device = 0x7164, 1458 .subvendor = PCI_ANY_ID, 1459 .subdevice = PCI_ANY_ID, 1460 }, { 1461 /* --- end of list --- */ 1462 } 1463}; 1464MODULE_DEVICE_TABLE(pci, saa7164_pci_tbl); 1465 1466static struct pci_driver saa7164_pci_driver = { 1467 .name = "saa7164", 1468 .id_table = saa7164_pci_tbl, 1469 .probe = saa7164_initdev, 1470 .remove = saa7164_finidev, 1471 /* TODO */ 1472 .suspend = NULL, 1473 .resume = NULL, 1474}; 1475 1476static int __init saa7164_init(void) 1477{ 1478 printk(KERN_INFO "saa7164 driver loaded\n"); 1479 1480#ifdef CONFIG_PROC_FS 1481 saa7164_proc_create(); 1482#endif 1483 return pci_register_driver(&saa7164_pci_driver); 1484} 1485 1486static void __exit saa7164_fini(void) 1487{ 1488#ifdef CONFIG_PROC_FS 1489 remove_proc_entry("saa7164", NULL); 1490#endif 1491 pci_unregister_driver(&saa7164_pci_driver); 1492} 1493 1494module_init(saa7164_init); 1495module_exit(saa7164_fini); 1496 1497