1/* 2 * Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd. 3 * http://www.samsung.com 4 * 5 * header file for Samsung EXYNOS5 SoC series G-Scaler driver 6 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12#ifndef GSC_CORE_H_ 13#define GSC_CORE_H_ 14 15#include <linux/delay.h> 16#include <linux/sched.h> 17#include <linux/spinlock.h> 18#include <linux/types.h> 19#include <linux/videodev2.h> 20#include <linux/io.h> 21#include <linux/pm_runtime.h> 22#include <media/videobuf2-core.h> 23#include <media/v4l2-ctrls.h> 24#include <media/v4l2-device.h> 25#include <media/v4l2-mem2mem.h> 26#include <media/v4l2-mediabus.h> 27#include <media/videobuf2-dma-contig.h> 28 29#include "gsc-regs.h" 30 31#define CONFIG_VB2_GSC_DMA_CONTIG 1 32#define GSC_MODULE_NAME "exynos-gsc" 33 34#define GSC_SHUTDOWN_TIMEOUT ((100*HZ)/1000) 35#define GSC_MAX_DEVS 4 36#define GSC_M2M_BUF_NUM 0 37#define GSC_MAX_CTRL_NUM 10 38#define GSC_SC_ALIGN_4 4 39#define GSC_SC_ALIGN_2 2 40#define DEFAULT_CSC_EQ 1 41#define DEFAULT_CSC_RANGE 1 42 43#define GSC_PARAMS (1 << 0) 44#define GSC_SRC_FMT (1 << 1) 45#define GSC_DST_FMT (1 << 2) 46#define GSC_CTX_M2M (1 << 3) 47#define GSC_CTX_STOP_REQ (1 << 6) 48#define GSC_CTX_ABORT (1 << 7) 49 50enum gsc_dev_flags { 51 /* for global */ 52 ST_SUSPEND, 53 54 /* for m2m node */ 55 ST_M2M_OPEN, 56 ST_M2M_RUN, 57 ST_M2M_PEND, 58 ST_M2M_SUSPENDED, 59 ST_M2M_SUSPENDING, 60}; 61 62enum gsc_irq { 63 GSC_IRQ_DONE, 64 GSC_IRQ_OVERRUN 65}; 66 67/** 68 * enum gsc_datapath - the path of data used for G-Scaler 69 * @GSC_CAMERA: from camera 70 * @GSC_DMA: from/to DMA 71 * @GSC_LOCAL: to local path 72 * @GSC_WRITEBACK: from FIMD 73 */ 74enum gsc_datapath { 75 GSC_CAMERA = 0x1, 76 GSC_DMA, 77 GSC_MIXER, 78 GSC_FIMD, 79 GSC_WRITEBACK, 80}; 81 82enum gsc_color_fmt { 83 GSC_RGB = 0x1, 84 GSC_YUV420 = 0x2, 85 GSC_YUV422 = 0x4, 86 GSC_YUV444 = 0x8, 87}; 88 89enum gsc_yuv_fmt { 90 GSC_LSB_Y = 0x10, 91 GSC_LSB_C, 92 GSC_CBCR = 0x20, 93 GSC_CRCB, 94}; 95 96#define fh_to_ctx(__fh) container_of(__fh, struct gsc_ctx, fh) 97#define is_rgb(x) (!!((x) & 0x1)) 98#define is_yuv420(x) (!!((x) & 0x2)) 99#define is_yuv422(x) (!!((x) & 0x4)) 100 101#define gsc_m2m_active(dev) test_bit(ST_M2M_RUN, &(dev)->state) 102#define gsc_m2m_pending(dev) test_bit(ST_M2M_PEND, &(dev)->state) 103#define gsc_m2m_opened(dev) test_bit(ST_M2M_OPEN, &(dev)->state) 104 105#define ctrl_to_ctx(__ctrl) \ 106 container_of((__ctrl)->handler, struct gsc_ctx, ctrl_handler) 107/** 108 * struct gsc_fmt - the driver's internal color format data 109 * @mbus_code: Media Bus pixel code, -1 if not applicable 110 * @name: format description 111 * @pixelformat: the fourcc code for this format, 0 if not applicable 112 * @yorder: Y/C order 113 * @corder: Chrominance order control 114 * @num_planes: number of physically non-contiguous data planes 115 * @nr_comp: number of physically contiguous data planes 116 * @depth: per plane driver's private 'number of bits per pixel' 117 * @flags: flags indicating which operation mode format applies to 118 */ 119struct gsc_fmt { 120 u32 mbus_code; 121 char *name; 122 u32 pixelformat; 123 u32 color; 124 u32 yorder; 125 u32 corder; 126 u16 num_planes; 127 u16 num_comp; 128 u8 depth[VIDEO_MAX_PLANES]; 129 u32 flags; 130}; 131 132/** 133 * struct gsc_input_buf - the driver's video buffer 134 * @vb: videobuf2 buffer 135 * @list : linked list structure for buffer queue 136 * @idx : index of G-Scaler input buffer 137 */ 138struct gsc_input_buf { 139 struct vb2_buffer vb; 140 struct list_head list; 141 int idx; 142}; 143 144/** 145 * struct gsc_addr - the G-Scaler physical address set 146 * @y: luminance plane address 147 * @cb: Cb plane address 148 * @cr: Cr plane address 149 */ 150struct gsc_addr { 151 dma_addr_t y; 152 dma_addr_t cb; 153 dma_addr_t cr; 154}; 155 156/* struct gsc_ctrls - the G-Scaler control set 157 * @rotate: rotation degree 158 * @hflip: horizontal flip 159 * @vflip: vertical flip 160 * @global_alpha: the alpha value of current frame 161 */ 162struct gsc_ctrls { 163 struct v4l2_ctrl *rotate; 164 struct v4l2_ctrl *hflip; 165 struct v4l2_ctrl *vflip; 166 struct v4l2_ctrl *global_alpha; 167}; 168 169/** 170 * struct gsc_scaler - the configuration data for G-Scaler inetrnal scaler 171 * @pre_shfactor: pre sclaer shift factor 172 * @pre_hratio: horizontal ratio of the prescaler 173 * @pre_vratio: vertical ratio of the prescaler 174 * @main_hratio: the main scaler's horizontal ratio 175 * @main_vratio: the main scaler's vertical ratio 176 */ 177struct gsc_scaler { 178 u32 pre_shfactor; 179 u32 pre_hratio; 180 u32 pre_vratio; 181 u32 main_hratio; 182 u32 main_vratio; 183}; 184 185struct gsc_dev; 186 187struct gsc_ctx; 188 189/** 190 * struct gsc_frame - source/target frame properties 191 * @f_width: SRC : SRCIMG_WIDTH, DST : OUTPUTDMA_WHOLE_IMG_WIDTH 192 * @f_height: SRC : SRCIMG_HEIGHT, DST : OUTPUTDMA_WHOLE_IMG_HEIGHT 193 * @crop: cropped(source)/scaled(destination) size 194 * @payload: image size in bytes (w x h x bpp) 195 * @addr: image frame buffer physical addresses 196 * @fmt: G-Scaler color format pointer 197 * @colorspace: value indicating v4l2_colorspace 198 * @alpha: frame's alpha value 199 */ 200struct gsc_frame { 201 u32 f_width; 202 u32 f_height; 203 struct v4l2_rect crop; 204 unsigned long payload[VIDEO_MAX_PLANES]; 205 struct gsc_addr addr; 206 const struct gsc_fmt *fmt; 207 u32 colorspace; 208 u8 alpha; 209}; 210 211/** 212 * struct gsc_m2m_device - v4l2 memory-to-memory device data 213 * @vfd: the video device node for v4l2 m2m mode 214 * @m2m_dev: v4l2 memory-to-memory device data 215 * @ctx: hardware context data 216 * @refcnt: the reference counter 217 */ 218struct gsc_m2m_device { 219 struct video_device *vfd; 220 struct v4l2_m2m_dev *m2m_dev; 221 struct gsc_ctx *ctx; 222 int refcnt; 223}; 224 225/** 226 * struct gsc_pix_max - image pixel size limits in various IP configurations 227 * 228 * @org_scaler_bypass_w: max pixel width when the scaler is disabled 229 * @org_scaler_bypass_h: max pixel height when the scaler is disabled 230 * @org_scaler_input_w: max pixel width when the scaler is enabled 231 * @org_scaler_input_h: max pixel height when the scaler is enabled 232 * @real_rot_dis_w: max pixel src cropped height with the rotator is off 233 * @real_rot_dis_h: max pixel src croppped width with the rotator is off 234 * @real_rot_en_w: max pixel src cropped width with the rotator is on 235 * @real_rot_en_h: max pixel src cropped height with the rotator is on 236 * @target_rot_dis_w: max pixel dst scaled width with the rotator is off 237 * @target_rot_dis_h: max pixel dst scaled height with the rotator is off 238 * @target_rot_en_w: max pixel dst scaled width with the rotator is on 239 * @target_rot_en_h: max pixel dst scaled height with the rotator is on 240 */ 241struct gsc_pix_max { 242 u16 org_scaler_bypass_w; 243 u16 org_scaler_bypass_h; 244 u16 org_scaler_input_w; 245 u16 org_scaler_input_h; 246 u16 real_rot_dis_w; 247 u16 real_rot_dis_h; 248 u16 real_rot_en_w; 249 u16 real_rot_en_h; 250 u16 target_rot_dis_w; 251 u16 target_rot_dis_h; 252 u16 target_rot_en_w; 253 u16 target_rot_en_h; 254}; 255 256/** 257 * struct gsc_pix_min - image pixel size limits in various IP configurations 258 * 259 * @org_w: minimum source pixel width 260 * @org_h: minimum source pixel height 261 * @real_w: minimum input crop pixel width 262 * @real_h: minimum input crop pixel height 263 * @target_rot_dis_w: minimum output scaled pixel height when rotator is off 264 * @target_rot_dis_h: minimum output scaled pixel height when rotator is off 265 * @target_rot_en_w: minimum output scaled pixel height when rotator is on 266 * @target_rot_en_h: minimum output scaled pixel height when rotator is on 267 */ 268struct gsc_pix_min { 269 u16 org_w; 270 u16 org_h; 271 u16 real_w; 272 u16 real_h; 273 u16 target_rot_dis_w; 274 u16 target_rot_dis_h; 275 u16 target_rot_en_w; 276 u16 target_rot_en_h; 277}; 278 279struct gsc_pix_align { 280 u16 org_h; 281 u16 org_w; 282 u16 offset_h; 283 u16 real_w; 284 u16 real_h; 285 u16 target_w; 286 u16 target_h; 287}; 288 289/** 290 * struct gsc_variant - G-Scaler variant information 291 */ 292struct gsc_variant { 293 struct gsc_pix_max *pix_max; 294 struct gsc_pix_min *pix_min; 295 struct gsc_pix_align *pix_align; 296 u16 in_buf_cnt; 297 u16 out_buf_cnt; 298 u16 sc_up_max; 299 u16 sc_down_max; 300 u16 poly_sc_down_max; 301 u16 pre_sc_down_max; 302 u16 local_sc_down; 303}; 304 305/** 306 * struct gsc_driverdata - per device type driver data for init time. 307 * 308 * @variant: the variant information for this driver. 309 * @lclk_frequency: G-Scaler clock frequency 310 * @num_entities: the number of g-scalers 311 */ 312struct gsc_driverdata { 313 struct gsc_variant *variant[GSC_MAX_DEVS]; 314 unsigned long lclk_frequency; 315 int num_entities; 316}; 317 318/** 319 * struct gsc_dev - abstraction for G-Scaler entity 320 * @slock: the spinlock protecting this data structure 321 * @lock: the mutex protecting this data structure 322 * @pdev: pointer to the G-Scaler platform device 323 * @variant: the IP variant information 324 * @id: G-Scaler device index (0..GSC_MAX_DEVS) 325 * @clock: clocks required for G-Scaler operation 326 * @regs: the mapped hardware registers 327 * @irq_queue: interrupt handler waitqueue 328 * @m2m: memory-to-memory V4L2 device information 329 * @state: flags used to synchronize m2m and capture mode operation 330 * @alloc_ctx: videobuf2 memory allocator context 331 * @vdev: video device for G-Scaler instance 332 */ 333struct gsc_dev { 334 spinlock_t slock; 335 struct mutex lock; 336 struct platform_device *pdev; 337 struct gsc_variant *variant; 338 u16 id; 339 struct clk *clock; 340 void __iomem *regs; 341 wait_queue_head_t irq_queue; 342 struct gsc_m2m_device m2m; 343 struct exynos_platform_gscaler *pdata; 344 unsigned long state; 345 struct vb2_alloc_ctx *alloc_ctx; 346 struct video_device vdev; 347 struct v4l2_device v4l2_dev; 348}; 349 350/** 351 * gsc_ctx - the device context data 352 * @s_frame: source frame properties 353 * @d_frame: destination frame properties 354 * @in_path: input mode (DMA or camera) 355 * @out_path: output mode (DMA or FIFO) 356 * @scaler: image scaler properties 357 * @flags: additional flags for image conversion 358 * @state: flags to keep track of user configuration 359 * @gsc_dev: the G-Scaler device this context applies to 360 * @m2m_ctx: memory-to-memory device context 361 * @fh: v4l2 file handle 362 * @ctrl_handler: v4l2 controls handler 363 * @gsc_ctrls G-Scaler control set 364 * @ctrls_rdy: true if the control handler is initialized 365 */ 366struct gsc_ctx { 367 struct gsc_frame s_frame; 368 struct gsc_frame d_frame; 369 enum gsc_datapath in_path; 370 enum gsc_datapath out_path; 371 struct gsc_scaler scaler; 372 u32 flags; 373 u32 state; 374 int rotation; 375 unsigned int hflip:1; 376 unsigned int vflip:1; 377 struct gsc_dev *gsc_dev; 378 struct v4l2_m2m_ctx *m2m_ctx; 379 struct v4l2_fh fh; 380 struct v4l2_ctrl_handler ctrl_handler; 381 struct gsc_ctrls gsc_ctrls; 382 bool ctrls_rdy; 383}; 384 385void gsc_set_prefbuf(struct gsc_dev *gsc, struct gsc_frame *frm); 386int gsc_register_m2m_device(struct gsc_dev *gsc); 387void gsc_unregister_m2m_device(struct gsc_dev *gsc); 388void gsc_m2m_job_finish(struct gsc_ctx *ctx, int vb_state); 389 390u32 get_plane_size(struct gsc_frame *fr, unsigned int plane); 391const struct gsc_fmt *get_format(int index); 392const struct gsc_fmt *find_fmt(u32 *pixelformat, u32 *mbus_code, u32 index); 393int gsc_enum_fmt_mplane(struct v4l2_fmtdesc *f); 394int gsc_try_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f); 395void gsc_set_frame_size(struct gsc_frame *frame, int width, int height); 396int gsc_g_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f); 397void gsc_check_crop_change(u32 tmp_w, u32 tmp_h, u32 *w, u32 *h); 398int gsc_g_crop(struct gsc_ctx *ctx, struct v4l2_crop *cr); 399int gsc_try_crop(struct gsc_ctx *ctx, struct v4l2_crop *cr); 400int gsc_cal_prescaler_ratio(struct gsc_variant *var, u32 src, u32 dst, 401 u32 *ratio); 402void gsc_get_prescaler_shfactor(u32 hratio, u32 vratio, u32 *sh); 403void gsc_check_src_scale_info(struct gsc_variant *var, 404 struct gsc_frame *s_frame, 405 u32 *wratio, u32 tx, u32 ty, u32 *hratio); 406int gsc_check_scaler_ratio(struct gsc_variant *var, int sw, int sh, int dw, 407 int dh, int rot, int out_path); 408int gsc_set_scaler_info(struct gsc_ctx *ctx); 409int gsc_ctrls_create(struct gsc_ctx *ctx); 410void gsc_ctrls_delete(struct gsc_ctx *ctx); 411int gsc_prepare_addr(struct gsc_ctx *ctx, struct vb2_buffer *vb, 412 struct gsc_frame *frame, struct gsc_addr *addr); 413 414static inline void gsc_ctx_state_lock_set(u32 state, struct gsc_ctx *ctx) 415{ 416 unsigned long flags; 417 418 spin_lock_irqsave(&ctx->gsc_dev->slock, flags); 419 ctx->state |= state; 420 spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags); 421} 422 423static inline void gsc_ctx_state_lock_clear(u32 state, struct gsc_ctx *ctx) 424{ 425 unsigned long flags; 426 427 spin_lock_irqsave(&ctx->gsc_dev->slock, flags); 428 ctx->state &= ~state; 429 spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags); 430} 431 432static inline int is_tiled(const struct gsc_fmt *fmt) 433{ 434 return fmt->pixelformat == V4L2_PIX_FMT_NV12MT_16X16; 435} 436 437static inline void gsc_hw_enable_control(struct gsc_dev *dev, bool on) 438{ 439 u32 cfg = readl(dev->regs + GSC_ENABLE); 440 441 if (on) 442 cfg |= GSC_ENABLE_ON; 443 else 444 cfg &= ~GSC_ENABLE_ON; 445 446 writel(cfg, dev->regs + GSC_ENABLE); 447} 448 449static inline int gsc_hw_get_irq_status(struct gsc_dev *dev) 450{ 451 u32 cfg = readl(dev->regs + GSC_IRQ); 452 if (cfg & GSC_IRQ_STATUS_OR_IRQ) 453 return GSC_IRQ_OVERRUN; 454 else 455 return GSC_IRQ_DONE; 456 457} 458 459static inline void gsc_hw_clear_irq(struct gsc_dev *dev, int irq) 460{ 461 u32 cfg = readl(dev->regs + GSC_IRQ); 462 if (irq == GSC_IRQ_OVERRUN) 463 cfg |= GSC_IRQ_STATUS_OR_IRQ; 464 else if (irq == GSC_IRQ_DONE) 465 cfg |= GSC_IRQ_STATUS_FRM_DONE_IRQ; 466 writel(cfg, dev->regs + GSC_IRQ); 467} 468 469static inline bool gsc_ctx_state_is_set(u32 mask, struct gsc_ctx *ctx) 470{ 471 unsigned long flags; 472 bool ret; 473 474 spin_lock_irqsave(&ctx->gsc_dev->slock, flags); 475 ret = (ctx->state & mask) == mask; 476 spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags); 477 return ret; 478} 479 480static inline struct gsc_frame *ctx_get_frame(struct gsc_ctx *ctx, 481 enum v4l2_buf_type type) 482{ 483 struct gsc_frame *frame; 484 485 if (V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE == type) { 486 frame = &ctx->s_frame; 487 } else if (V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE == type) { 488 frame = &ctx->d_frame; 489 } else { 490 pr_err("Wrong buffer/video queue type (%d)", type); 491 return ERR_PTR(-EINVAL); 492 } 493 494 return frame; 495} 496 497void gsc_hw_set_sw_reset(struct gsc_dev *dev); 498int gsc_wait_reset(struct gsc_dev *dev); 499 500void gsc_hw_set_frm_done_irq_mask(struct gsc_dev *dev, bool mask); 501void gsc_hw_set_gsc_irq_enable(struct gsc_dev *dev, bool mask); 502void gsc_hw_set_input_buf_masking(struct gsc_dev *dev, u32 shift, bool enable); 503void gsc_hw_set_output_buf_masking(struct gsc_dev *dev, u32 shift, bool enable); 504void gsc_hw_set_input_addr(struct gsc_dev *dev, struct gsc_addr *addr, 505 int index); 506void gsc_hw_set_output_addr(struct gsc_dev *dev, struct gsc_addr *addr, 507 int index); 508void gsc_hw_set_input_path(struct gsc_ctx *ctx); 509void gsc_hw_set_in_size(struct gsc_ctx *ctx); 510void gsc_hw_set_in_image_rgb(struct gsc_ctx *ctx); 511void gsc_hw_set_in_image_format(struct gsc_ctx *ctx); 512void gsc_hw_set_output_path(struct gsc_ctx *ctx); 513void gsc_hw_set_out_size(struct gsc_ctx *ctx); 514void gsc_hw_set_out_image_rgb(struct gsc_ctx *ctx); 515void gsc_hw_set_out_image_format(struct gsc_ctx *ctx); 516void gsc_hw_set_prescaler(struct gsc_ctx *ctx); 517void gsc_hw_set_mainscaler(struct gsc_ctx *ctx); 518void gsc_hw_set_rotation(struct gsc_ctx *ctx); 519void gsc_hw_set_global_alpha(struct gsc_ctx *ctx); 520void gsc_hw_set_sfr_update(struct gsc_ctx *ctx); 521 522#endif /* GSC_CORE_H_ */ 523