1/* 2 * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework 3 * 4 * Largely derived from at91_dataflash.c: 5 * Copyright (C) 2003-2005 SAN People (Pty) Ltd 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11*/ 12#include <linux/module.h> 13#include <linux/slab.h> 14#include <linux/delay.h> 15#include <linux/device.h> 16#include <linux/mutex.h> 17#include <linux/err.h> 18#include <linux/math64.h> 19#include <linux/of.h> 20#include <linux/of_device.h> 21 22#include <linux/spi/spi.h> 23#include <linux/spi/flash.h> 24 25#include <linux/mtd/mtd.h> 26#include <linux/mtd/partitions.h> 27 28/* 29 * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in 30 * each chip, which may be used for double buffered I/O; but this driver 31 * doesn't (yet) use these for any kind of i/o overlap or prefetching. 32 * 33 * Sometimes DataFlash is packaged in MMC-format cards, although the 34 * MMC stack can't (yet?) distinguish between MMC and DataFlash 35 * protocols during enumeration. 36 */ 37 38/* reads can bypass the buffers */ 39#define OP_READ_CONTINUOUS 0xE8 40#define OP_READ_PAGE 0xD2 41 42/* group B requests can run even while status reports "busy" */ 43#define OP_READ_STATUS 0xD7 /* group B */ 44 45/* move data between host and buffer */ 46#define OP_READ_BUFFER1 0xD4 /* group B */ 47#define OP_READ_BUFFER2 0xD6 /* group B */ 48#define OP_WRITE_BUFFER1 0x84 /* group B */ 49#define OP_WRITE_BUFFER2 0x87 /* group B */ 50 51/* erasing flash */ 52#define OP_ERASE_PAGE 0x81 53#define OP_ERASE_BLOCK 0x50 54 55/* move data between buffer and flash */ 56#define OP_TRANSFER_BUF1 0x53 57#define OP_TRANSFER_BUF2 0x55 58#define OP_MREAD_BUFFER1 0xD4 59#define OP_MREAD_BUFFER2 0xD6 60#define OP_MWERASE_BUFFER1 0x83 61#define OP_MWERASE_BUFFER2 0x86 62#define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */ 63#define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */ 64 65/* write to buffer, then write-erase to flash */ 66#define OP_PROGRAM_VIA_BUF1 0x82 67#define OP_PROGRAM_VIA_BUF2 0x85 68 69/* compare buffer to flash */ 70#define OP_COMPARE_BUF1 0x60 71#define OP_COMPARE_BUF2 0x61 72 73/* read flash to buffer, then write-erase to flash */ 74#define OP_REWRITE_VIA_BUF1 0x58 75#define OP_REWRITE_VIA_BUF2 0x59 76 77/* newer chips report JEDEC manufacturer and device IDs; chip 78 * serial number and OTP bits; and per-sector writeprotect. 79 */ 80#define OP_READ_ID 0x9F 81#define OP_READ_SECURITY 0x77 82#define OP_WRITE_SECURITY_REVC 0x9A 83#define OP_WRITE_SECURITY 0x9B /* revision D */ 84 85 86struct dataflash { 87 uint8_t command[4]; 88 char name[24]; 89 90 unsigned short page_offset; /* offset in flash address */ 91 unsigned int page_size; /* of bytes per page */ 92 93 struct mutex lock; 94 struct spi_device *spi; 95 96 struct mtd_info mtd; 97}; 98 99#ifdef CONFIG_OF 100static const struct of_device_id dataflash_dt_ids[] = { 101 { .compatible = "atmel,at45", }, 102 { .compatible = "atmel,dataflash", }, 103 { /* sentinel */ } 104}; 105#endif 106 107/* ......................................................................... */ 108 109/* 110 * Return the status of the DataFlash device. 111 */ 112static inline int dataflash_status(struct spi_device *spi) 113{ 114 /* NOTE: at45db321c over 25 MHz wants to write 115 * a dummy byte after the opcode... 116 */ 117 return spi_w8r8(spi, OP_READ_STATUS); 118} 119 120/* 121 * Poll the DataFlash device until it is READY. 122 * This usually takes 5-20 msec or so; more for sector erase. 123 */ 124static int dataflash_waitready(struct spi_device *spi) 125{ 126 int status; 127 128 for (;;) { 129 status = dataflash_status(spi); 130 if (status < 0) { 131 pr_debug("%s: status %d?\n", 132 dev_name(&spi->dev), status); 133 status = 0; 134 } 135 136 if (status & (1 << 7)) /* RDY/nBSY */ 137 return status; 138 139 msleep(3); 140 } 141} 142 143/* ......................................................................... */ 144 145/* 146 * Erase pages of flash. 147 */ 148static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr) 149{ 150 struct dataflash *priv = mtd->priv; 151 struct spi_device *spi = priv->spi; 152 struct spi_transfer x = { }; 153 struct spi_message msg; 154 unsigned blocksize = priv->page_size << 3; 155 uint8_t *command; 156 uint32_t rem; 157 158 pr_debug("%s: erase addr=0x%llx len 0x%llx\n", 159 dev_name(&spi->dev), (long long)instr->addr, 160 (long long)instr->len); 161 162 div_u64_rem(instr->len, priv->page_size, &rem); 163 if (rem) 164 return -EINVAL; 165 div_u64_rem(instr->addr, priv->page_size, &rem); 166 if (rem) 167 return -EINVAL; 168 169 spi_message_init(&msg); 170 171 x.tx_buf = command = priv->command; 172 x.len = 4; 173 spi_message_add_tail(&x, &msg); 174 175 mutex_lock(&priv->lock); 176 while (instr->len > 0) { 177 unsigned int pageaddr; 178 int status; 179 int do_block; 180 181 /* Calculate flash page address; use block erase (for speed) if 182 * we're at a block boundary and need to erase the whole block. 183 */ 184 pageaddr = div_u64(instr->addr, priv->page_size); 185 do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize; 186 pageaddr = pageaddr << priv->page_offset; 187 188 command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE; 189 command[1] = (uint8_t)(pageaddr >> 16); 190 command[2] = (uint8_t)(pageaddr >> 8); 191 command[3] = 0; 192 193 pr_debug("ERASE %s: (%x) %x %x %x [%i]\n", 194 do_block ? "block" : "page", 195 command[0], command[1], command[2], command[3], 196 pageaddr); 197 198 status = spi_sync(spi, &msg); 199 (void) dataflash_waitready(spi); 200 201 if (status < 0) { 202 printk(KERN_ERR "%s: erase %x, err %d\n", 203 dev_name(&spi->dev), pageaddr, status); 204 /* REVISIT: can retry instr->retries times; or 205 * giveup and instr->fail_addr = instr->addr; 206 */ 207 continue; 208 } 209 210 if (do_block) { 211 instr->addr += blocksize; 212 instr->len -= blocksize; 213 } else { 214 instr->addr += priv->page_size; 215 instr->len -= priv->page_size; 216 } 217 } 218 mutex_unlock(&priv->lock); 219 220 /* Inform MTD subsystem that erase is complete */ 221 instr->state = MTD_ERASE_DONE; 222 mtd_erase_callback(instr); 223 224 return 0; 225} 226 227/* 228 * Read from the DataFlash device. 229 * from : Start offset in flash device 230 * len : Amount to read 231 * retlen : About of data actually read 232 * buf : Buffer containing the data 233 */ 234static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len, 235 size_t *retlen, u_char *buf) 236{ 237 struct dataflash *priv = mtd->priv; 238 struct spi_transfer x[2] = { }; 239 struct spi_message msg; 240 unsigned int addr; 241 uint8_t *command; 242 int status; 243 244 pr_debug("%s: read 0x%x..0x%x\n", dev_name(&priv->spi->dev), 245 (unsigned)from, (unsigned)(from + len)); 246 247 /* Calculate flash page/byte address */ 248 addr = (((unsigned)from / priv->page_size) << priv->page_offset) 249 + ((unsigned)from % priv->page_size); 250 251 command = priv->command; 252 253 pr_debug("READ: (%x) %x %x %x\n", 254 command[0], command[1], command[2], command[3]); 255 256 spi_message_init(&msg); 257 258 x[0].tx_buf = command; 259 x[0].len = 8; 260 spi_message_add_tail(&x[0], &msg); 261 262 x[1].rx_buf = buf; 263 x[1].len = len; 264 spi_message_add_tail(&x[1], &msg); 265 266 mutex_lock(&priv->lock); 267 268 /* Continuous read, max clock = f(car) which may be less than 269 * the peak rate available. Some chips support commands with 270 * fewer "don't care" bytes. Both buffers stay unchanged. 271 */ 272 command[0] = OP_READ_CONTINUOUS; 273 command[1] = (uint8_t)(addr >> 16); 274 command[2] = (uint8_t)(addr >> 8); 275 command[3] = (uint8_t)(addr >> 0); 276 /* plus 4 "don't care" bytes */ 277 278 status = spi_sync(priv->spi, &msg); 279 mutex_unlock(&priv->lock); 280 281 if (status >= 0) { 282 *retlen = msg.actual_length - 8; 283 status = 0; 284 } else 285 pr_debug("%s: read %x..%x --> %d\n", 286 dev_name(&priv->spi->dev), 287 (unsigned)from, (unsigned)(from + len), 288 status); 289 return status; 290} 291 292/* 293 * Write to the DataFlash device. 294 * to : Start offset in flash device 295 * len : Amount to write 296 * retlen : Amount of data actually written 297 * buf : Buffer containing the data 298 */ 299static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len, 300 size_t * retlen, const u_char * buf) 301{ 302 struct dataflash *priv = mtd->priv; 303 struct spi_device *spi = priv->spi; 304 struct spi_transfer x[2] = { }; 305 struct spi_message msg; 306 unsigned int pageaddr, addr, offset, writelen; 307 size_t remaining = len; 308 u_char *writebuf = (u_char *) buf; 309 int status = -EINVAL; 310 uint8_t *command; 311 312 pr_debug("%s: write 0x%x..0x%x\n", 313 dev_name(&spi->dev), (unsigned)to, (unsigned)(to + len)); 314 315 spi_message_init(&msg); 316 317 x[0].tx_buf = command = priv->command; 318 x[0].len = 4; 319 spi_message_add_tail(&x[0], &msg); 320 321 pageaddr = ((unsigned)to / priv->page_size); 322 offset = ((unsigned)to % priv->page_size); 323 if (offset + len > priv->page_size) 324 writelen = priv->page_size - offset; 325 else 326 writelen = len; 327 328 mutex_lock(&priv->lock); 329 while (remaining > 0) { 330 pr_debug("write @ %i:%i len=%i\n", 331 pageaddr, offset, writelen); 332 333 /* REVISIT: 334 * (a) each page in a sector must be rewritten at least 335 * once every 10K sibling erase/program operations. 336 * (b) for pages that are already erased, we could 337 * use WRITE+MWRITE not PROGRAM for ~30% speedup. 338 * (c) WRITE to buffer could be done while waiting for 339 * a previous MWRITE/MWERASE to complete ... 340 * (d) error handling here seems to be mostly missing. 341 * 342 * Two persistent bits per page, plus a per-sector counter, 343 * could support (a) and (b) ... we might consider using 344 * the second half of sector zero, which is just one block, 345 * to track that state. (On AT91, that sector should also 346 * support boot-from-DataFlash.) 347 */ 348 349 addr = pageaddr << priv->page_offset; 350 351 /* (1) Maybe transfer partial page to Buffer1 */ 352 if (writelen != priv->page_size) { 353 command[0] = OP_TRANSFER_BUF1; 354 command[1] = (addr & 0x00FF0000) >> 16; 355 command[2] = (addr & 0x0000FF00) >> 8; 356 command[3] = 0; 357 358 pr_debug("TRANSFER: (%x) %x %x %x\n", 359 command[0], command[1], command[2], command[3]); 360 361 status = spi_sync(spi, &msg); 362 if (status < 0) 363 pr_debug("%s: xfer %u -> %d\n", 364 dev_name(&spi->dev), addr, status); 365 366 (void) dataflash_waitready(priv->spi); 367 } 368 369 /* (2) Program full page via Buffer1 */ 370 addr += offset; 371 command[0] = OP_PROGRAM_VIA_BUF1; 372 command[1] = (addr & 0x00FF0000) >> 16; 373 command[2] = (addr & 0x0000FF00) >> 8; 374 command[3] = (addr & 0x000000FF); 375 376 pr_debug("PROGRAM: (%x) %x %x %x\n", 377 command[0], command[1], command[2], command[3]); 378 379 x[1].tx_buf = writebuf; 380 x[1].len = writelen; 381 spi_message_add_tail(x + 1, &msg); 382 status = spi_sync(spi, &msg); 383 spi_transfer_del(x + 1); 384 if (status < 0) 385 pr_debug("%s: pgm %u/%u -> %d\n", 386 dev_name(&spi->dev), addr, writelen, status); 387 388 (void) dataflash_waitready(priv->spi); 389 390 391#ifdef CONFIG_MTD_DATAFLASH_WRITE_VERIFY 392 393 /* (3) Compare to Buffer1 */ 394 addr = pageaddr << priv->page_offset; 395 command[0] = OP_COMPARE_BUF1; 396 command[1] = (addr & 0x00FF0000) >> 16; 397 command[2] = (addr & 0x0000FF00) >> 8; 398 command[3] = 0; 399 400 pr_debug("COMPARE: (%x) %x %x %x\n", 401 command[0], command[1], command[2], command[3]); 402 403 status = spi_sync(spi, &msg); 404 if (status < 0) 405 pr_debug("%s: compare %u -> %d\n", 406 dev_name(&spi->dev), addr, status); 407 408 status = dataflash_waitready(priv->spi); 409 410 /* Check result of the compare operation */ 411 if (status & (1 << 6)) { 412 printk(KERN_ERR "%s: compare page %u, err %d\n", 413 dev_name(&spi->dev), pageaddr, status); 414 remaining = 0; 415 status = -EIO; 416 break; 417 } else 418 status = 0; 419 420#endif /* CONFIG_MTD_DATAFLASH_WRITE_VERIFY */ 421 422 remaining = remaining - writelen; 423 pageaddr++; 424 offset = 0; 425 writebuf += writelen; 426 *retlen += writelen; 427 428 if (remaining > priv->page_size) 429 writelen = priv->page_size; 430 else 431 writelen = remaining; 432 } 433 mutex_unlock(&priv->lock); 434 435 return status; 436} 437 438/* ......................................................................... */ 439 440#ifdef CONFIG_MTD_DATAFLASH_OTP 441 442static int dataflash_get_otp_info(struct mtd_info *mtd, size_t len, 443 size_t *retlen, struct otp_info *info) 444{ 445 /* Report both blocks as identical: bytes 0..64, locked. 446 * Unless the user block changed from all-ones, we can't 447 * tell whether it's still writable; so we assume it isn't. 448 */ 449 info->start = 0; 450 info->length = 64; 451 info->locked = 1; 452 *retlen = sizeof(*info); 453 return 0; 454} 455 456static ssize_t otp_read(struct spi_device *spi, unsigned base, 457 uint8_t *buf, loff_t off, size_t len) 458{ 459 struct spi_message m; 460 size_t l; 461 uint8_t *scratch; 462 struct spi_transfer t; 463 int status; 464 465 if (off > 64) 466 return -EINVAL; 467 468 if ((off + len) > 64) 469 len = 64 - off; 470 471 spi_message_init(&m); 472 473 l = 4 + base + off + len; 474 scratch = kzalloc(l, GFP_KERNEL); 475 if (!scratch) 476 return -ENOMEM; 477 478 /* OUT: OP_READ_SECURITY, 3 don't-care bytes, zeroes 479 * IN: ignore 4 bytes, data bytes 0..N (max 127) 480 */ 481 scratch[0] = OP_READ_SECURITY; 482 483 memset(&t, 0, sizeof t); 484 t.tx_buf = scratch; 485 t.rx_buf = scratch; 486 t.len = l; 487 spi_message_add_tail(&t, &m); 488 489 dataflash_waitready(spi); 490 491 status = spi_sync(spi, &m); 492 if (status >= 0) { 493 memcpy(buf, scratch + 4 + base + off, len); 494 status = len; 495 } 496 497 kfree(scratch); 498 return status; 499} 500 501static int dataflash_read_fact_otp(struct mtd_info *mtd, 502 loff_t from, size_t len, size_t *retlen, u_char *buf) 503{ 504 struct dataflash *priv = mtd->priv; 505 int status; 506 507 /* 64 bytes, from 0..63 ... start at 64 on-chip */ 508 mutex_lock(&priv->lock); 509 status = otp_read(priv->spi, 64, buf, from, len); 510 mutex_unlock(&priv->lock); 511 512 if (status < 0) 513 return status; 514 *retlen = status; 515 return 0; 516} 517 518static int dataflash_read_user_otp(struct mtd_info *mtd, 519 loff_t from, size_t len, size_t *retlen, u_char *buf) 520{ 521 struct dataflash *priv = mtd->priv; 522 int status; 523 524 /* 64 bytes, from 0..63 ... start at 0 on-chip */ 525 mutex_lock(&priv->lock); 526 status = otp_read(priv->spi, 0, buf, from, len); 527 mutex_unlock(&priv->lock); 528 529 if (status < 0) 530 return status; 531 *retlen = status; 532 return 0; 533} 534 535static int dataflash_write_user_otp(struct mtd_info *mtd, 536 loff_t from, size_t len, size_t *retlen, u_char *buf) 537{ 538 struct spi_message m; 539 const size_t l = 4 + 64; 540 uint8_t *scratch; 541 struct spi_transfer t; 542 struct dataflash *priv = mtd->priv; 543 int status; 544 545 if (from >= 64) { 546 /* 547 * Attempting to write beyond the end of OTP memory, 548 * no data can be written. 549 */ 550 *retlen = 0; 551 return 0; 552 } 553 554 /* Truncate the write to fit into OTP memory. */ 555 if ((from + len) > 64) 556 len = 64 - from; 557 558 /* OUT: OP_WRITE_SECURITY, 3 zeroes, 64 data-or-zero bytes 559 * IN: ignore all 560 */ 561 scratch = kzalloc(l, GFP_KERNEL); 562 if (!scratch) 563 return -ENOMEM; 564 scratch[0] = OP_WRITE_SECURITY; 565 memcpy(scratch + 4 + from, buf, len); 566 567 spi_message_init(&m); 568 569 memset(&t, 0, sizeof t); 570 t.tx_buf = scratch; 571 t.len = l; 572 spi_message_add_tail(&t, &m); 573 574 /* Write the OTP bits, if they've not yet been written. 575 * This modifies SRAM buffer1. 576 */ 577 mutex_lock(&priv->lock); 578 dataflash_waitready(priv->spi); 579 status = spi_sync(priv->spi, &m); 580 mutex_unlock(&priv->lock); 581 582 kfree(scratch); 583 584 if (status >= 0) { 585 status = 0; 586 *retlen = len; 587 } 588 return status; 589} 590 591static char *otp_setup(struct mtd_info *device, char revision) 592{ 593 device->_get_fact_prot_info = dataflash_get_otp_info; 594 device->_read_fact_prot_reg = dataflash_read_fact_otp; 595 device->_get_user_prot_info = dataflash_get_otp_info; 596 device->_read_user_prot_reg = dataflash_read_user_otp; 597 598 /* rev c parts (at45db321c and at45db1281 only!) use a 599 * different write procedure; not (yet?) implemented. 600 */ 601 if (revision > 'c') 602 device->_write_user_prot_reg = dataflash_write_user_otp; 603 604 return ", OTP"; 605} 606 607#else 608 609static char *otp_setup(struct mtd_info *device, char revision) 610{ 611 return " (OTP)"; 612} 613 614#endif 615 616/* ......................................................................... */ 617 618/* 619 * Register DataFlash device with MTD subsystem. 620 */ 621static int add_dataflash_otp(struct spi_device *spi, char *name, int nr_pages, 622 int pagesize, int pageoffset, char revision) 623{ 624 struct dataflash *priv; 625 struct mtd_info *device; 626 struct mtd_part_parser_data ppdata; 627 struct flash_platform_data *pdata = dev_get_platdata(&spi->dev); 628 char *otp_tag = ""; 629 int err = 0; 630 631 priv = kzalloc(sizeof *priv, GFP_KERNEL); 632 if (!priv) 633 return -ENOMEM; 634 635 mutex_init(&priv->lock); 636 priv->spi = spi; 637 priv->page_size = pagesize; 638 priv->page_offset = pageoffset; 639 640 /* name must be usable with cmdlinepart */ 641 sprintf(priv->name, "spi%d.%d-%s", 642 spi->master->bus_num, spi->chip_select, 643 name); 644 645 device = &priv->mtd; 646 device->name = (pdata && pdata->name) ? pdata->name : priv->name; 647 device->size = nr_pages * pagesize; 648 device->erasesize = pagesize; 649 device->writesize = pagesize; 650 device->owner = THIS_MODULE; 651 device->type = MTD_DATAFLASH; 652 device->flags = MTD_WRITEABLE; 653 device->_erase = dataflash_erase; 654 device->_read = dataflash_read; 655 device->_write = dataflash_write; 656 device->priv = priv; 657 658 device->dev.parent = &spi->dev; 659 660 if (revision >= 'c') 661 otp_tag = otp_setup(device, revision); 662 663 dev_info(&spi->dev, "%s (%lld KBytes) pagesize %d bytes%s\n", 664 name, (long long)((device->size + 1023) >> 10), 665 pagesize, otp_tag); 666 spi_set_drvdata(spi, priv); 667 668 ppdata.of_node = spi->dev.of_node; 669 err = mtd_device_parse_register(device, NULL, &ppdata, 670 pdata ? pdata->parts : NULL, 671 pdata ? pdata->nr_parts : 0); 672 673 if (!err) 674 return 0; 675 676 kfree(priv); 677 return err; 678} 679 680static inline int add_dataflash(struct spi_device *spi, char *name, 681 int nr_pages, int pagesize, int pageoffset) 682{ 683 return add_dataflash_otp(spi, name, nr_pages, pagesize, 684 pageoffset, 0); 685} 686 687struct flash_info { 688 char *name; 689 690 /* JEDEC id has a high byte of zero plus three data bytes: 691 * the manufacturer id, then a two byte device id. 692 */ 693 uint32_t jedec_id; 694 695 /* The size listed here is what works with OP_ERASE_PAGE. */ 696 unsigned nr_pages; 697 uint16_t pagesize; 698 uint16_t pageoffset; 699 700 uint16_t flags; 701#define SUP_POW2PS 0x0002 /* supports 2^N byte pages */ 702#define IS_POW2PS 0x0001 /* uses 2^N byte pages */ 703}; 704 705static struct flash_info dataflash_data[] = { 706 707 /* 708 * NOTE: chips with SUP_POW2PS (rev D and up) need two entries, 709 * one with IS_POW2PS and the other without. The entry with the 710 * non-2^N byte page size can't name exact chip revisions without 711 * losing backwards compatibility for cmdlinepart. 712 * 713 * These newer chips also support 128-byte security registers (with 714 * 64 bytes one-time-programmable) and software write-protection. 715 */ 716 { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS}, 717 { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS}, 718 719 { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS}, 720 { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS}, 721 722 { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS}, 723 { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS}, 724 725 { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS}, 726 { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS}, 727 728 { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS}, 729 { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS}, 730 731 { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */ 732 733 { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS}, 734 { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS}, 735 736 { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS}, 737 { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS}, 738}; 739 740static struct flash_info *jedec_probe(struct spi_device *spi) 741{ 742 int tmp; 743 uint8_t code = OP_READ_ID; 744 uint8_t id[3]; 745 uint32_t jedec; 746 struct flash_info *info; 747 int status; 748 749 /* JEDEC also defines an optional "extended device information" 750 * string for after vendor-specific data, after the three bytes 751 * we use here. Supporting some chips might require using it. 752 * 753 * If the vendor ID isn't Atmel's (0x1f), assume this call failed. 754 * That's not an error; only rev C and newer chips handle it, and 755 * only Atmel sells these chips. 756 */ 757 tmp = spi_write_then_read(spi, &code, 1, id, 3); 758 if (tmp < 0) { 759 pr_debug("%s: error %d reading JEDEC ID\n", 760 dev_name(&spi->dev), tmp); 761 return ERR_PTR(tmp); 762 } 763 if (id[0] != 0x1f) 764 return NULL; 765 766 jedec = id[0]; 767 jedec = jedec << 8; 768 jedec |= id[1]; 769 jedec = jedec << 8; 770 jedec |= id[2]; 771 772 for (tmp = 0, info = dataflash_data; 773 tmp < ARRAY_SIZE(dataflash_data); 774 tmp++, info++) { 775 if (info->jedec_id == jedec) { 776 pr_debug("%s: OTP, sector protect%s\n", 777 dev_name(&spi->dev), 778 (info->flags & SUP_POW2PS) 779 ? ", binary pagesize" : "" 780 ); 781 if (info->flags & SUP_POW2PS) { 782 status = dataflash_status(spi); 783 if (status < 0) { 784 pr_debug("%s: status error %d\n", 785 dev_name(&spi->dev), status); 786 return ERR_PTR(status); 787 } 788 if (status & 0x1) { 789 if (info->flags & IS_POW2PS) 790 return info; 791 } else { 792 if (!(info->flags & IS_POW2PS)) 793 return info; 794 } 795 } else 796 return info; 797 } 798 } 799 800 /* 801 * Treat other chips as errors ... we won't know the right page 802 * size (it might be binary) even when we can tell which density 803 * class is involved (legacy chip id scheme). 804 */ 805 dev_warn(&spi->dev, "JEDEC id %06x not handled\n", jedec); 806 return ERR_PTR(-ENODEV); 807} 808 809/* 810 * Detect and initialize DataFlash device, using JEDEC IDs on newer chips 811 * or else the ID code embedded in the status bits: 812 * 813 * Device Density ID code #Pages PageSize Offset 814 * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9 815 * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9 816 * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9 817 * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9 818 * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10 819 * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10 820 * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11 821 * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11 822 */ 823static int dataflash_probe(struct spi_device *spi) 824{ 825 int status; 826 struct flash_info *info; 827 828 /* 829 * Try to detect dataflash by JEDEC ID. 830 * If it succeeds we know we have either a C or D part. 831 * D will support power of 2 pagesize option. 832 * Both support the security register, though with different 833 * write procedures. 834 */ 835 info = jedec_probe(spi); 836 if (IS_ERR(info)) 837 return PTR_ERR(info); 838 if (info != NULL) 839 return add_dataflash_otp(spi, info->name, info->nr_pages, 840 info->pagesize, info->pageoffset, 841 (info->flags & SUP_POW2PS) ? 'd' : 'c'); 842 843 /* 844 * Older chips support only legacy commands, identifing 845 * capacity using bits in the status byte. 846 */ 847 status = dataflash_status(spi); 848 if (status <= 0 || status == 0xff) { 849 pr_debug("%s: status error %d\n", 850 dev_name(&spi->dev), status); 851 if (status == 0 || status == 0xff) 852 status = -ENODEV; 853 return status; 854 } 855 856 /* if there's a device there, assume it's dataflash. 857 * board setup should have set spi->max_speed_max to 858 * match f(car) for continuous reads, mode 0 or 3. 859 */ 860 switch (status & 0x3c) { 861 case 0x0c: /* 0 0 1 1 x x */ 862 status = add_dataflash(spi, "AT45DB011B", 512, 264, 9); 863 break; 864 case 0x14: /* 0 1 0 1 x x */ 865 status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9); 866 break; 867 case 0x1c: /* 0 1 1 1 x x */ 868 status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9); 869 break; 870 case 0x24: /* 1 0 0 1 x x */ 871 status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9); 872 break; 873 case 0x2c: /* 1 0 1 1 x x */ 874 status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10); 875 break; 876 case 0x34: /* 1 1 0 1 x x */ 877 status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10); 878 break; 879 case 0x38: /* 1 1 1 x x x */ 880 case 0x3c: 881 status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11); 882 break; 883 /* obsolete AT45DB1282 not (yet?) supported */ 884 default: 885 dev_info(&spi->dev, "unsupported device (%x)\n", 886 status & 0x3c); 887 status = -ENODEV; 888 } 889 890 if (status < 0) 891 pr_debug("%s: add_dataflash --> %d\n", dev_name(&spi->dev), 892 status); 893 894 return status; 895} 896 897static int dataflash_remove(struct spi_device *spi) 898{ 899 struct dataflash *flash = spi_get_drvdata(spi); 900 int status; 901 902 pr_debug("%s: remove\n", dev_name(&spi->dev)); 903 904 status = mtd_device_unregister(&flash->mtd); 905 if (status == 0) 906 kfree(flash); 907 return status; 908} 909 910static struct spi_driver dataflash_driver = { 911 .driver = { 912 .name = "mtd_dataflash", 913 .owner = THIS_MODULE, 914 .of_match_table = of_match_ptr(dataflash_dt_ids), 915 }, 916 917 .probe = dataflash_probe, 918 .remove = dataflash_remove, 919 920 /* FIXME: investigate suspend and resume... */ 921}; 922 923module_spi_driver(dataflash_driver); 924 925MODULE_LICENSE("GPL"); 926MODULE_AUTHOR("Andrew Victor, David Brownell"); 927MODULE_DESCRIPTION("MTD DataFlash driver"); 928MODULE_ALIAS("spi:mtd_dataflash"); 929