1/* 2 * NAND flash simulator. 3 * 4 * Author: Artem B. Bityuckiy <dedekind@oktetlabs.ru>, <dedekind@infradead.org> 5 * 6 * Copyright (C) 2004 Nokia Corporation 7 * 8 * Note: NS means "NAND Simulator". 9 * Note: Input means input TO flash chip, output means output FROM chip. 10 * 11 * This program is free software; you can redistribute it and/or modify it 12 * under the terms of the GNU General Public License as published by the 13 * Free Software Foundation; either version 2, or (at your option) any later 14 * version. 15 * 16 * This program is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General 19 * Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA 24 */ 25 26#include <linux/init.h> 27#include <linux/types.h> 28#include <linux/module.h> 29#include <linux/moduleparam.h> 30#include <linux/vmalloc.h> 31#include <linux/math64.h> 32#include <linux/slab.h> 33#include <linux/errno.h> 34#include <linux/string.h> 35#include <linux/mtd/mtd.h> 36#include <linux/mtd/nand.h> 37#include <linux/mtd/nand_bch.h> 38#include <linux/mtd/partitions.h> 39#include <linux/delay.h> 40#include <linux/list.h> 41#include <linux/random.h> 42#include <linux/sched.h> 43#include <linux/fs.h> 44#include <linux/pagemap.h> 45#include <linux/seq_file.h> 46#include <linux/debugfs.h> 47 48/* Default simulator parameters values */ 49#if !defined(CONFIG_NANDSIM_FIRST_ID_BYTE) || \ 50 !defined(CONFIG_NANDSIM_SECOND_ID_BYTE) || \ 51 !defined(CONFIG_NANDSIM_THIRD_ID_BYTE) || \ 52 !defined(CONFIG_NANDSIM_FOURTH_ID_BYTE) 53#define CONFIG_NANDSIM_FIRST_ID_BYTE 0x98 54#define CONFIG_NANDSIM_SECOND_ID_BYTE 0x39 55#define CONFIG_NANDSIM_THIRD_ID_BYTE 0xFF /* No byte */ 56#define CONFIG_NANDSIM_FOURTH_ID_BYTE 0xFF /* No byte */ 57#endif 58 59#ifndef CONFIG_NANDSIM_ACCESS_DELAY 60#define CONFIG_NANDSIM_ACCESS_DELAY 25 61#endif 62#ifndef CONFIG_NANDSIM_PROGRAMM_DELAY 63#define CONFIG_NANDSIM_PROGRAMM_DELAY 200 64#endif 65#ifndef CONFIG_NANDSIM_ERASE_DELAY 66#define CONFIG_NANDSIM_ERASE_DELAY 2 67#endif 68#ifndef CONFIG_NANDSIM_OUTPUT_CYCLE 69#define CONFIG_NANDSIM_OUTPUT_CYCLE 40 70#endif 71#ifndef CONFIG_NANDSIM_INPUT_CYCLE 72#define CONFIG_NANDSIM_INPUT_CYCLE 50 73#endif 74#ifndef CONFIG_NANDSIM_BUS_WIDTH 75#define CONFIG_NANDSIM_BUS_WIDTH 8 76#endif 77#ifndef CONFIG_NANDSIM_DO_DELAYS 78#define CONFIG_NANDSIM_DO_DELAYS 0 79#endif 80#ifndef CONFIG_NANDSIM_LOG 81#define CONFIG_NANDSIM_LOG 0 82#endif 83#ifndef CONFIG_NANDSIM_DBG 84#define CONFIG_NANDSIM_DBG 0 85#endif 86#ifndef CONFIG_NANDSIM_MAX_PARTS 87#define CONFIG_NANDSIM_MAX_PARTS 32 88#endif 89 90static uint access_delay = CONFIG_NANDSIM_ACCESS_DELAY; 91static uint programm_delay = CONFIG_NANDSIM_PROGRAMM_DELAY; 92static uint erase_delay = CONFIG_NANDSIM_ERASE_DELAY; 93static uint output_cycle = CONFIG_NANDSIM_OUTPUT_CYCLE; 94static uint input_cycle = CONFIG_NANDSIM_INPUT_CYCLE; 95static uint bus_width = CONFIG_NANDSIM_BUS_WIDTH; 96static uint do_delays = CONFIG_NANDSIM_DO_DELAYS; 97static uint log = CONFIG_NANDSIM_LOG; 98static uint dbg = CONFIG_NANDSIM_DBG; 99static unsigned long parts[CONFIG_NANDSIM_MAX_PARTS]; 100static unsigned int parts_num; 101static char *badblocks = NULL; 102static char *weakblocks = NULL; 103static char *weakpages = NULL; 104static unsigned int bitflips = 0; 105static char *gravepages = NULL; 106static unsigned int overridesize = 0; 107static char *cache_file = NULL; 108static unsigned int bbt; 109static unsigned int bch; 110static u_char id_bytes[8] = { 111 [0] = CONFIG_NANDSIM_FIRST_ID_BYTE, 112 [1] = CONFIG_NANDSIM_SECOND_ID_BYTE, 113 [2] = CONFIG_NANDSIM_THIRD_ID_BYTE, 114 [3] = CONFIG_NANDSIM_FOURTH_ID_BYTE, 115 [4 ... 7] = 0xFF, 116}; 117 118module_param_array(id_bytes, byte, NULL, 0400); 119module_param_named(first_id_byte, id_bytes[0], byte, 0400); 120module_param_named(second_id_byte, id_bytes[1], byte, 0400); 121module_param_named(third_id_byte, id_bytes[2], byte, 0400); 122module_param_named(fourth_id_byte, id_bytes[3], byte, 0400); 123module_param(access_delay, uint, 0400); 124module_param(programm_delay, uint, 0400); 125module_param(erase_delay, uint, 0400); 126module_param(output_cycle, uint, 0400); 127module_param(input_cycle, uint, 0400); 128module_param(bus_width, uint, 0400); 129module_param(do_delays, uint, 0400); 130module_param(log, uint, 0400); 131module_param(dbg, uint, 0400); 132module_param_array(parts, ulong, &parts_num, 0400); 133module_param(badblocks, charp, 0400); 134module_param(weakblocks, charp, 0400); 135module_param(weakpages, charp, 0400); 136module_param(bitflips, uint, 0400); 137module_param(gravepages, charp, 0400); 138module_param(overridesize, uint, 0400); 139module_param(cache_file, charp, 0400); 140module_param(bbt, uint, 0400); 141module_param(bch, uint, 0400); 142 143MODULE_PARM_DESC(id_bytes, "The ID bytes returned by NAND Flash 'read ID' command"); 144MODULE_PARM_DESC(first_id_byte, "The first byte returned by NAND Flash 'read ID' command (manufacturer ID) (obsolete)"); 145MODULE_PARM_DESC(second_id_byte, "The second byte returned by NAND Flash 'read ID' command (chip ID) (obsolete)"); 146MODULE_PARM_DESC(third_id_byte, "The third byte returned by NAND Flash 'read ID' command (obsolete)"); 147MODULE_PARM_DESC(fourth_id_byte, "The fourth byte returned by NAND Flash 'read ID' command (obsolete)"); 148MODULE_PARM_DESC(access_delay, "Initial page access delay (microseconds)"); 149MODULE_PARM_DESC(programm_delay, "Page programm delay (microseconds"); 150MODULE_PARM_DESC(erase_delay, "Sector erase delay (milliseconds)"); 151MODULE_PARM_DESC(output_cycle, "Word output (from flash) time (nanoseconds)"); 152MODULE_PARM_DESC(input_cycle, "Word input (to flash) time (nanoseconds)"); 153MODULE_PARM_DESC(bus_width, "Chip's bus width (8- or 16-bit)"); 154MODULE_PARM_DESC(do_delays, "Simulate NAND delays using busy-waits if not zero"); 155MODULE_PARM_DESC(log, "Perform logging if not zero"); 156MODULE_PARM_DESC(dbg, "Output debug information if not zero"); 157MODULE_PARM_DESC(parts, "Partition sizes (in erase blocks) separated by commas"); 158/* Page and erase block positions for the following parameters are independent of any partitions */ 159MODULE_PARM_DESC(badblocks, "Erase blocks that are initially marked bad, separated by commas"); 160MODULE_PARM_DESC(weakblocks, "Weak erase blocks [: remaining erase cycles (defaults to 3)]" 161 " separated by commas e.g. 113:2 means eb 113" 162 " can be erased only twice before failing"); 163MODULE_PARM_DESC(weakpages, "Weak pages [: maximum writes (defaults to 3)]" 164 " separated by commas e.g. 1401:2 means page 1401" 165 " can be written only twice before failing"); 166MODULE_PARM_DESC(bitflips, "Maximum number of random bit flips per page (zero by default)"); 167MODULE_PARM_DESC(gravepages, "Pages that lose data [: maximum reads (defaults to 3)]" 168 " separated by commas e.g. 1401:2 means page 1401" 169 " can be read only twice before failing"); 170MODULE_PARM_DESC(overridesize, "Specifies the NAND Flash size overriding the ID bytes. " 171 "The size is specified in erase blocks and as the exponent of a power of two" 172 " e.g. 5 means a size of 32 erase blocks"); 173MODULE_PARM_DESC(cache_file, "File to use to cache nand pages instead of memory"); 174MODULE_PARM_DESC(bbt, "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in data area"); 175MODULE_PARM_DESC(bch, "Enable BCH ecc and set how many bits should " 176 "be correctable in 512-byte blocks"); 177 178/* The largest possible page size */ 179#define NS_LARGEST_PAGE_SIZE 4096 180 181/* The prefix for simulator output */ 182#define NS_OUTPUT_PREFIX "[nandsim]" 183 184/* Simulator's output macros (logging, debugging, warning, error) */ 185#define NS_LOG(args...) \ 186 do { if (log) printk(KERN_DEBUG NS_OUTPUT_PREFIX " log: " args); } while(0) 187#define NS_DBG(args...) \ 188 do { if (dbg) printk(KERN_DEBUG NS_OUTPUT_PREFIX " debug: " args); } while(0) 189#define NS_WARN(args...) \ 190 do { printk(KERN_WARNING NS_OUTPUT_PREFIX " warning: " args); } while(0) 191#define NS_ERR(args...) \ 192 do { printk(KERN_ERR NS_OUTPUT_PREFIX " error: " args); } while(0) 193#define NS_INFO(args...) \ 194 do { printk(KERN_INFO NS_OUTPUT_PREFIX " " args); } while(0) 195 196/* Busy-wait delay macros (microseconds, milliseconds) */ 197#define NS_UDELAY(us) \ 198 do { if (do_delays) udelay(us); } while(0) 199#define NS_MDELAY(us) \ 200 do { if (do_delays) mdelay(us); } while(0) 201 202/* Is the nandsim structure initialized ? */ 203#define NS_IS_INITIALIZED(ns) ((ns)->geom.totsz != 0) 204 205/* Good operation completion status */ 206#define NS_STATUS_OK(ns) (NAND_STATUS_READY | (NAND_STATUS_WP * ((ns)->lines.wp == 0))) 207 208/* Operation failed completion status */ 209#define NS_STATUS_FAILED(ns) (NAND_STATUS_FAIL | NS_STATUS_OK(ns)) 210 211/* Calculate the page offset in flash RAM image by (row, column) address */ 212#define NS_RAW_OFFSET(ns) \ 213 (((ns)->regs.row * (ns)->geom.pgszoob) + (ns)->regs.column) 214 215/* Calculate the OOB offset in flash RAM image by (row, column) address */ 216#define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz) 217 218/* After a command is input, the simulator goes to one of the following states */ 219#define STATE_CMD_READ0 0x00000001 /* read data from the beginning of page */ 220#define STATE_CMD_READ1 0x00000002 /* read data from the second half of page */ 221#define STATE_CMD_READSTART 0x00000003 /* read data second command (large page devices) */ 222#define STATE_CMD_PAGEPROG 0x00000004 /* start page program */ 223#define STATE_CMD_READOOB 0x00000005 /* read OOB area */ 224#define STATE_CMD_ERASE1 0x00000006 /* sector erase first command */ 225#define STATE_CMD_STATUS 0x00000007 /* read status */ 226#define STATE_CMD_SEQIN 0x00000009 /* sequential data input */ 227#define STATE_CMD_READID 0x0000000A /* read ID */ 228#define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */ 229#define STATE_CMD_RESET 0x0000000C /* reset */ 230#define STATE_CMD_RNDOUT 0x0000000D /* random output command */ 231#define STATE_CMD_RNDOUTSTART 0x0000000E /* random output start command */ 232#define STATE_CMD_MASK 0x0000000F /* command states mask */ 233 234/* After an address is input, the simulator goes to one of these states */ 235#define STATE_ADDR_PAGE 0x00000010 /* full (row, column) address is accepted */ 236#define STATE_ADDR_SEC 0x00000020 /* sector address was accepted */ 237#define STATE_ADDR_COLUMN 0x00000030 /* column address was accepted */ 238#define STATE_ADDR_ZERO 0x00000040 /* one byte zero address was accepted */ 239#define STATE_ADDR_MASK 0x00000070 /* address states mask */ 240 241/* During data input/output the simulator is in these states */ 242#define STATE_DATAIN 0x00000100 /* waiting for data input */ 243#define STATE_DATAIN_MASK 0x00000100 /* data input states mask */ 244 245#define STATE_DATAOUT 0x00001000 /* waiting for page data output */ 246#define STATE_DATAOUT_ID 0x00002000 /* waiting for ID bytes output */ 247#define STATE_DATAOUT_STATUS 0x00003000 /* waiting for status output */ 248#define STATE_DATAOUT_MASK 0x00007000 /* data output states mask */ 249 250/* Previous operation is done, ready to accept new requests */ 251#define STATE_READY 0x00000000 252 253/* This state is used to mark that the next state isn't known yet */ 254#define STATE_UNKNOWN 0x10000000 255 256/* Simulator's actions bit masks */ 257#define ACTION_CPY 0x00100000 /* copy page/OOB to the internal buffer */ 258#define ACTION_PRGPAGE 0x00200000 /* program the internal buffer to flash */ 259#define ACTION_SECERASE 0x00300000 /* erase sector */ 260#define ACTION_ZEROOFF 0x00400000 /* don't add any offset to address */ 261#define ACTION_HALFOFF 0x00500000 /* add to address half of page */ 262#define ACTION_OOBOFF 0x00600000 /* add to address OOB offset */ 263#define ACTION_MASK 0x00700000 /* action mask */ 264 265#define NS_OPER_NUM 13 /* Number of operations supported by the simulator */ 266#define NS_OPER_STATES 6 /* Maximum number of states in operation */ 267 268#define OPT_ANY 0xFFFFFFFF /* any chip supports this operation */ 269#define OPT_PAGE512 0x00000002 /* 512-byte page chips */ 270#define OPT_PAGE2048 0x00000008 /* 2048-byte page chips */ 271#define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */ 272#define OPT_PAGE4096 0x00000080 /* 4096-byte page chips */ 273#define OPT_LARGEPAGE (OPT_PAGE2048 | OPT_PAGE4096) /* 2048 & 4096-byte page chips */ 274#define OPT_SMALLPAGE (OPT_PAGE512) /* 512-byte page chips */ 275 276/* Remove action bits from state */ 277#define NS_STATE(x) ((x) & ~ACTION_MASK) 278 279/* 280 * Maximum previous states which need to be saved. Currently saving is 281 * only needed for page program operation with preceded read command 282 * (which is only valid for 512-byte pages). 283 */ 284#define NS_MAX_PREVSTATES 1 285 286/* Maximum page cache pages needed to read or write a NAND page to the cache_file */ 287#define NS_MAX_HELD_PAGES 16 288 289struct nandsim_debug_info { 290 struct dentry *dfs_root; 291 struct dentry *dfs_wear_report; 292}; 293 294/* 295 * A union to represent flash memory contents and flash buffer. 296 */ 297union ns_mem { 298 u_char *byte; /* for byte access */ 299 uint16_t *word; /* for 16-bit word access */ 300}; 301 302/* 303 * The structure which describes all the internal simulator data. 304 */ 305struct nandsim { 306 struct mtd_partition partitions[CONFIG_NANDSIM_MAX_PARTS]; 307 unsigned int nbparts; 308 309 uint busw; /* flash chip bus width (8 or 16) */ 310 u_char ids[8]; /* chip's ID bytes */ 311 uint32_t options; /* chip's characteristic bits */ 312 uint32_t state; /* current chip state */ 313 uint32_t nxstate; /* next expected state */ 314 315 uint32_t *op; /* current operation, NULL operations isn't known yet */ 316 uint32_t pstates[NS_MAX_PREVSTATES]; /* previous states */ 317 uint16_t npstates; /* number of previous states saved */ 318 uint16_t stateidx; /* current state index */ 319 320 /* The simulated NAND flash pages array */ 321 union ns_mem *pages; 322 323 /* Slab allocator for nand pages */ 324 struct kmem_cache *nand_pages_slab; 325 326 /* Internal buffer of page + OOB size bytes */ 327 union ns_mem buf; 328 329 /* NAND flash "geometry" */ 330 struct { 331 uint64_t totsz; /* total flash size, bytes */ 332 uint32_t secsz; /* flash sector (erase block) size, bytes */ 333 uint pgsz; /* NAND flash page size, bytes */ 334 uint oobsz; /* page OOB area size, bytes */ 335 uint64_t totszoob; /* total flash size including OOB, bytes */ 336 uint pgszoob; /* page size including OOB , bytes*/ 337 uint secszoob; /* sector size including OOB, bytes */ 338 uint pgnum; /* total number of pages */ 339 uint pgsec; /* number of pages per sector */ 340 uint secshift; /* bits number in sector size */ 341 uint pgshift; /* bits number in page size */ 342 uint pgaddrbytes; /* bytes per page address */ 343 uint secaddrbytes; /* bytes per sector address */ 344 uint idbytes; /* the number ID bytes that this chip outputs */ 345 } geom; 346 347 /* NAND flash internal registers */ 348 struct { 349 unsigned command; /* the command register */ 350 u_char status; /* the status register */ 351 uint row; /* the page number */ 352 uint column; /* the offset within page */ 353 uint count; /* internal counter */ 354 uint num; /* number of bytes which must be processed */ 355 uint off; /* fixed page offset */ 356 } regs; 357 358 /* NAND flash lines state */ 359 struct { 360 int ce; /* chip Enable */ 361 int cle; /* command Latch Enable */ 362 int ale; /* address Latch Enable */ 363 int wp; /* write Protect */ 364 } lines; 365 366 /* Fields needed when using a cache file */ 367 struct file *cfile; /* Open file */ 368 unsigned long *pages_written; /* Which pages have been written */ 369 void *file_buf; 370 struct page *held_pages[NS_MAX_HELD_PAGES]; 371 int held_cnt; 372 373 struct nandsim_debug_info dbg; 374}; 375 376/* 377 * Operations array. To perform any operation the simulator must pass 378 * through the correspondent states chain. 379 */ 380static struct nandsim_operations { 381 uint32_t reqopts; /* options which are required to perform the operation */ 382 uint32_t states[NS_OPER_STATES]; /* operation's states */ 383} ops[NS_OPER_NUM] = { 384 /* Read page + OOB from the beginning */ 385 {OPT_SMALLPAGE, {STATE_CMD_READ0 | ACTION_ZEROOFF, STATE_ADDR_PAGE | ACTION_CPY, 386 STATE_DATAOUT, STATE_READY}}, 387 /* Read page + OOB from the second half */ 388 {OPT_PAGE512_8BIT, {STATE_CMD_READ1 | ACTION_HALFOFF, STATE_ADDR_PAGE | ACTION_CPY, 389 STATE_DATAOUT, STATE_READY}}, 390 /* Read OOB */ 391 {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY, 392 STATE_DATAOUT, STATE_READY}}, 393 /* Program page starting from the beginning */ 394 {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN, 395 STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}}, 396 /* Program page starting from the beginning */ 397 {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE, 398 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}}, 399 /* Program page starting from the second half */ 400 {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE, 401 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}}, 402 /* Program OOB */ 403 {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE, 404 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}}, 405 /* Erase sector */ 406 {OPT_ANY, {STATE_CMD_ERASE1, STATE_ADDR_SEC, STATE_CMD_ERASE2 | ACTION_SECERASE, STATE_READY}}, 407 /* Read status */ 408 {OPT_ANY, {STATE_CMD_STATUS, STATE_DATAOUT_STATUS, STATE_READY}}, 409 /* Read ID */ 410 {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}}, 411 /* Large page devices read page */ 412 {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY, 413 STATE_DATAOUT, STATE_READY}}, 414 /* Large page devices random page read */ 415 {OPT_LARGEPAGE, {STATE_CMD_RNDOUT, STATE_ADDR_COLUMN, STATE_CMD_RNDOUTSTART | ACTION_CPY, 416 STATE_DATAOUT, STATE_READY}}, 417}; 418 419struct weak_block { 420 struct list_head list; 421 unsigned int erase_block_no; 422 unsigned int max_erases; 423 unsigned int erases_done; 424}; 425 426static LIST_HEAD(weak_blocks); 427 428struct weak_page { 429 struct list_head list; 430 unsigned int page_no; 431 unsigned int max_writes; 432 unsigned int writes_done; 433}; 434 435static LIST_HEAD(weak_pages); 436 437struct grave_page { 438 struct list_head list; 439 unsigned int page_no; 440 unsigned int max_reads; 441 unsigned int reads_done; 442}; 443 444static LIST_HEAD(grave_pages); 445 446static unsigned long *erase_block_wear = NULL; 447static unsigned int wear_eb_count = 0; 448static unsigned long total_wear = 0; 449 450/* MTD structure for NAND controller */ 451static struct mtd_info *nsmtd; 452 453static int nandsim_debugfs_show(struct seq_file *m, void *private) 454{ 455 unsigned long wmin = -1, wmax = 0, avg; 456 unsigned long deciles[10], decile_max[10], tot = 0; 457 unsigned int i; 458 459 /* Calc wear stats */ 460 for (i = 0; i < wear_eb_count; ++i) { 461 unsigned long wear = erase_block_wear[i]; 462 if (wear < wmin) 463 wmin = wear; 464 if (wear > wmax) 465 wmax = wear; 466 tot += wear; 467 } 468 469 for (i = 0; i < 9; ++i) { 470 deciles[i] = 0; 471 decile_max[i] = (wmax * (i + 1) + 5) / 10; 472 } 473 deciles[9] = 0; 474 decile_max[9] = wmax; 475 for (i = 0; i < wear_eb_count; ++i) { 476 int d; 477 unsigned long wear = erase_block_wear[i]; 478 for (d = 0; d < 10; ++d) 479 if (wear <= decile_max[d]) { 480 deciles[d] += 1; 481 break; 482 } 483 } 484 avg = tot / wear_eb_count; 485 486 /* Output wear report */ 487 seq_printf(m, "Total numbers of erases: %lu\n", tot); 488 seq_printf(m, "Number of erase blocks: %u\n", wear_eb_count); 489 seq_printf(m, "Average number of erases: %lu\n", avg); 490 seq_printf(m, "Maximum number of erases: %lu\n", wmax); 491 seq_printf(m, "Minimum number of erases: %lu\n", wmin); 492 for (i = 0; i < 10; ++i) { 493 unsigned long from = (i ? decile_max[i - 1] + 1 : 0); 494 if (from > decile_max[i]) 495 continue; 496 seq_printf(m, "Number of ebs with erase counts from %lu to %lu : %lu\n", 497 from, 498 decile_max[i], 499 deciles[i]); 500 } 501 502 return 0; 503} 504 505static int nandsim_debugfs_open(struct inode *inode, struct file *file) 506{ 507 return single_open(file, nandsim_debugfs_show, inode->i_private); 508} 509 510static const struct file_operations dfs_fops = { 511 .open = nandsim_debugfs_open, 512 .read = seq_read, 513 .llseek = seq_lseek, 514 .release = single_release, 515}; 516 517/** 518 * nandsim_debugfs_create - initialize debugfs 519 * @dev: nandsim device description object 520 * 521 * This function creates all debugfs files for UBI device @ubi. Returns zero in 522 * case of success and a negative error code in case of failure. 523 */ 524static int nandsim_debugfs_create(struct nandsim *dev) 525{ 526 struct nandsim_debug_info *dbg = &dev->dbg; 527 struct dentry *dent; 528 int err; 529 530 if (!IS_ENABLED(CONFIG_DEBUG_FS)) 531 return 0; 532 533 dent = debugfs_create_dir("nandsim", NULL); 534 if (IS_ERR_OR_NULL(dent)) { 535 int err = dent ? -ENODEV : PTR_ERR(dent); 536 537 NS_ERR("cannot create \"nandsim\" debugfs directory, err %d\n", 538 err); 539 return err; 540 } 541 dbg->dfs_root = dent; 542 543 dent = debugfs_create_file("wear_report", S_IRUSR, 544 dbg->dfs_root, dev, &dfs_fops); 545 if (IS_ERR_OR_NULL(dent)) 546 goto out_remove; 547 dbg->dfs_wear_report = dent; 548 549 return 0; 550 551out_remove: 552 debugfs_remove_recursive(dbg->dfs_root); 553 err = dent ? PTR_ERR(dent) : -ENODEV; 554 return err; 555} 556 557/** 558 * nandsim_debugfs_remove - destroy all debugfs files 559 */ 560static void nandsim_debugfs_remove(struct nandsim *ns) 561{ 562 if (IS_ENABLED(CONFIG_DEBUG_FS)) 563 debugfs_remove_recursive(ns->dbg.dfs_root); 564} 565 566/* 567 * Allocate array of page pointers, create slab allocation for an array 568 * and initialize the array by NULL pointers. 569 * 570 * RETURNS: 0 if success, -ENOMEM if memory alloc fails. 571 */ 572static int alloc_device(struct nandsim *ns) 573{ 574 struct file *cfile; 575 int i, err; 576 577 if (cache_file) { 578 cfile = filp_open(cache_file, O_CREAT | O_RDWR | O_LARGEFILE, 0600); 579 if (IS_ERR(cfile)) 580 return PTR_ERR(cfile); 581 if (!(cfile->f_mode & FMODE_CAN_READ)) { 582 NS_ERR("alloc_device: cache file not readable\n"); 583 err = -EINVAL; 584 goto err_close; 585 } 586 if (!(cfile->f_mode & FMODE_CAN_WRITE)) { 587 NS_ERR("alloc_device: cache file not writeable\n"); 588 err = -EINVAL; 589 goto err_close; 590 } 591 ns->pages_written = vzalloc(BITS_TO_LONGS(ns->geom.pgnum) * 592 sizeof(unsigned long)); 593 if (!ns->pages_written) { 594 NS_ERR("alloc_device: unable to allocate pages written array\n"); 595 err = -ENOMEM; 596 goto err_close; 597 } 598 ns->file_buf = kmalloc(ns->geom.pgszoob, GFP_KERNEL); 599 if (!ns->file_buf) { 600 NS_ERR("alloc_device: unable to allocate file buf\n"); 601 err = -ENOMEM; 602 goto err_free; 603 } 604 ns->cfile = cfile; 605 return 0; 606 } 607 608 ns->pages = vmalloc(ns->geom.pgnum * sizeof(union ns_mem)); 609 if (!ns->pages) { 610 NS_ERR("alloc_device: unable to allocate page array\n"); 611 return -ENOMEM; 612 } 613 for (i = 0; i < ns->geom.pgnum; i++) { 614 ns->pages[i].byte = NULL; 615 } 616 ns->nand_pages_slab = kmem_cache_create("nandsim", 617 ns->geom.pgszoob, 0, 0, NULL); 618 if (!ns->nand_pages_slab) { 619 NS_ERR("cache_create: unable to create kmem_cache\n"); 620 return -ENOMEM; 621 } 622 623 return 0; 624 625err_free: 626 vfree(ns->pages_written); 627err_close: 628 filp_close(cfile, NULL); 629 return err; 630} 631 632/* 633 * Free any allocated pages, and free the array of page pointers. 634 */ 635static void free_device(struct nandsim *ns) 636{ 637 int i; 638 639 if (ns->cfile) { 640 kfree(ns->file_buf); 641 vfree(ns->pages_written); 642 filp_close(ns->cfile, NULL); 643 return; 644 } 645 646 if (ns->pages) { 647 for (i = 0; i < ns->geom.pgnum; i++) { 648 if (ns->pages[i].byte) 649 kmem_cache_free(ns->nand_pages_slab, 650 ns->pages[i].byte); 651 } 652 kmem_cache_destroy(ns->nand_pages_slab); 653 vfree(ns->pages); 654 } 655} 656 657static char *get_partition_name(int i) 658{ 659 return kasprintf(GFP_KERNEL, "NAND simulator partition %d", i); 660} 661 662/* 663 * Initialize the nandsim structure. 664 * 665 * RETURNS: 0 if success, -ERRNO if failure. 666 */ 667static int init_nandsim(struct mtd_info *mtd) 668{ 669 struct nand_chip *chip = mtd->priv; 670 struct nandsim *ns = chip->priv; 671 int i, ret = 0; 672 uint64_t remains; 673 uint64_t next_offset; 674 675 if (NS_IS_INITIALIZED(ns)) { 676 NS_ERR("init_nandsim: nandsim is already initialized\n"); 677 return -EIO; 678 } 679 680 /* Force mtd to not do delays */ 681 chip->chip_delay = 0; 682 683 /* Initialize the NAND flash parameters */ 684 ns->busw = chip->options & NAND_BUSWIDTH_16 ? 16 : 8; 685 ns->geom.totsz = mtd->size; 686 ns->geom.pgsz = mtd->writesize; 687 ns->geom.oobsz = mtd->oobsize; 688 ns->geom.secsz = mtd->erasesize; 689 ns->geom.pgszoob = ns->geom.pgsz + ns->geom.oobsz; 690 ns->geom.pgnum = div_u64(ns->geom.totsz, ns->geom.pgsz); 691 ns->geom.totszoob = ns->geom.totsz + (uint64_t)ns->geom.pgnum * ns->geom.oobsz; 692 ns->geom.secshift = ffs(ns->geom.secsz) - 1; 693 ns->geom.pgshift = chip->page_shift; 694 ns->geom.pgsec = ns->geom.secsz / ns->geom.pgsz; 695 ns->geom.secszoob = ns->geom.secsz + ns->geom.oobsz * ns->geom.pgsec; 696 ns->options = 0; 697 698 if (ns->geom.pgsz == 512) { 699 ns->options |= OPT_PAGE512; 700 if (ns->busw == 8) 701 ns->options |= OPT_PAGE512_8BIT; 702 } else if (ns->geom.pgsz == 2048) { 703 ns->options |= OPT_PAGE2048; 704 } else if (ns->geom.pgsz == 4096) { 705 ns->options |= OPT_PAGE4096; 706 } else { 707 NS_ERR("init_nandsim: unknown page size %u\n", ns->geom.pgsz); 708 return -EIO; 709 } 710 711 if (ns->options & OPT_SMALLPAGE) { 712 if (ns->geom.totsz <= (32 << 20)) { 713 ns->geom.pgaddrbytes = 3; 714 ns->geom.secaddrbytes = 2; 715 } else { 716 ns->geom.pgaddrbytes = 4; 717 ns->geom.secaddrbytes = 3; 718 } 719 } else { 720 if (ns->geom.totsz <= (128 << 20)) { 721 ns->geom.pgaddrbytes = 4; 722 ns->geom.secaddrbytes = 2; 723 } else { 724 ns->geom.pgaddrbytes = 5; 725 ns->geom.secaddrbytes = 3; 726 } 727 } 728 729 /* Fill the partition_info structure */ 730 if (parts_num > ARRAY_SIZE(ns->partitions)) { 731 NS_ERR("too many partitions.\n"); 732 ret = -EINVAL; 733 goto error; 734 } 735 remains = ns->geom.totsz; 736 next_offset = 0; 737 for (i = 0; i < parts_num; ++i) { 738 uint64_t part_sz = (uint64_t)parts[i] * ns->geom.secsz; 739 740 if (!part_sz || part_sz > remains) { 741 NS_ERR("bad partition size.\n"); 742 ret = -EINVAL; 743 goto error; 744 } 745 ns->partitions[i].name = get_partition_name(i); 746 ns->partitions[i].offset = next_offset; 747 ns->partitions[i].size = part_sz; 748 next_offset += ns->partitions[i].size; 749 remains -= ns->partitions[i].size; 750 } 751 ns->nbparts = parts_num; 752 if (remains) { 753 if (parts_num + 1 > ARRAY_SIZE(ns->partitions)) { 754 NS_ERR("too many partitions.\n"); 755 ret = -EINVAL; 756 goto error; 757 } 758 ns->partitions[i].name = get_partition_name(i); 759 ns->partitions[i].offset = next_offset; 760 ns->partitions[i].size = remains; 761 ns->nbparts += 1; 762 } 763 764 if (ns->busw == 16) 765 NS_WARN("16-bit flashes support wasn't tested\n"); 766 767 printk("flash size: %llu MiB\n", 768 (unsigned long long)ns->geom.totsz >> 20); 769 printk("page size: %u bytes\n", ns->geom.pgsz); 770 printk("OOB area size: %u bytes\n", ns->geom.oobsz); 771 printk("sector size: %u KiB\n", ns->geom.secsz >> 10); 772 printk("pages number: %u\n", ns->geom.pgnum); 773 printk("pages per sector: %u\n", ns->geom.pgsec); 774 printk("bus width: %u\n", ns->busw); 775 printk("bits in sector size: %u\n", ns->geom.secshift); 776 printk("bits in page size: %u\n", ns->geom.pgshift); 777 printk("bits in OOB size: %u\n", ffs(ns->geom.oobsz) - 1); 778 printk("flash size with OOB: %llu KiB\n", 779 (unsigned long long)ns->geom.totszoob >> 10); 780 printk("page address bytes: %u\n", ns->geom.pgaddrbytes); 781 printk("sector address bytes: %u\n", ns->geom.secaddrbytes); 782 printk("options: %#x\n", ns->options); 783 784 if ((ret = alloc_device(ns)) != 0) 785 goto error; 786 787 /* Allocate / initialize the internal buffer */ 788 ns->buf.byte = kmalloc(ns->geom.pgszoob, GFP_KERNEL); 789 if (!ns->buf.byte) { 790 NS_ERR("init_nandsim: unable to allocate %u bytes for the internal buffer\n", 791 ns->geom.pgszoob); 792 ret = -ENOMEM; 793 goto error; 794 } 795 memset(ns->buf.byte, 0xFF, ns->geom.pgszoob); 796 797 return 0; 798 799error: 800 free_device(ns); 801 802 return ret; 803} 804 805/* 806 * Free the nandsim structure. 807 */ 808static void free_nandsim(struct nandsim *ns) 809{ 810 kfree(ns->buf.byte); 811 free_device(ns); 812 813 return; 814} 815 816static int parse_badblocks(struct nandsim *ns, struct mtd_info *mtd) 817{ 818 char *w; 819 int zero_ok; 820 unsigned int erase_block_no; 821 loff_t offset; 822 823 if (!badblocks) 824 return 0; 825 w = badblocks; 826 do { 827 zero_ok = (*w == '0' ? 1 : 0); 828 erase_block_no = simple_strtoul(w, &w, 0); 829 if (!zero_ok && !erase_block_no) { 830 NS_ERR("invalid badblocks.\n"); 831 return -EINVAL; 832 } 833 offset = (loff_t)erase_block_no * ns->geom.secsz; 834 if (mtd_block_markbad(mtd, offset)) { 835 NS_ERR("invalid badblocks.\n"); 836 return -EINVAL; 837 } 838 if (*w == ',') 839 w += 1; 840 } while (*w); 841 return 0; 842} 843 844static int parse_weakblocks(void) 845{ 846 char *w; 847 int zero_ok; 848 unsigned int erase_block_no; 849 unsigned int max_erases; 850 struct weak_block *wb; 851 852 if (!weakblocks) 853 return 0; 854 w = weakblocks; 855 do { 856 zero_ok = (*w == '0' ? 1 : 0); 857 erase_block_no = simple_strtoul(w, &w, 0); 858 if (!zero_ok && !erase_block_no) { 859 NS_ERR("invalid weakblocks.\n"); 860 return -EINVAL; 861 } 862 max_erases = 3; 863 if (*w == ':') { 864 w += 1; 865 max_erases = simple_strtoul(w, &w, 0); 866 } 867 if (*w == ',') 868 w += 1; 869 wb = kzalloc(sizeof(*wb), GFP_KERNEL); 870 if (!wb) { 871 NS_ERR("unable to allocate memory.\n"); 872 return -ENOMEM; 873 } 874 wb->erase_block_no = erase_block_no; 875 wb->max_erases = max_erases; 876 list_add(&wb->list, &weak_blocks); 877 } while (*w); 878 return 0; 879} 880 881static int erase_error(unsigned int erase_block_no) 882{ 883 struct weak_block *wb; 884 885 list_for_each_entry(wb, &weak_blocks, list) 886 if (wb->erase_block_no == erase_block_no) { 887 if (wb->erases_done >= wb->max_erases) 888 return 1; 889 wb->erases_done += 1; 890 return 0; 891 } 892 return 0; 893} 894 895static int parse_weakpages(void) 896{ 897 char *w; 898 int zero_ok; 899 unsigned int page_no; 900 unsigned int max_writes; 901 struct weak_page *wp; 902 903 if (!weakpages) 904 return 0; 905 w = weakpages; 906 do { 907 zero_ok = (*w == '0' ? 1 : 0); 908 page_no = simple_strtoul(w, &w, 0); 909 if (!zero_ok && !page_no) { 910 NS_ERR("invalid weakpagess.\n"); 911 return -EINVAL; 912 } 913 max_writes = 3; 914 if (*w == ':') { 915 w += 1; 916 max_writes = simple_strtoul(w, &w, 0); 917 } 918 if (*w == ',') 919 w += 1; 920 wp = kzalloc(sizeof(*wp), GFP_KERNEL); 921 if (!wp) { 922 NS_ERR("unable to allocate memory.\n"); 923 return -ENOMEM; 924 } 925 wp->page_no = page_no; 926 wp->max_writes = max_writes; 927 list_add(&wp->list, &weak_pages); 928 } while (*w); 929 return 0; 930} 931 932static int write_error(unsigned int page_no) 933{ 934 struct weak_page *wp; 935 936 list_for_each_entry(wp, &weak_pages, list) 937 if (wp->page_no == page_no) { 938 if (wp->writes_done >= wp->max_writes) 939 return 1; 940 wp->writes_done += 1; 941 return 0; 942 } 943 return 0; 944} 945 946static int parse_gravepages(void) 947{ 948 char *g; 949 int zero_ok; 950 unsigned int page_no; 951 unsigned int max_reads; 952 struct grave_page *gp; 953 954 if (!gravepages) 955 return 0; 956 g = gravepages; 957 do { 958 zero_ok = (*g == '0' ? 1 : 0); 959 page_no = simple_strtoul(g, &g, 0); 960 if (!zero_ok && !page_no) { 961 NS_ERR("invalid gravepagess.\n"); 962 return -EINVAL; 963 } 964 max_reads = 3; 965 if (*g == ':') { 966 g += 1; 967 max_reads = simple_strtoul(g, &g, 0); 968 } 969 if (*g == ',') 970 g += 1; 971 gp = kzalloc(sizeof(*gp), GFP_KERNEL); 972 if (!gp) { 973 NS_ERR("unable to allocate memory.\n"); 974 return -ENOMEM; 975 } 976 gp->page_no = page_no; 977 gp->max_reads = max_reads; 978 list_add(&gp->list, &grave_pages); 979 } while (*g); 980 return 0; 981} 982 983static int read_error(unsigned int page_no) 984{ 985 struct grave_page *gp; 986 987 list_for_each_entry(gp, &grave_pages, list) 988 if (gp->page_no == page_no) { 989 if (gp->reads_done >= gp->max_reads) 990 return 1; 991 gp->reads_done += 1; 992 return 0; 993 } 994 return 0; 995} 996 997static void free_lists(void) 998{ 999 struct list_head *pos, *n; 1000 list_for_each_safe(pos, n, &weak_blocks) { 1001 list_del(pos); 1002 kfree(list_entry(pos, struct weak_block, list)); 1003 } 1004 list_for_each_safe(pos, n, &weak_pages) { 1005 list_del(pos); 1006 kfree(list_entry(pos, struct weak_page, list)); 1007 } 1008 list_for_each_safe(pos, n, &grave_pages) { 1009 list_del(pos); 1010 kfree(list_entry(pos, struct grave_page, list)); 1011 } 1012 kfree(erase_block_wear); 1013} 1014 1015static int setup_wear_reporting(struct mtd_info *mtd) 1016{ 1017 size_t mem; 1018 1019 wear_eb_count = div_u64(mtd->size, mtd->erasesize); 1020 mem = wear_eb_count * sizeof(unsigned long); 1021 if (mem / sizeof(unsigned long) != wear_eb_count) { 1022 NS_ERR("Too many erase blocks for wear reporting\n"); 1023 return -ENOMEM; 1024 } 1025 erase_block_wear = kzalloc(mem, GFP_KERNEL); 1026 if (!erase_block_wear) { 1027 NS_ERR("Too many erase blocks for wear reporting\n"); 1028 return -ENOMEM; 1029 } 1030 return 0; 1031} 1032 1033static void update_wear(unsigned int erase_block_no) 1034{ 1035 if (!erase_block_wear) 1036 return; 1037 total_wear += 1; 1038 /* 1039 * TODO: Notify this through a debugfs entry, 1040 * instead of showing an error message. 1041 */ 1042 if (total_wear == 0) 1043 NS_ERR("Erase counter total overflow\n"); 1044 erase_block_wear[erase_block_no] += 1; 1045 if (erase_block_wear[erase_block_no] == 0) 1046 NS_ERR("Erase counter overflow for erase block %u\n", erase_block_no); 1047} 1048 1049/* 1050 * Returns the string representation of 'state' state. 1051 */ 1052static char *get_state_name(uint32_t state) 1053{ 1054 switch (NS_STATE(state)) { 1055 case STATE_CMD_READ0: 1056 return "STATE_CMD_READ0"; 1057 case STATE_CMD_READ1: 1058 return "STATE_CMD_READ1"; 1059 case STATE_CMD_PAGEPROG: 1060 return "STATE_CMD_PAGEPROG"; 1061 case STATE_CMD_READOOB: 1062 return "STATE_CMD_READOOB"; 1063 case STATE_CMD_READSTART: 1064 return "STATE_CMD_READSTART"; 1065 case STATE_CMD_ERASE1: 1066 return "STATE_CMD_ERASE1"; 1067 case STATE_CMD_STATUS: 1068 return "STATE_CMD_STATUS"; 1069 case STATE_CMD_SEQIN: 1070 return "STATE_CMD_SEQIN"; 1071 case STATE_CMD_READID: 1072 return "STATE_CMD_READID"; 1073 case STATE_CMD_ERASE2: 1074 return "STATE_CMD_ERASE2"; 1075 case STATE_CMD_RESET: 1076 return "STATE_CMD_RESET"; 1077 case STATE_CMD_RNDOUT: 1078 return "STATE_CMD_RNDOUT"; 1079 case STATE_CMD_RNDOUTSTART: 1080 return "STATE_CMD_RNDOUTSTART"; 1081 case STATE_ADDR_PAGE: 1082 return "STATE_ADDR_PAGE"; 1083 case STATE_ADDR_SEC: 1084 return "STATE_ADDR_SEC"; 1085 case STATE_ADDR_ZERO: 1086 return "STATE_ADDR_ZERO"; 1087 case STATE_ADDR_COLUMN: 1088 return "STATE_ADDR_COLUMN"; 1089 case STATE_DATAIN: 1090 return "STATE_DATAIN"; 1091 case STATE_DATAOUT: 1092 return "STATE_DATAOUT"; 1093 case STATE_DATAOUT_ID: 1094 return "STATE_DATAOUT_ID"; 1095 case STATE_DATAOUT_STATUS: 1096 return "STATE_DATAOUT_STATUS"; 1097 case STATE_READY: 1098 return "STATE_READY"; 1099 case STATE_UNKNOWN: 1100 return "STATE_UNKNOWN"; 1101 } 1102 1103 NS_ERR("get_state_name: unknown state, BUG\n"); 1104 return NULL; 1105} 1106 1107/* 1108 * Check if command is valid. 1109 * 1110 * RETURNS: 1 if wrong command, 0 if right. 1111 */ 1112static int check_command(int cmd) 1113{ 1114 switch (cmd) { 1115 1116 case NAND_CMD_READ0: 1117 case NAND_CMD_READ1: 1118 case NAND_CMD_READSTART: 1119 case NAND_CMD_PAGEPROG: 1120 case NAND_CMD_READOOB: 1121 case NAND_CMD_ERASE1: 1122 case NAND_CMD_STATUS: 1123 case NAND_CMD_SEQIN: 1124 case NAND_CMD_READID: 1125 case NAND_CMD_ERASE2: 1126 case NAND_CMD_RESET: 1127 case NAND_CMD_RNDOUT: 1128 case NAND_CMD_RNDOUTSTART: 1129 return 0; 1130 1131 default: 1132 return 1; 1133 } 1134} 1135 1136/* 1137 * Returns state after command is accepted by command number. 1138 */ 1139static uint32_t get_state_by_command(unsigned command) 1140{ 1141 switch (command) { 1142 case NAND_CMD_READ0: 1143 return STATE_CMD_READ0; 1144 case NAND_CMD_READ1: 1145 return STATE_CMD_READ1; 1146 case NAND_CMD_PAGEPROG: 1147 return STATE_CMD_PAGEPROG; 1148 case NAND_CMD_READSTART: 1149 return STATE_CMD_READSTART; 1150 case NAND_CMD_READOOB: 1151 return STATE_CMD_READOOB; 1152 case NAND_CMD_ERASE1: 1153 return STATE_CMD_ERASE1; 1154 case NAND_CMD_STATUS: 1155 return STATE_CMD_STATUS; 1156 case NAND_CMD_SEQIN: 1157 return STATE_CMD_SEQIN; 1158 case NAND_CMD_READID: 1159 return STATE_CMD_READID; 1160 case NAND_CMD_ERASE2: 1161 return STATE_CMD_ERASE2; 1162 case NAND_CMD_RESET: 1163 return STATE_CMD_RESET; 1164 case NAND_CMD_RNDOUT: 1165 return STATE_CMD_RNDOUT; 1166 case NAND_CMD_RNDOUTSTART: 1167 return STATE_CMD_RNDOUTSTART; 1168 } 1169 1170 NS_ERR("get_state_by_command: unknown command, BUG\n"); 1171 return 0; 1172} 1173 1174/* 1175 * Move an address byte to the correspondent internal register. 1176 */ 1177static inline void accept_addr_byte(struct nandsim *ns, u_char bt) 1178{ 1179 uint byte = (uint)bt; 1180 1181 if (ns->regs.count < (ns->geom.pgaddrbytes - ns->geom.secaddrbytes)) 1182 ns->regs.column |= (byte << 8 * ns->regs.count); 1183 else { 1184 ns->regs.row |= (byte << 8 * (ns->regs.count - 1185 ns->geom.pgaddrbytes + 1186 ns->geom.secaddrbytes)); 1187 } 1188 1189 return; 1190} 1191 1192/* 1193 * Switch to STATE_READY state. 1194 */ 1195static inline void switch_to_ready_state(struct nandsim *ns, u_char status) 1196{ 1197 NS_DBG("switch_to_ready_state: switch to %s state\n", get_state_name(STATE_READY)); 1198 1199 ns->state = STATE_READY; 1200 ns->nxstate = STATE_UNKNOWN; 1201 ns->op = NULL; 1202 ns->npstates = 0; 1203 ns->stateidx = 0; 1204 ns->regs.num = 0; 1205 ns->regs.count = 0; 1206 ns->regs.off = 0; 1207 ns->regs.row = 0; 1208 ns->regs.column = 0; 1209 ns->regs.status = status; 1210} 1211 1212/* 1213 * If the operation isn't known yet, try to find it in the global array 1214 * of supported operations. 1215 * 1216 * Operation can be unknown because of the following. 1217 * 1. New command was accepted and this is the first call to find the 1218 * correspondent states chain. In this case ns->npstates = 0; 1219 * 2. There are several operations which begin with the same command(s) 1220 * (for example program from the second half and read from the 1221 * second half operations both begin with the READ1 command). In this 1222 * case the ns->pstates[] array contains previous states. 1223 * 1224 * Thus, the function tries to find operation containing the following 1225 * states (if the 'flag' parameter is 0): 1226 * ns->pstates[0], ... ns->pstates[ns->npstates], ns->state 1227 * 1228 * If (one and only one) matching operation is found, it is accepted ( 1229 * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is 1230 * zeroed). 1231 * 1232 * If there are several matches, the current state is pushed to the 1233 * ns->pstates. 1234 * 1235 * The operation can be unknown only while commands are input to the chip. 1236 * As soon as address command is accepted, the operation must be known. 1237 * In such situation the function is called with 'flag' != 0, and the 1238 * operation is searched using the following pattern: 1239 * ns->pstates[0], ... ns->pstates[ns->npstates], <address input> 1240 * 1241 * It is supposed that this pattern must either match one operation or 1242 * none. There can't be ambiguity in that case. 1243 * 1244 * If no matches found, the function does the following: 1245 * 1. if there are saved states present, try to ignore them and search 1246 * again only using the last command. If nothing was found, switch 1247 * to the STATE_READY state. 1248 * 2. if there are no saved states, switch to the STATE_READY state. 1249 * 1250 * RETURNS: -2 - no matched operations found. 1251 * -1 - several matches. 1252 * 0 - operation is found. 1253 */ 1254static int find_operation(struct nandsim *ns, uint32_t flag) 1255{ 1256 int opsfound = 0; 1257 int i, j, idx = 0; 1258 1259 for (i = 0; i < NS_OPER_NUM; i++) { 1260 1261 int found = 1; 1262 1263 if (!(ns->options & ops[i].reqopts)) 1264 /* Ignore operations we can't perform */ 1265 continue; 1266 1267 if (flag) { 1268 if (!(ops[i].states[ns->npstates] & STATE_ADDR_MASK)) 1269 continue; 1270 } else { 1271 if (NS_STATE(ns->state) != NS_STATE(ops[i].states[ns->npstates])) 1272 continue; 1273 } 1274 1275 for (j = 0; j < ns->npstates; j++) 1276 if (NS_STATE(ops[i].states[j]) != NS_STATE(ns->pstates[j]) 1277 && (ns->options & ops[idx].reqopts)) { 1278 found = 0; 1279 break; 1280 } 1281 1282 if (found) { 1283 idx = i; 1284 opsfound += 1; 1285 } 1286 } 1287 1288 if (opsfound == 1) { 1289 /* Exact match */ 1290 ns->op = &ops[idx].states[0]; 1291 if (flag) { 1292 /* 1293 * In this case the find_operation function was 1294 * called when address has just began input. But it isn't 1295 * yet fully input and the current state must 1296 * not be one of STATE_ADDR_*, but the STATE_ADDR_* 1297 * state must be the next state (ns->nxstate). 1298 */ 1299 ns->stateidx = ns->npstates - 1; 1300 } else { 1301 ns->stateidx = ns->npstates; 1302 } 1303 ns->npstates = 0; 1304 ns->state = ns->op[ns->stateidx]; 1305 ns->nxstate = ns->op[ns->stateidx + 1]; 1306 NS_DBG("find_operation: operation found, index: %d, state: %s, nxstate %s\n", 1307 idx, get_state_name(ns->state), get_state_name(ns->nxstate)); 1308 return 0; 1309 } 1310 1311 if (opsfound == 0) { 1312 /* Nothing was found. Try to ignore previous commands (if any) and search again */ 1313 if (ns->npstates != 0) { 1314 NS_DBG("find_operation: no operation found, try again with state %s\n", 1315 get_state_name(ns->state)); 1316 ns->npstates = 0; 1317 return find_operation(ns, 0); 1318 1319 } 1320 NS_DBG("find_operation: no operations found\n"); 1321 switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); 1322 return -2; 1323 } 1324 1325 if (flag) { 1326 /* This shouldn't happen */ 1327 NS_DBG("find_operation: BUG, operation must be known if address is input\n"); 1328 return -2; 1329 } 1330 1331 NS_DBG("find_operation: there is still ambiguity\n"); 1332 1333 ns->pstates[ns->npstates++] = ns->state; 1334 1335 return -1; 1336} 1337 1338static void put_pages(struct nandsim *ns) 1339{ 1340 int i; 1341 1342 for (i = 0; i < ns->held_cnt; i++) 1343 page_cache_release(ns->held_pages[i]); 1344} 1345 1346/* Get page cache pages in advance to provide NOFS memory allocation */ 1347static int get_pages(struct nandsim *ns, struct file *file, size_t count, loff_t pos) 1348{ 1349 pgoff_t index, start_index, end_index; 1350 struct page *page; 1351 struct address_space *mapping = file->f_mapping; 1352 1353 start_index = pos >> PAGE_CACHE_SHIFT; 1354 end_index = (pos + count - 1) >> PAGE_CACHE_SHIFT; 1355 if (end_index - start_index + 1 > NS_MAX_HELD_PAGES) 1356 return -EINVAL; 1357 ns->held_cnt = 0; 1358 for (index = start_index; index <= end_index; index++) { 1359 page = find_get_page(mapping, index); 1360 if (page == NULL) { 1361 page = find_or_create_page(mapping, index, GFP_NOFS); 1362 if (page == NULL) { 1363 write_inode_now(mapping->host, 1); 1364 page = find_or_create_page(mapping, index, GFP_NOFS); 1365 } 1366 if (page == NULL) { 1367 put_pages(ns); 1368 return -ENOMEM; 1369 } 1370 unlock_page(page); 1371 } 1372 ns->held_pages[ns->held_cnt++] = page; 1373 } 1374 return 0; 1375} 1376 1377static int set_memalloc(void) 1378{ 1379 if (current->flags & PF_MEMALLOC) 1380 return 0; 1381 current->flags |= PF_MEMALLOC; 1382 return 1; 1383} 1384 1385static void clear_memalloc(int memalloc) 1386{ 1387 if (memalloc) 1388 current->flags &= ~PF_MEMALLOC; 1389} 1390 1391static ssize_t read_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t pos) 1392{ 1393 ssize_t tx; 1394 int err, memalloc; 1395 1396 err = get_pages(ns, file, count, pos); 1397 if (err) 1398 return err; 1399 memalloc = set_memalloc(); 1400 tx = kernel_read(file, pos, buf, count); 1401 clear_memalloc(memalloc); 1402 put_pages(ns); 1403 return tx; 1404} 1405 1406static ssize_t write_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t pos) 1407{ 1408 ssize_t tx; 1409 int err, memalloc; 1410 1411 err = get_pages(ns, file, count, pos); 1412 if (err) 1413 return err; 1414 memalloc = set_memalloc(); 1415 tx = kernel_write(file, buf, count, pos); 1416 clear_memalloc(memalloc); 1417 put_pages(ns); 1418 return tx; 1419} 1420 1421/* 1422 * Returns a pointer to the current page. 1423 */ 1424static inline union ns_mem *NS_GET_PAGE(struct nandsim *ns) 1425{ 1426 return &(ns->pages[ns->regs.row]); 1427} 1428 1429/* 1430 * Retuns a pointer to the current byte, within the current page. 1431 */ 1432static inline u_char *NS_PAGE_BYTE_OFF(struct nandsim *ns) 1433{ 1434 return NS_GET_PAGE(ns)->byte + ns->regs.column + ns->regs.off; 1435} 1436 1437static int do_read_error(struct nandsim *ns, int num) 1438{ 1439 unsigned int page_no = ns->regs.row; 1440 1441 if (read_error(page_no)) { 1442 prandom_bytes(ns->buf.byte, num); 1443 NS_WARN("simulating read error in page %u\n", page_no); 1444 return 1; 1445 } 1446 return 0; 1447} 1448 1449static void do_bit_flips(struct nandsim *ns, int num) 1450{ 1451 if (bitflips && prandom_u32() < (1 << 22)) { 1452 int flips = 1; 1453 if (bitflips > 1) 1454 flips = (prandom_u32() % (int) bitflips) + 1; 1455 while (flips--) { 1456 int pos = prandom_u32() % (num * 8); 1457 ns->buf.byte[pos / 8] ^= (1 << (pos % 8)); 1458 NS_WARN("read_page: flipping bit %d in page %d " 1459 "reading from %d ecc: corrected=%u failed=%u\n", 1460 pos, ns->regs.row, ns->regs.column + ns->regs.off, 1461 nsmtd->ecc_stats.corrected, nsmtd->ecc_stats.failed); 1462 } 1463 } 1464} 1465 1466/* 1467 * Fill the NAND buffer with data read from the specified page. 1468 */ 1469static void read_page(struct nandsim *ns, int num) 1470{ 1471 union ns_mem *mypage; 1472 1473 if (ns->cfile) { 1474 if (!test_bit(ns->regs.row, ns->pages_written)) { 1475 NS_DBG("read_page: page %d not written\n", ns->regs.row); 1476 memset(ns->buf.byte, 0xFF, num); 1477 } else { 1478 loff_t pos; 1479 ssize_t tx; 1480 1481 NS_DBG("read_page: page %d written, reading from %d\n", 1482 ns->regs.row, ns->regs.column + ns->regs.off); 1483 if (do_read_error(ns, num)) 1484 return; 1485 pos = (loff_t)NS_RAW_OFFSET(ns) + ns->regs.off; 1486 tx = read_file(ns, ns->cfile, ns->buf.byte, num, pos); 1487 if (tx != num) { 1488 NS_ERR("read_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx); 1489 return; 1490 } 1491 do_bit_flips(ns, num); 1492 } 1493 return; 1494 } 1495 1496 mypage = NS_GET_PAGE(ns); 1497 if (mypage->byte == NULL) { 1498 NS_DBG("read_page: page %d not allocated\n", ns->regs.row); 1499 memset(ns->buf.byte, 0xFF, num); 1500 } else { 1501 NS_DBG("read_page: page %d allocated, reading from %d\n", 1502 ns->regs.row, ns->regs.column + ns->regs.off); 1503 if (do_read_error(ns, num)) 1504 return; 1505 memcpy(ns->buf.byte, NS_PAGE_BYTE_OFF(ns), num); 1506 do_bit_flips(ns, num); 1507 } 1508} 1509 1510/* 1511 * Erase all pages in the specified sector. 1512 */ 1513static void erase_sector(struct nandsim *ns) 1514{ 1515 union ns_mem *mypage; 1516 int i; 1517 1518 if (ns->cfile) { 1519 for (i = 0; i < ns->geom.pgsec; i++) 1520 if (__test_and_clear_bit(ns->regs.row + i, 1521 ns->pages_written)) { 1522 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row + i); 1523 } 1524 return; 1525 } 1526 1527 mypage = NS_GET_PAGE(ns); 1528 for (i = 0; i < ns->geom.pgsec; i++) { 1529 if (mypage->byte != NULL) { 1530 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row+i); 1531 kmem_cache_free(ns->nand_pages_slab, mypage->byte); 1532 mypage->byte = NULL; 1533 } 1534 mypage++; 1535 } 1536} 1537 1538/* 1539 * Program the specified page with the contents from the NAND buffer. 1540 */ 1541static int prog_page(struct nandsim *ns, int num) 1542{ 1543 int i; 1544 union ns_mem *mypage; 1545 u_char *pg_off; 1546 1547 if (ns->cfile) { 1548 loff_t off; 1549 ssize_t tx; 1550 int all; 1551 1552 NS_DBG("prog_page: writing page %d\n", ns->regs.row); 1553 pg_off = ns->file_buf + ns->regs.column + ns->regs.off; 1554 off = (loff_t)NS_RAW_OFFSET(ns) + ns->regs.off; 1555 if (!test_bit(ns->regs.row, ns->pages_written)) { 1556 all = 1; 1557 memset(ns->file_buf, 0xff, ns->geom.pgszoob); 1558 } else { 1559 all = 0; 1560 tx = read_file(ns, ns->cfile, pg_off, num, off); 1561 if (tx != num) { 1562 NS_ERR("prog_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx); 1563 return -1; 1564 } 1565 } 1566 for (i = 0; i < num; i++) 1567 pg_off[i] &= ns->buf.byte[i]; 1568 if (all) { 1569 loff_t pos = (loff_t)ns->regs.row * ns->geom.pgszoob; 1570 tx = write_file(ns, ns->cfile, ns->file_buf, ns->geom.pgszoob, pos); 1571 if (tx != ns->geom.pgszoob) { 1572 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx); 1573 return -1; 1574 } 1575 __set_bit(ns->regs.row, ns->pages_written); 1576 } else { 1577 tx = write_file(ns, ns->cfile, pg_off, num, off); 1578 if (tx != num) { 1579 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx); 1580 return -1; 1581 } 1582 } 1583 return 0; 1584 } 1585 1586 mypage = NS_GET_PAGE(ns); 1587 if (mypage->byte == NULL) { 1588 NS_DBG("prog_page: allocating page %d\n", ns->regs.row); 1589 /* 1590 * We allocate memory with GFP_NOFS because a flash FS may 1591 * utilize this. If it is holding an FS lock, then gets here, 1592 * then kernel memory alloc runs writeback which goes to the FS 1593 * again and deadlocks. This was seen in practice. 1594 */ 1595 mypage->byte = kmem_cache_alloc(ns->nand_pages_slab, GFP_NOFS); 1596 if (mypage->byte == NULL) { 1597 NS_ERR("prog_page: error allocating memory for page %d\n", ns->regs.row); 1598 return -1; 1599 } 1600 memset(mypage->byte, 0xFF, ns->geom.pgszoob); 1601 } 1602 1603 pg_off = NS_PAGE_BYTE_OFF(ns); 1604 for (i = 0; i < num; i++) 1605 pg_off[i] &= ns->buf.byte[i]; 1606 1607 return 0; 1608} 1609 1610/* 1611 * If state has any action bit, perform this action. 1612 * 1613 * RETURNS: 0 if success, -1 if error. 1614 */ 1615static int do_state_action(struct nandsim *ns, uint32_t action) 1616{ 1617 int num; 1618 int busdiv = ns->busw == 8 ? 1 : 2; 1619 unsigned int erase_block_no, page_no; 1620 1621 action &= ACTION_MASK; 1622 1623 /* Check that page address input is correct */ 1624 if (action != ACTION_SECERASE && ns->regs.row >= ns->geom.pgnum) { 1625 NS_WARN("do_state_action: wrong page number (%#x)\n", ns->regs.row); 1626 return -1; 1627 } 1628 1629 switch (action) { 1630 1631 case ACTION_CPY: 1632 /* 1633 * Copy page data to the internal buffer. 1634 */ 1635 1636 /* Column shouldn't be very large */ 1637 if (ns->regs.column >= (ns->geom.pgszoob - ns->regs.off)) { 1638 NS_ERR("do_state_action: column number is too large\n"); 1639 break; 1640 } 1641 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column; 1642 read_page(ns, num); 1643 1644 NS_DBG("do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d\n", 1645 num, NS_RAW_OFFSET(ns) + ns->regs.off); 1646 1647 if (ns->regs.off == 0) 1648 NS_LOG("read page %d\n", ns->regs.row); 1649 else if (ns->regs.off < ns->geom.pgsz) 1650 NS_LOG("read page %d (second half)\n", ns->regs.row); 1651 else 1652 NS_LOG("read OOB of page %d\n", ns->regs.row); 1653 1654 NS_UDELAY(access_delay); 1655 NS_UDELAY(input_cycle * ns->geom.pgsz / 1000 / busdiv); 1656 1657 break; 1658 1659 case ACTION_SECERASE: 1660 /* 1661 * Erase sector. 1662 */ 1663 1664 if (ns->lines.wp) { 1665 NS_ERR("do_state_action: device is write-protected, ignore sector erase\n"); 1666 return -1; 1667 } 1668 1669 if (ns->regs.row >= ns->geom.pgnum - ns->geom.pgsec 1670 || (ns->regs.row & ~(ns->geom.secsz - 1))) { 1671 NS_ERR("do_state_action: wrong sector address (%#x)\n", ns->regs.row); 1672 return -1; 1673 } 1674 1675 ns->regs.row = (ns->regs.row << 1676 8 * (ns->geom.pgaddrbytes - ns->geom.secaddrbytes)) | ns->regs.column; 1677 ns->regs.column = 0; 1678 1679 erase_block_no = ns->regs.row >> (ns->geom.secshift - ns->geom.pgshift); 1680 1681 NS_DBG("do_state_action: erase sector at address %#x, off = %d\n", 1682 ns->regs.row, NS_RAW_OFFSET(ns)); 1683 NS_LOG("erase sector %u\n", erase_block_no); 1684 1685 erase_sector(ns); 1686 1687 NS_MDELAY(erase_delay); 1688 1689 if (erase_block_wear) 1690 update_wear(erase_block_no); 1691 1692 if (erase_error(erase_block_no)) { 1693 NS_WARN("simulating erase failure in erase block %u\n", erase_block_no); 1694 return -1; 1695 } 1696 1697 break; 1698 1699 case ACTION_PRGPAGE: 1700 /* 1701 * Program page - move internal buffer data to the page. 1702 */ 1703 1704 if (ns->lines.wp) { 1705 NS_WARN("do_state_action: device is write-protected, programm\n"); 1706 return -1; 1707 } 1708 1709 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column; 1710 if (num != ns->regs.count) { 1711 NS_ERR("do_state_action: too few bytes were input (%d instead of %d)\n", 1712 ns->regs.count, num); 1713 return -1; 1714 } 1715 1716 if (prog_page(ns, num) == -1) 1717 return -1; 1718 1719 page_no = ns->regs.row; 1720 1721 NS_DBG("do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d\n", 1722 num, ns->regs.row, ns->regs.column, NS_RAW_OFFSET(ns) + ns->regs.off); 1723 NS_LOG("programm page %d\n", ns->regs.row); 1724 1725 NS_UDELAY(programm_delay); 1726 NS_UDELAY(output_cycle * ns->geom.pgsz / 1000 / busdiv); 1727 1728 if (write_error(page_no)) { 1729 NS_WARN("simulating write failure in page %u\n", page_no); 1730 return -1; 1731 } 1732 1733 break; 1734 1735 case ACTION_ZEROOFF: 1736 NS_DBG("do_state_action: set internal offset to 0\n"); 1737 ns->regs.off = 0; 1738 break; 1739 1740 case ACTION_HALFOFF: 1741 if (!(ns->options & OPT_PAGE512_8BIT)) { 1742 NS_ERR("do_state_action: BUG! can't skip half of page for non-512" 1743 "byte page size 8x chips\n"); 1744 return -1; 1745 } 1746 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz/2); 1747 ns->regs.off = ns->geom.pgsz/2; 1748 break; 1749 1750 case ACTION_OOBOFF: 1751 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz); 1752 ns->regs.off = ns->geom.pgsz; 1753 break; 1754 1755 default: 1756 NS_DBG("do_state_action: BUG! unknown action\n"); 1757 } 1758 1759 return 0; 1760} 1761 1762/* 1763 * Switch simulator's state. 1764 */ 1765static void switch_state(struct nandsim *ns) 1766{ 1767 if (ns->op) { 1768 /* 1769 * The current operation have already been identified. 1770 * Just follow the states chain. 1771 */ 1772 1773 ns->stateidx += 1; 1774 ns->state = ns->nxstate; 1775 ns->nxstate = ns->op[ns->stateidx + 1]; 1776 1777 NS_DBG("switch_state: operation is known, switch to the next state, " 1778 "state: %s, nxstate: %s\n", 1779 get_state_name(ns->state), get_state_name(ns->nxstate)); 1780 1781 /* See, whether we need to do some action */ 1782 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) { 1783 switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); 1784 return; 1785 } 1786 1787 } else { 1788 /* 1789 * We don't yet know which operation we perform. 1790 * Try to identify it. 1791 */ 1792 1793 /* 1794 * The only event causing the switch_state function to 1795 * be called with yet unknown operation is new command. 1796 */ 1797 ns->state = get_state_by_command(ns->regs.command); 1798 1799 NS_DBG("switch_state: operation is unknown, try to find it\n"); 1800 1801 if (find_operation(ns, 0) != 0) 1802 return; 1803 1804 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) { 1805 switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); 1806 return; 1807 } 1808 } 1809 1810 /* For 16x devices column means the page offset in words */ 1811 if ((ns->nxstate & STATE_ADDR_MASK) && ns->busw == 16) { 1812 NS_DBG("switch_state: double the column number for 16x device\n"); 1813 ns->regs.column <<= 1; 1814 } 1815 1816 if (NS_STATE(ns->nxstate) == STATE_READY) { 1817 /* 1818 * The current state is the last. Return to STATE_READY 1819 */ 1820 1821 u_char status = NS_STATUS_OK(ns); 1822 1823 /* In case of data states, see if all bytes were input/output */ 1824 if ((ns->state & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK)) 1825 && ns->regs.count != ns->regs.num) { 1826 NS_WARN("switch_state: not all bytes were processed, %d left\n", 1827 ns->regs.num - ns->regs.count); 1828 status = NS_STATUS_FAILED(ns); 1829 } 1830 1831 NS_DBG("switch_state: operation complete, switch to STATE_READY state\n"); 1832 1833 switch_to_ready_state(ns, status); 1834 1835 return; 1836 } else if (ns->nxstate & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK)) { 1837 /* 1838 * If the next state is data input/output, switch to it now 1839 */ 1840 1841 ns->state = ns->nxstate; 1842 ns->nxstate = ns->op[++ns->stateidx + 1]; 1843 ns->regs.num = ns->regs.count = 0; 1844 1845 NS_DBG("switch_state: the next state is data I/O, switch, " 1846 "state: %s, nxstate: %s\n", 1847 get_state_name(ns->state), get_state_name(ns->nxstate)); 1848 1849 /* 1850 * Set the internal register to the count of bytes which 1851 * are expected to be input or output 1852 */ 1853 switch (NS_STATE(ns->state)) { 1854 case STATE_DATAIN: 1855 case STATE_DATAOUT: 1856 ns->regs.num = ns->geom.pgszoob - ns->regs.off - ns->regs.column; 1857 break; 1858 1859 case STATE_DATAOUT_ID: 1860 ns->regs.num = ns->geom.idbytes; 1861 break; 1862 1863 case STATE_DATAOUT_STATUS: 1864 ns->regs.count = ns->regs.num = 0; 1865 break; 1866 1867 default: 1868 NS_ERR("switch_state: BUG! unknown data state\n"); 1869 } 1870 1871 } else if (ns->nxstate & STATE_ADDR_MASK) { 1872 /* 1873 * If the next state is address input, set the internal 1874 * register to the number of expected address bytes 1875 */ 1876 1877 ns->regs.count = 0; 1878 1879 switch (NS_STATE(ns->nxstate)) { 1880 case STATE_ADDR_PAGE: 1881 ns->regs.num = ns->geom.pgaddrbytes; 1882 1883 break; 1884 case STATE_ADDR_SEC: 1885 ns->regs.num = ns->geom.secaddrbytes; 1886 break; 1887 1888 case STATE_ADDR_ZERO: 1889 ns->regs.num = 1; 1890 break; 1891 1892 case STATE_ADDR_COLUMN: 1893 /* Column address is always 2 bytes */ 1894 ns->regs.num = ns->geom.pgaddrbytes - ns->geom.secaddrbytes; 1895 break; 1896 1897 default: 1898 NS_ERR("switch_state: BUG! unknown address state\n"); 1899 } 1900 } else { 1901 /* 1902 * Just reset internal counters. 1903 */ 1904 1905 ns->regs.num = 0; 1906 ns->regs.count = 0; 1907 } 1908} 1909 1910static u_char ns_nand_read_byte(struct mtd_info *mtd) 1911{ 1912 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv; 1913 u_char outb = 0x00; 1914 1915 /* Sanity and correctness checks */ 1916 if (!ns->lines.ce) { 1917 NS_ERR("read_byte: chip is disabled, return %#x\n", (uint)outb); 1918 return outb; 1919 } 1920 if (ns->lines.ale || ns->lines.cle) { 1921 NS_ERR("read_byte: ALE or CLE pin is high, return %#x\n", (uint)outb); 1922 return outb; 1923 } 1924 if (!(ns->state & STATE_DATAOUT_MASK)) { 1925 NS_WARN("read_byte: unexpected data output cycle, state is %s " 1926 "return %#x\n", get_state_name(ns->state), (uint)outb); 1927 return outb; 1928 } 1929 1930 /* Status register may be read as many times as it is wanted */ 1931 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS) { 1932 NS_DBG("read_byte: return %#x status\n", ns->regs.status); 1933 return ns->regs.status; 1934 } 1935 1936 /* Check if there is any data in the internal buffer which may be read */ 1937 if (ns->regs.count == ns->regs.num) { 1938 NS_WARN("read_byte: no more data to output, return %#x\n", (uint)outb); 1939 return outb; 1940 } 1941 1942 switch (NS_STATE(ns->state)) { 1943 case STATE_DATAOUT: 1944 if (ns->busw == 8) { 1945 outb = ns->buf.byte[ns->regs.count]; 1946 ns->regs.count += 1; 1947 } else { 1948 outb = (u_char)cpu_to_le16(ns->buf.word[ns->regs.count >> 1]); 1949 ns->regs.count += 2; 1950 } 1951 break; 1952 case STATE_DATAOUT_ID: 1953 NS_DBG("read_byte: read ID byte %d, total = %d\n", ns->regs.count, ns->regs.num); 1954 outb = ns->ids[ns->regs.count]; 1955 ns->regs.count += 1; 1956 break; 1957 default: 1958 BUG(); 1959 } 1960 1961 if (ns->regs.count == ns->regs.num) { 1962 NS_DBG("read_byte: all bytes were read\n"); 1963 1964 if (NS_STATE(ns->nxstate) == STATE_READY) 1965 switch_state(ns); 1966 } 1967 1968 return outb; 1969} 1970 1971static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte) 1972{ 1973 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv; 1974 1975 /* Sanity and correctness checks */ 1976 if (!ns->lines.ce) { 1977 NS_ERR("write_byte: chip is disabled, ignore write\n"); 1978 return; 1979 } 1980 if (ns->lines.ale && ns->lines.cle) { 1981 NS_ERR("write_byte: ALE and CLE pins are high simultaneously, ignore write\n"); 1982 return; 1983 } 1984 1985 if (ns->lines.cle == 1) { 1986 /* 1987 * The byte written is a command. 1988 */ 1989 1990 if (byte == NAND_CMD_RESET) { 1991 NS_LOG("reset chip\n"); 1992 switch_to_ready_state(ns, NS_STATUS_OK(ns)); 1993 return; 1994 } 1995 1996 /* Check that the command byte is correct */ 1997 if (check_command(byte)) { 1998 NS_ERR("write_byte: unknown command %#x\n", (uint)byte); 1999 return; 2000 } 2001 2002 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS 2003 || NS_STATE(ns->state) == STATE_DATAOUT) { 2004 int row = ns->regs.row; 2005 2006 switch_state(ns); 2007 if (byte == NAND_CMD_RNDOUT) 2008 ns->regs.row = row; 2009 } 2010 2011 /* Check if chip is expecting command */ 2012 if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) { 2013 /* Do not warn if only 2 id bytes are read */ 2014 if (!(ns->regs.command == NAND_CMD_READID && 2015 NS_STATE(ns->state) == STATE_DATAOUT_ID && ns->regs.count == 2)) { 2016 /* 2017 * We are in situation when something else (not command) 2018 * was expected but command was input. In this case ignore 2019 * previous command(s)/state(s) and accept the last one. 2020 */ 2021 NS_WARN("write_byte: command (%#x) wasn't expected, expected state is %s, " 2022 "ignore previous states\n", (uint)byte, get_state_name(ns->nxstate)); 2023 } 2024 switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); 2025 } 2026 2027 NS_DBG("command byte corresponding to %s state accepted\n", 2028 get_state_name(get_state_by_command(byte))); 2029 ns->regs.command = byte; 2030 switch_state(ns); 2031 2032 } else if (ns->lines.ale == 1) { 2033 /* 2034 * The byte written is an address. 2035 */ 2036 2037 if (NS_STATE(ns->nxstate) == STATE_UNKNOWN) { 2038 2039 NS_DBG("write_byte: operation isn't known yet, identify it\n"); 2040 2041 if (find_operation(ns, 1) < 0) 2042 return; 2043 2044 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) { 2045 switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); 2046 return; 2047 } 2048 2049 ns->regs.count = 0; 2050 switch (NS_STATE(ns->nxstate)) { 2051 case STATE_ADDR_PAGE: 2052 ns->regs.num = ns->geom.pgaddrbytes; 2053 break; 2054 case STATE_ADDR_SEC: 2055 ns->regs.num = ns->geom.secaddrbytes; 2056 break; 2057 case STATE_ADDR_ZERO: 2058 ns->regs.num = 1; 2059 break; 2060 default: 2061 BUG(); 2062 } 2063 } 2064 2065 /* Check that chip is expecting address */ 2066 if (!(ns->nxstate & STATE_ADDR_MASK)) { 2067 NS_ERR("write_byte: address (%#x) isn't expected, expected state is %s, " 2068 "switch to STATE_READY\n", (uint)byte, get_state_name(ns->nxstate)); 2069 switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); 2070 return; 2071 } 2072 2073 /* Check if this is expected byte */ 2074 if (ns->regs.count == ns->regs.num) { 2075 NS_ERR("write_byte: no more address bytes expected\n"); 2076 switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); 2077 return; 2078 } 2079 2080 accept_addr_byte(ns, byte); 2081 2082 ns->regs.count += 1; 2083 2084 NS_DBG("write_byte: address byte %#x was accepted (%d bytes input, %d expected)\n", 2085 (uint)byte, ns->regs.count, ns->regs.num); 2086 2087 if (ns->regs.count == ns->regs.num) { 2088 NS_DBG("address (%#x, %#x) is accepted\n", ns->regs.row, ns->regs.column); 2089 switch_state(ns); 2090 } 2091 2092 } else { 2093 /* 2094 * The byte written is an input data. 2095 */ 2096 2097 /* Check that chip is expecting data input */ 2098 if (!(ns->state & STATE_DATAIN_MASK)) { 2099 NS_ERR("write_byte: data input (%#x) isn't expected, state is %s, " 2100 "switch to %s\n", (uint)byte, 2101 get_state_name(ns->state), get_state_name(STATE_READY)); 2102 switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); 2103 return; 2104 } 2105 2106 /* Check if this is expected byte */ 2107 if (ns->regs.count == ns->regs.num) { 2108 NS_WARN("write_byte: %u input bytes has already been accepted, ignore write\n", 2109 ns->regs.num); 2110 return; 2111 } 2112 2113 if (ns->busw == 8) { 2114 ns->buf.byte[ns->regs.count] = byte; 2115 ns->regs.count += 1; 2116 } else { 2117 ns->buf.word[ns->regs.count >> 1] = cpu_to_le16((uint16_t)byte); 2118 ns->regs.count += 2; 2119 } 2120 } 2121 2122 return; 2123} 2124 2125static void ns_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int bitmask) 2126{ 2127 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv; 2128 2129 ns->lines.cle = bitmask & NAND_CLE ? 1 : 0; 2130 ns->lines.ale = bitmask & NAND_ALE ? 1 : 0; 2131 ns->lines.ce = bitmask & NAND_NCE ? 1 : 0; 2132 2133 if (cmd != NAND_CMD_NONE) 2134 ns_nand_write_byte(mtd, cmd); 2135} 2136 2137static int ns_device_ready(struct mtd_info *mtd) 2138{ 2139 NS_DBG("device_ready\n"); 2140 return 1; 2141} 2142 2143static uint16_t ns_nand_read_word(struct mtd_info *mtd) 2144{ 2145 struct nand_chip *chip = (struct nand_chip *)mtd->priv; 2146 2147 NS_DBG("read_word\n"); 2148 2149 return chip->read_byte(mtd) | (chip->read_byte(mtd) << 8); 2150} 2151 2152static void ns_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) 2153{ 2154 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv; 2155 2156 /* Check that chip is expecting data input */ 2157 if (!(ns->state & STATE_DATAIN_MASK)) { 2158 NS_ERR("write_buf: data input isn't expected, state is %s, " 2159 "switch to STATE_READY\n", get_state_name(ns->state)); 2160 switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); 2161 return; 2162 } 2163 2164 /* Check if these are expected bytes */ 2165 if (ns->regs.count + len > ns->regs.num) { 2166 NS_ERR("write_buf: too many input bytes\n"); 2167 switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); 2168 return; 2169 } 2170 2171 memcpy(ns->buf.byte + ns->regs.count, buf, len); 2172 ns->regs.count += len; 2173 2174 if (ns->regs.count == ns->regs.num) { 2175 NS_DBG("write_buf: %d bytes were written\n", ns->regs.count); 2176 } 2177} 2178 2179static void ns_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) 2180{ 2181 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv; 2182 2183 /* Sanity and correctness checks */ 2184 if (!ns->lines.ce) { 2185 NS_ERR("read_buf: chip is disabled\n"); 2186 return; 2187 } 2188 if (ns->lines.ale || ns->lines.cle) { 2189 NS_ERR("read_buf: ALE or CLE pin is high\n"); 2190 return; 2191 } 2192 if (!(ns->state & STATE_DATAOUT_MASK)) { 2193 NS_WARN("read_buf: unexpected data output cycle, current state is %s\n", 2194 get_state_name(ns->state)); 2195 return; 2196 } 2197 2198 if (NS_STATE(ns->state) != STATE_DATAOUT) { 2199 int i; 2200 2201 for (i = 0; i < len; i++) 2202 buf[i] = ((struct nand_chip *)mtd->priv)->read_byte(mtd); 2203 2204 return; 2205 } 2206 2207 /* Check if these are expected bytes */ 2208 if (ns->regs.count + len > ns->regs.num) { 2209 NS_ERR("read_buf: too many bytes to read\n"); 2210 switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); 2211 return; 2212 } 2213 2214 memcpy(buf, ns->buf.byte + ns->regs.count, len); 2215 ns->regs.count += len; 2216 2217 if (ns->regs.count == ns->regs.num) { 2218 if (NS_STATE(ns->nxstate) == STATE_READY) 2219 switch_state(ns); 2220 } 2221 2222 return; 2223} 2224 2225/* 2226 * Module initialization function 2227 */ 2228static int __init ns_init_module(void) 2229{ 2230 struct nand_chip *chip; 2231 struct nandsim *nand; 2232 int retval = -ENOMEM, i; 2233 2234 if (bus_width != 8 && bus_width != 16) { 2235 NS_ERR("wrong bus width (%d), use only 8 or 16\n", bus_width); 2236 return -EINVAL; 2237 } 2238 2239 /* Allocate and initialize mtd_info, nand_chip and nandsim structures */ 2240 nsmtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip) 2241 + sizeof(struct nandsim), GFP_KERNEL); 2242 if (!nsmtd) { 2243 NS_ERR("unable to allocate core structures.\n"); 2244 return -ENOMEM; 2245 } 2246 chip = (struct nand_chip *)(nsmtd + 1); 2247 nsmtd->priv = (void *)chip; 2248 nand = (struct nandsim *)(chip + 1); 2249 chip->priv = (void *)nand; 2250 2251 /* 2252 * Register simulator's callbacks. 2253 */ 2254 chip->cmd_ctrl = ns_hwcontrol; 2255 chip->read_byte = ns_nand_read_byte; 2256 chip->dev_ready = ns_device_ready; 2257 chip->write_buf = ns_nand_write_buf; 2258 chip->read_buf = ns_nand_read_buf; 2259 chip->read_word = ns_nand_read_word; 2260 chip->ecc.mode = NAND_ECC_SOFT; 2261 /* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */ 2262 /* and 'badblocks' parameters to work */ 2263 chip->options |= NAND_SKIP_BBTSCAN; 2264 2265 switch (bbt) { 2266 case 2: 2267 chip->bbt_options |= NAND_BBT_NO_OOB; 2268 case 1: 2269 chip->bbt_options |= NAND_BBT_USE_FLASH; 2270 case 0: 2271 break; 2272 default: 2273 NS_ERR("bbt has to be 0..2\n"); 2274 retval = -EINVAL; 2275 goto error; 2276 } 2277 /* 2278 * Perform minimum nandsim structure initialization to handle 2279 * the initial ID read command correctly 2280 */ 2281 if (id_bytes[6] != 0xFF || id_bytes[7] != 0xFF) 2282 nand->geom.idbytes = 8; 2283 else if (id_bytes[4] != 0xFF || id_bytes[5] != 0xFF) 2284 nand->geom.idbytes = 6; 2285 else if (id_bytes[2] != 0xFF || id_bytes[3] != 0xFF) 2286 nand->geom.idbytes = 4; 2287 else 2288 nand->geom.idbytes = 2; 2289 nand->regs.status = NS_STATUS_OK(nand); 2290 nand->nxstate = STATE_UNKNOWN; 2291 nand->options |= OPT_PAGE512; /* temporary value */ 2292 memcpy(nand->ids, id_bytes, sizeof(nand->ids)); 2293 if (bus_width == 16) { 2294 nand->busw = 16; 2295 chip->options |= NAND_BUSWIDTH_16; 2296 } 2297 2298 nsmtd->owner = THIS_MODULE; 2299 2300 if ((retval = parse_weakblocks()) != 0) 2301 goto error; 2302 2303 if ((retval = parse_weakpages()) != 0) 2304 goto error; 2305 2306 if ((retval = parse_gravepages()) != 0) 2307 goto error; 2308 2309 retval = nand_scan_ident(nsmtd, 1, NULL); 2310 if (retval) { 2311 NS_ERR("cannot scan NAND Simulator device\n"); 2312 if (retval > 0) 2313 retval = -ENXIO; 2314 goto error; 2315 } 2316 2317 if (bch) { 2318 unsigned int eccsteps, eccbytes; 2319 if (!mtd_nand_has_bch()) { 2320 NS_ERR("BCH ECC support is disabled\n"); 2321 retval = -EINVAL; 2322 goto error; 2323 } 2324 /* use 512-byte ecc blocks */ 2325 eccsteps = nsmtd->writesize/512; 2326 eccbytes = (bch*13+7)/8; 2327 /* do not bother supporting small page devices */ 2328 if ((nsmtd->oobsize < 64) || !eccsteps) { 2329 NS_ERR("bch not available on small page devices\n"); 2330 retval = -EINVAL; 2331 goto error; 2332 } 2333 if ((eccbytes*eccsteps+2) > nsmtd->oobsize) { 2334 NS_ERR("invalid bch value %u\n", bch); 2335 retval = -EINVAL; 2336 goto error; 2337 } 2338 chip->ecc.mode = NAND_ECC_SOFT_BCH; 2339 chip->ecc.size = 512; 2340 chip->ecc.strength = bch; 2341 chip->ecc.bytes = eccbytes; 2342 NS_INFO("using %u-bit/%u bytes BCH ECC\n", bch, chip->ecc.size); 2343 } 2344 2345 retval = nand_scan_tail(nsmtd); 2346 if (retval) { 2347 NS_ERR("can't register NAND Simulator\n"); 2348 if (retval > 0) 2349 retval = -ENXIO; 2350 goto error; 2351 } 2352 2353 if (overridesize) { 2354 uint64_t new_size = (uint64_t)nsmtd->erasesize << overridesize; 2355 if (new_size >> overridesize != nsmtd->erasesize) { 2356 NS_ERR("overridesize is too big\n"); 2357 retval = -EINVAL; 2358 goto err_exit; 2359 } 2360 /* N.B. This relies on nand_scan not doing anything with the size before we change it */ 2361 nsmtd->size = new_size; 2362 chip->chipsize = new_size; 2363 chip->chip_shift = ffs(nsmtd->erasesize) + overridesize - 1; 2364 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1; 2365 } 2366 2367 if ((retval = setup_wear_reporting(nsmtd)) != 0) 2368 goto err_exit; 2369 2370 if ((retval = nandsim_debugfs_create(nand)) != 0) 2371 goto err_exit; 2372 2373 if ((retval = init_nandsim(nsmtd)) != 0) 2374 goto err_exit; 2375 2376 if ((retval = chip->scan_bbt(nsmtd)) != 0) 2377 goto err_exit; 2378 2379 if ((retval = parse_badblocks(nand, nsmtd)) != 0) 2380 goto err_exit; 2381 2382 /* Register NAND partitions */ 2383 retval = mtd_device_register(nsmtd, &nand->partitions[0], 2384 nand->nbparts); 2385 if (retval != 0) 2386 goto err_exit; 2387 2388 return 0; 2389 2390err_exit: 2391 free_nandsim(nand); 2392 nand_release(nsmtd); 2393 for (i = 0;i < ARRAY_SIZE(nand->partitions); ++i) 2394 kfree(nand->partitions[i].name); 2395error: 2396 kfree(nsmtd); 2397 free_lists(); 2398 2399 return retval; 2400} 2401 2402module_init(ns_init_module); 2403 2404/* 2405 * Module clean-up function 2406 */ 2407static void __exit ns_cleanup_module(void) 2408{ 2409 struct nandsim *ns = ((struct nand_chip *)nsmtd->priv)->priv; 2410 int i; 2411 2412 nandsim_debugfs_remove(ns); 2413 free_nandsim(ns); /* Free nandsim private resources */ 2414 nand_release(nsmtd); /* Unregister driver */ 2415 for (i = 0;i < ARRAY_SIZE(ns->partitions); ++i) 2416 kfree(ns->partitions[i].name); 2417 kfree(nsmtd); /* Free other structures */ 2418 free_lists(); 2419} 2420 2421module_exit(ns_cleanup_module); 2422 2423MODULE_LICENSE ("GPL"); 2424MODULE_AUTHOR ("Artem B. Bityuckiy"); 2425MODULE_DESCRIPTION ("The NAND flash simulator"); 2426