1/* cnic_if.h: QLogic cnic core network driver. 2 * 3 * Copyright (c) 2006-2014 Broadcom Corporation 4 * Copyright (c) 2014-2015 QLogic Corporation 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation. 9 * 10 */ 11 12 13#ifndef CNIC_IF_H 14#define CNIC_IF_H 15 16#include "bnx2x/bnx2x_mfw_req.h" 17 18#define CNIC_MODULE_VERSION "2.5.21" 19#define CNIC_MODULE_RELDATE "January 29, 2015" 20 21#define CNIC_ULP_RDMA 0 22#define CNIC_ULP_ISCSI 1 23#define CNIC_ULP_FCOE 2 24#define CNIC_ULP_L4 3 25#define MAX_CNIC_ULP_TYPE_EXT 3 26#define MAX_CNIC_ULP_TYPE 4 27 28/* Use CPU native page size up to 16K for cnic ring sizes. */ 29#if (PAGE_SHIFT > 14) 30#define CNIC_PAGE_BITS 14 31#else 32#define CNIC_PAGE_BITS PAGE_SHIFT 33#endif 34#define CNIC_PAGE_SIZE (1 << (CNIC_PAGE_BITS)) 35#define CNIC_PAGE_ALIGN(addr) ALIGN(addr, CNIC_PAGE_SIZE) 36#define CNIC_PAGE_MASK (~((CNIC_PAGE_SIZE) - 1)) 37 38struct kwqe { 39 u32 kwqe_op_flag; 40 41#define KWQE_QID_SHIFT 8 42#define KWQE_OPCODE_MASK 0x00ff0000 43#define KWQE_OPCODE_SHIFT 16 44#define KWQE_OPCODE(x) ((x & KWQE_OPCODE_MASK) >> KWQE_OPCODE_SHIFT) 45#define KWQE_LAYER_MASK 0x70000000 46#define KWQE_LAYER_SHIFT 28 47#define KWQE_FLAGS_LAYER_MASK_L2 (2<<28) 48#define KWQE_FLAGS_LAYER_MASK_L3 (3<<28) 49#define KWQE_FLAGS_LAYER_MASK_L4 (4<<28) 50#define KWQE_FLAGS_LAYER_MASK_L5_RDMA (5<<28) 51#define KWQE_FLAGS_LAYER_MASK_L5_ISCSI (6<<28) 52#define KWQE_FLAGS_LAYER_MASK_L5_FCOE (7<<28) 53 54 u32 kwqe_info0; 55 u32 kwqe_info1; 56 u32 kwqe_info2; 57 u32 kwqe_info3; 58 u32 kwqe_info4; 59 u32 kwqe_info5; 60 u32 kwqe_info6; 61}; 62 63struct kwqe_16 { 64 u32 kwqe_info0; 65 u32 kwqe_info1; 66 u32 kwqe_info2; 67 u32 kwqe_info3; 68}; 69 70struct kcqe { 71 u32 kcqe_info0; 72 u32 kcqe_info1; 73 u32 kcqe_info2; 74 u32 kcqe_info3; 75 u32 kcqe_info4; 76 u32 kcqe_info5; 77 u32 kcqe_info6; 78 u32 kcqe_op_flag; 79 #define KCQE_RAMROD_COMPLETION (0x1<<27) /* Everest */ 80 #define KCQE_FLAGS_LAYER_MASK (0x7<<28) 81 #define KCQE_FLAGS_LAYER_MASK_MISC (0<<28) 82 #define KCQE_FLAGS_LAYER_MASK_L2 (2<<28) 83 #define KCQE_FLAGS_LAYER_MASK_L3 (3<<28) 84 #define KCQE_FLAGS_LAYER_MASK_L4 (4<<28) 85 #define KCQE_FLAGS_LAYER_MASK_L5_RDMA (5<<28) 86 #define KCQE_FLAGS_LAYER_MASK_L5_ISCSI (6<<28) 87 #define KCQE_FLAGS_LAYER_MASK_L5_FCOE (7<<28) 88 #define KCQE_FLAGS_NEXT (1<<31) 89 #define KCQE_FLAGS_OPCODE_MASK (0xff<<16) 90 #define KCQE_FLAGS_OPCODE_SHIFT (16) 91 #define KCQE_OPCODE(op) \ 92 (((op) & KCQE_FLAGS_OPCODE_MASK) >> KCQE_FLAGS_OPCODE_SHIFT) 93}; 94 95#define MAX_CNIC_CTL_DATA 64 96#define MAX_DRV_CTL_DATA 64 97 98#define CNIC_CTL_STOP_CMD 1 99#define CNIC_CTL_START_CMD 2 100#define CNIC_CTL_COMPLETION_CMD 3 101#define CNIC_CTL_STOP_ISCSI_CMD 4 102#define CNIC_CTL_FCOE_STATS_GET_CMD 5 103#define CNIC_CTL_ISCSI_STATS_GET_CMD 6 104 105#define DRV_CTL_IO_WR_CMD 0x101 106#define DRV_CTL_IO_RD_CMD 0x102 107#define DRV_CTL_CTX_WR_CMD 0x103 108#define DRV_CTL_CTXTBL_WR_CMD 0x104 109#define DRV_CTL_RET_L5_SPQ_CREDIT_CMD 0x105 110#define DRV_CTL_START_L2_CMD 0x106 111#define DRV_CTL_STOP_L2_CMD 0x107 112#define DRV_CTL_RET_L2_SPQ_CREDIT_CMD 0x10c 113#define DRV_CTL_ISCSI_STOPPED_CMD 0x10d 114#define DRV_CTL_ULP_REGISTER_CMD 0x10e 115#define DRV_CTL_ULP_UNREGISTER_CMD 0x10f 116 117struct cnic_ctl_completion { 118 u32 cid; 119 u8 opcode; 120 u8 error; 121}; 122 123struct cnic_ctl_info { 124 int cmd; 125 union { 126 struct cnic_ctl_completion comp; 127 char bytes[MAX_CNIC_CTL_DATA]; 128 } data; 129}; 130 131struct drv_ctl_spq_credit { 132 u32 credit_count; 133}; 134 135struct drv_ctl_io { 136 u32 cid_addr; 137 u32 offset; 138 u32 data; 139 dma_addr_t dma_addr; 140}; 141 142struct drv_ctl_l2_ring { 143 u32 client_id; 144 u32 cid; 145}; 146 147struct drv_ctl_register_data { 148 int ulp_type; 149 struct fcoe_capabilities fcoe_features; 150}; 151 152struct drv_ctl_info { 153 int cmd; 154 union { 155 struct drv_ctl_spq_credit credit; 156 struct drv_ctl_io io; 157 struct drv_ctl_l2_ring ring; 158 int ulp_type; 159 struct drv_ctl_register_data register_data; 160 char bytes[MAX_DRV_CTL_DATA]; 161 } data; 162}; 163 164struct cnic_ops { 165 struct module *cnic_owner; 166 /* Calls to these functions are protected by RCU. When 167 * unregistering, we wait for any calls to complete before 168 * continuing. 169 */ 170 int (*cnic_handler)(void *, void *); 171 int (*cnic_ctl)(void *, struct cnic_ctl_info *); 172}; 173 174#define MAX_CNIC_VEC 8 175 176struct cnic_irq { 177 unsigned int vector; 178 void *status_blk; 179 u32 status_blk_num; 180 u32 status_blk_num2; 181 u32 irq_flags; 182#define CNIC_IRQ_FL_MSIX 0x00000001 183}; 184 185struct cnic_eth_dev { 186 struct module *drv_owner; 187 u32 drv_state; 188#define CNIC_DRV_STATE_REGD 0x00000001 189#define CNIC_DRV_STATE_USING_MSIX 0x00000002 190#define CNIC_DRV_STATE_NO_ISCSI_OOO 0x00000004 191#define CNIC_DRV_STATE_NO_ISCSI 0x00000008 192#define CNIC_DRV_STATE_NO_FCOE 0x00000010 193#define CNIC_DRV_STATE_HANDLES_IRQ 0x00000020 194 u32 chip_id; 195 u32 max_kwqe_pending; 196 struct pci_dev *pdev; 197 void __iomem *io_base; 198 void __iomem *io_base2; 199 const void *iro_arr; 200 201 u32 ctx_tbl_offset; 202 u32 ctx_tbl_len; 203 int ctx_blk_size; 204 u32 starting_cid; 205 u32 max_iscsi_conn; 206 u32 max_fcoe_conn; 207 u32 max_rdma_conn; 208 u32 fcoe_init_cid; 209 u32 max_fcoe_exchanges; 210 u32 fcoe_wwn_port_name_hi; 211 u32 fcoe_wwn_port_name_lo; 212 u32 fcoe_wwn_node_name_hi; 213 u32 fcoe_wwn_node_name_lo; 214 215 u16 iscsi_l2_client_id; 216 u16 iscsi_l2_cid; 217 u8 iscsi_mac[ETH_ALEN]; 218 219 int num_irq; 220 struct cnic_irq irq_arr[MAX_CNIC_VEC]; 221 int (*drv_register_cnic)(struct net_device *, 222 struct cnic_ops *, void *); 223 int (*drv_unregister_cnic)(struct net_device *); 224 int (*drv_submit_kwqes_32)(struct net_device *, 225 struct kwqe *[], u32); 226 int (*drv_submit_kwqes_16)(struct net_device *, 227 struct kwqe_16 *[], u32); 228 int (*drv_ctl)(struct net_device *, struct drv_ctl_info *); 229 unsigned long reserved1[2]; 230 union drv_info_to_mcp *addr_drv_info_to_mcp; 231}; 232 233struct cnic_sockaddr { 234 union { 235 struct sockaddr_in v4; 236 struct sockaddr_in6 v6; 237 } local; 238 union { 239 struct sockaddr_in v4; 240 struct sockaddr_in6 v6; 241 } remote; 242}; 243 244struct cnic_sock { 245 struct cnic_dev *dev; 246 void *context; 247 u32 src_ip[4]; 248 u32 dst_ip[4]; 249 u16 src_port; 250 u16 dst_port; 251 u16 vlan_id; 252 unsigned char old_ha[ETH_ALEN]; 253 unsigned char ha[ETH_ALEN]; 254 u32 mtu; 255 u32 cid; 256 u32 l5_cid; 257 u32 pg_cid; 258 int ulp_type; 259 260 u32 ka_timeout; 261 u32 ka_interval; 262 u8 ka_max_probe_count; 263 u8 tos; 264 u8 ttl; 265 u8 snd_seq_scale; 266 u32 rcv_buf; 267 u32 snd_buf; 268 u32 seed; 269 270 unsigned long tcp_flags; 271#define SK_TCP_NO_DELAY_ACK 0x1 272#define SK_TCP_KEEP_ALIVE 0x2 273#define SK_TCP_NAGLE 0x4 274#define SK_TCP_TIMESTAMP 0x8 275#define SK_TCP_SACK 0x10 276#define SK_TCP_SEG_SCALING 0x20 277 unsigned long flags; 278#define SK_F_INUSE 0 279#define SK_F_OFFLD_COMPLETE 1 280#define SK_F_OFFLD_SCHED 2 281#define SK_F_PG_OFFLD_COMPLETE 3 282#define SK_F_CONNECT_START 4 283#define SK_F_IPV6 5 284#define SK_F_CLOSING 7 285#define SK_F_HW_ERR 8 286 287 atomic_t ref_count; 288 u32 state; 289 struct kwqe kwqe1; 290 struct kwqe kwqe2; 291 struct kwqe kwqe3; 292}; 293 294struct cnic_dev { 295 struct net_device *netdev; 296 struct pci_dev *pcidev; 297 void __iomem *regview; 298 struct list_head list; 299 300 int (*register_device)(struct cnic_dev *dev, int ulp_type, 301 void *ulp_ctx); 302 int (*unregister_device)(struct cnic_dev *dev, int ulp_type); 303 int (*submit_kwqes)(struct cnic_dev *dev, struct kwqe *wqes[], 304 u32 num_wqes); 305 int (*submit_kwqes_16)(struct cnic_dev *dev, struct kwqe_16 *wqes[], 306 u32 num_wqes); 307 308 int (*cm_create)(struct cnic_dev *, int, u32, u32, struct cnic_sock **, 309 void *); 310 int (*cm_destroy)(struct cnic_sock *); 311 int (*cm_connect)(struct cnic_sock *, struct cnic_sockaddr *); 312 int (*cm_abort)(struct cnic_sock *); 313 int (*cm_close)(struct cnic_sock *); 314 struct cnic_dev *(*cm_select_dev)(struct sockaddr_in *, int ulp_type); 315 int (*iscsi_nl_msg_recv)(struct cnic_dev *dev, u32 msg_type, 316 char *data, u16 data_size); 317 unsigned long flags; 318#define CNIC_F_CNIC_UP 1 319#define CNIC_F_BNX2_CLASS 3 320#define CNIC_F_BNX2X_CLASS 4 321 atomic_t ref_count; 322 u8 mac_addr[ETH_ALEN]; 323 324 int max_iscsi_conn; 325 int max_fcoe_conn; 326 int max_rdma_conn; 327 328 int max_fcoe_exchanges; 329 330 union drv_info_to_mcp *stats_addr; 331 struct fcoe_capabilities *fcoe_cap; 332 333 void *cnic_priv; 334}; 335 336#define CNIC_WR(dev, off, val) writel(val, dev->regview + off) 337#define CNIC_WR16(dev, off, val) writew(val, dev->regview + off) 338#define CNIC_WR8(dev, off, val) writeb(val, dev->regview + off) 339#define CNIC_RD(dev, off) readl(dev->regview + off) 340#define CNIC_RD16(dev, off) readw(dev->regview + off) 341 342struct cnic_ulp_ops { 343 /* Calls to these functions are protected by RCU. When 344 * unregistering, we wait for any calls to complete before 345 * continuing. 346 */ 347 348 void (*cnic_init)(struct cnic_dev *dev); 349 void (*cnic_exit)(struct cnic_dev *dev); 350 void (*cnic_start)(void *ulp_ctx); 351 void (*cnic_stop)(void *ulp_ctx); 352 void (*indicate_kcqes)(void *ulp_ctx, struct kcqe *cqes[], 353 u32 num_cqes); 354 void (*indicate_netevent)(void *ulp_ctx, unsigned long event, u16 vid); 355 void (*cm_connect_complete)(struct cnic_sock *); 356 void (*cm_close_complete)(struct cnic_sock *); 357 void (*cm_abort_complete)(struct cnic_sock *); 358 void (*cm_remote_close)(struct cnic_sock *); 359 void (*cm_remote_abort)(struct cnic_sock *); 360 int (*iscsi_nl_send_msg)(void *ulp_ctx, u32 msg_type, 361 char *data, u16 data_size); 362 int (*cnic_get_stats)(void *ulp_ctx); 363 struct module *owner; 364 atomic_t ref_count; 365}; 366 367int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops); 368 369int cnic_unregister_driver(int ulp_type); 370 371#endif 372