1/* 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved. 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved. 4 * 5 * This program is free software; you may redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; version 2 of the License. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 16 * SOFTWARE. 17 * 18 */ 19 20#include <linux/module.h> 21#include <linux/kernel.h> 22#include <linux/string.h> 23#include <linux/errno.h> 24#include <linux/types.h> 25#include <linux/init.h> 26#include <linux/interrupt.h> 27#include <linux/workqueue.h> 28#include <linux/pci.h> 29#include <linux/netdevice.h> 30#include <linux/etherdevice.h> 31#include <linux/if.h> 32#include <linux/if_ether.h> 33#include <linux/if_vlan.h> 34#include <linux/in.h> 35#include <linux/ip.h> 36#include <linux/ipv6.h> 37#include <linux/tcp.h> 38#include <linux/rtnetlink.h> 39#include <linux/prefetch.h> 40#include <net/ip6_checksum.h> 41#include <linux/ktime.h> 42#ifdef CONFIG_RFS_ACCEL 43#include <linux/cpu_rmap.h> 44#endif 45#ifdef CONFIG_NET_RX_BUSY_POLL 46#include <net/busy_poll.h> 47#endif 48#include <linux/crash_dump.h> 49 50#include "cq_enet_desc.h" 51#include "vnic_dev.h" 52#include "vnic_intr.h" 53#include "vnic_stats.h" 54#include "vnic_vic.h" 55#include "enic_res.h" 56#include "enic.h" 57#include "enic_dev.h" 58#include "enic_pp.h" 59#include "enic_clsf.h" 60 61#define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ) 62#define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS) 63#define MAX_TSO (1 << 16) 64#define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1) 65 66#define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */ 67#define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */ 68#define PCI_DEVICE_ID_CISCO_VIC_ENET_VF 0x0071 /* enet SRIOV VF */ 69 70#define RX_COPYBREAK_DEFAULT 256 71 72/* Supported devices */ 73static const struct pci_device_id enic_id_table[] = { 74 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) }, 75 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) }, 76 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) }, 77 { 0, } /* end of table */ 78}; 79 80MODULE_DESCRIPTION(DRV_DESCRIPTION); 81MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>"); 82MODULE_LICENSE("GPL"); 83MODULE_VERSION(DRV_VERSION); 84MODULE_DEVICE_TABLE(pci, enic_id_table); 85 86#define ENIC_LARGE_PKT_THRESHOLD 1000 87#define ENIC_MAX_COALESCE_TIMERS 10 88/* Interrupt moderation table, which will be used to decide the 89 * coalescing timer values 90 * {rx_rate in Mbps, mapping percentage of the range} 91 */ 92static struct enic_intr_mod_table mod_table[ENIC_MAX_COALESCE_TIMERS + 1] = { 93 {4000, 0}, 94 {4400, 10}, 95 {5060, 20}, 96 {5230, 30}, 97 {5540, 40}, 98 {5820, 50}, 99 {6120, 60}, 100 {6435, 70}, 101 {6745, 80}, 102 {7000, 90}, 103 {0xFFFFFFFF, 100} 104}; 105 106/* This table helps the driver to pick different ranges for rx coalescing 107 * timer depending on the link speed. 108 */ 109static struct enic_intr_mod_range mod_range[ENIC_MAX_LINK_SPEEDS] = { 110 {0, 0}, /* 0 - 4 Gbps */ 111 {0, 3}, /* 4 - 10 Gbps */ 112 {3, 6}, /* 10 - 40 Gbps */ 113}; 114 115int enic_is_dynamic(struct enic *enic) 116{ 117 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN; 118} 119 120int enic_sriov_enabled(struct enic *enic) 121{ 122 return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0; 123} 124 125static int enic_is_sriov_vf(struct enic *enic) 126{ 127 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF; 128} 129 130int enic_is_valid_vf(struct enic *enic, int vf) 131{ 132#ifdef CONFIG_PCI_IOV 133 return vf >= 0 && vf < enic->num_vfs; 134#else 135 return 0; 136#endif 137} 138 139static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf) 140{ 141 struct enic *enic = vnic_dev_priv(wq->vdev); 142 143 if (buf->sop) 144 pci_unmap_single(enic->pdev, buf->dma_addr, 145 buf->len, PCI_DMA_TODEVICE); 146 else 147 pci_unmap_page(enic->pdev, buf->dma_addr, 148 buf->len, PCI_DMA_TODEVICE); 149 150 if (buf->os_buf) 151 dev_kfree_skb_any(buf->os_buf); 152} 153 154static void enic_wq_free_buf(struct vnic_wq *wq, 155 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque) 156{ 157 enic_free_wq_buf(wq, buf); 158} 159 160static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc, 161 u8 type, u16 q_number, u16 completed_index, void *opaque) 162{ 163 struct enic *enic = vnic_dev_priv(vdev); 164 165 spin_lock(&enic->wq_lock[q_number]); 166 167 vnic_wq_service(&enic->wq[q_number], cq_desc, 168 completed_index, enic_wq_free_buf, 169 opaque); 170 171 if (netif_tx_queue_stopped(netdev_get_tx_queue(enic->netdev, q_number)) && 172 vnic_wq_desc_avail(&enic->wq[q_number]) >= 173 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)) 174 netif_wake_subqueue(enic->netdev, q_number); 175 176 spin_unlock(&enic->wq_lock[q_number]); 177 178 return 0; 179} 180 181static void enic_log_q_error(struct enic *enic) 182{ 183 unsigned int i; 184 u32 error_status; 185 186 for (i = 0; i < enic->wq_count; i++) { 187 error_status = vnic_wq_error_status(&enic->wq[i]); 188 if (error_status) 189 netdev_err(enic->netdev, "WQ[%d] error_status %d\n", 190 i, error_status); 191 } 192 193 for (i = 0; i < enic->rq_count; i++) { 194 error_status = vnic_rq_error_status(&enic->rq[i]); 195 if (error_status) 196 netdev_err(enic->netdev, "RQ[%d] error_status %d\n", 197 i, error_status); 198 } 199} 200 201static void enic_msglvl_check(struct enic *enic) 202{ 203 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev); 204 205 if (msg_enable != enic->msg_enable) { 206 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n", 207 enic->msg_enable, msg_enable); 208 enic->msg_enable = msg_enable; 209 } 210} 211 212static void enic_mtu_check(struct enic *enic) 213{ 214 u32 mtu = vnic_dev_mtu(enic->vdev); 215 struct net_device *netdev = enic->netdev; 216 217 if (mtu && mtu != enic->port_mtu) { 218 enic->port_mtu = mtu; 219 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) { 220 mtu = max_t(int, ENIC_MIN_MTU, 221 min_t(int, ENIC_MAX_MTU, mtu)); 222 if (mtu != netdev->mtu) 223 schedule_work(&enic->change_mtu_work); 224 } else { 225 if (mtu < netdev->mtu) 226 netdev_warn(netdev, 227 "interface MTU (%d) set higher " 228 "than switch port MTU (%d)\n", 229 netdev->mtu, mtu); 230 } 231 } 232} 233 234static void enic_link_check(struct enic *enic) 235{ 236 int link_status = vnic_dev_link_status(enic->vdev); 237 int carrier_ok = netif_carrier_ok(enic->netdev); 238 239 if (link_status && !carrier_ok) { 240 netdev_info(enic->netdev, "Link UP\n"); 241 netif_carrier_on(enic->netdev); 242 } else if (!link_status && carrier_ok) { 243 netdev_info(enic->netdev, "Link DOWN\n"); 244 netif_carrier_off(enic->netdev); 245 } 246} 247 248static void enic_notify_check(struct enic *enic) 249{ 250 enic_msglvl_check(enic); 251 enic_mtu_check(enic); 252 enic_link_check(enic); 253} 254 255#define ENIC_TEST_INTR(pba, i) (pba & (1 << i)) 256 257static irqreturn_t enic_isr_legacy(int irq, void *data) 258{ 259 struct net_device *netdev = data; 260 struct enic *enic = netdev_priv(netdev); 261 unsigned int io_intr = enic_legacy_io_intr(); 262 unsigned int err_intr = enic_legacy_err_intr(); 263 unsigned int notify_intr = enic_legacy_notify_intr(); 264 u32 pba; 265 266 vnic_intr_mask(&enic->intr[io_intr]); 267 268 pba = vnic_intr_legacy_pba(enic->legacy_pba); 269 if (!pba) { 270 vnic_intr_unmask(&enic->intr[io_intr]); 271 return IRQ_NONE; /* not our interrupt */ 272 } 273 274 if (ENIC_TEST_INTR(pba, notify_intr)) { 275 enic_notify_check(enic); 276 vnic_intr_return_all_credits(&enic->intr[notify_intr]); 277 } 278 279 if (ENIC_TEST_INTR(pba, err_intr)) { 280 vnic_intr_return_all_credits(&enic->intr[err_intr]); 281 enic_log_q_error(enic); 282 /* schedule recovery from WQ/RQ error */ 283 schedule_work(&enic->reset); 284 return IRQ_HANDLED; 285 } 286 287 if (ENIC_TEST_INTR(pba, io_intr)) 288 napi_schedule_irqoff(&enic->napi[0]); 289 else 290 vnic_intr_unmask(&enic->intr[io_intr]); 291 292 return IRQ_HANDLED; 293} 294 295static irqreturn_t enic_isr_msi(int irq, void *data) 296{ 297 struct enic *enic = data; 298 299 /* With MSI, there is no sharing of interrupts, so this is 300 * our interrupt and there is no need to ack it. The device 301 * is not providing per-vector masking, so the OS will not 302 * write to PCI config space to mask/unmask the interrupt. 303 * We're using mask_on_assertion for MSI, so the device 304 * automatically masks the interrupt when the interrupt is 305 * generated. Later, when exiting polling, the interrupt 306 * will be unmasked (see enic_poll). 307 * 308 * Also, the device uses the same PCIe Traffic Class (TC) 309 * for Memory Write data and MSI, so there are no ordering 310 * issues; the MSI will always arrive at the Root Complex 311 * _after_ corresponding Memory Writes (i.e. descriptor 312 * writes). 313 */ 314 315 napi_schedule_irqoff(&enic->napi[0]); 316 317 return IRQ_HANDLED; 318} 319 320static irqreturn_t enic_isr_msix(int irq, void *data) 321{ 322 struct napi_struct *napi = data; 323 324 napi_schedule_irqoff(napi); 325 326 return IRQ_HANDLED; 327} 328 329static irqreturn_t enic_isr_msix_err(int irq, void *data) 330{ 331 struct enic *enic = data; 332 unsigned int intr = enic_msix_err_intr(enic); 333 334 vnic_intr_return_all_credits(&enic->intr[intr]); 335 336 enic_log_q_error(enic); 337 338 /* schedule recovery from WQ/RQ error */ 339 schedule_work(&enic->reset); 340 341 return IRQ_HANDLED; 342} 343 344static irqreturn_t enic_isr_msix_notify(int irq, void *data) 345{ 346 struct enic *enic = data; 347 unsigned int intr = enic_msix_notify_intr(enic); 348 349 enic_notify_check(enic); 350 vnic_intr_return_all_credits(&enic->intr[intr]); 351 352 return IRQ_HANDLED; 353} 354 355static int enic_queue_wq_skb_cont(struct enic *enic, struct vnic_wq *wq, 356 struct sk_buff *skb, unsigned int len_left, 357 int loopback) 358{ 359 const skb_frag_t *frag; 360 dma_addr_t dma_addr; 361 362 /* Queue additional data fragments */ 363 for (frag = skb_shinfo(skb)->frags; len_left; frag++) { 364 len_left -= skb_frag_size(frag); 365 dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag, 0, 366 skb_frag_size(frag), 367 DMA_TO_DEVICE); 368 if (unlikely(enic_dma_map_check(enic, dma_addr))) 369 return -ENOMEM; 370 enic_queue_wq_desc_cont(wq, skb, dma_addr, skb_frag_size(frag), 371 (len_left == 0), /* EOP? */ 372 loopback); 373 } 374 375 return 0; 376} 377 378static int enic_queue_wq_skb_vlan(struct enic *enic, struct vnic_wq *wq, 379 struct sk_buff *skb, int vlan_tag_insert, 380 unsigned int vlan_tag, int loopback) 381{ 382 unsigned int head_len = skb_headlen(skb); 383 unsigned int len_left = skb->len - head_len; 384 int eop = (len_left == 0); 385 dma_addr_t dma_addr; 386 int err = 0; 387 388 dma_addr = pci_map_single(enic->pdev, skb->data, head_len, 389 PCI_DMA_TODEVICE); 390 if (unlikely(enic_dma_map_check(enic, dma_addr))) 391 return -ENOMEM; 392 393 /* Queue the main skb fragment. The fragments are no larger 394 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less 395 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor 396 * per fragment is queued. 397 */ 398 enic_queue_wq_desc(wq, skb, dma_addr, head_len, vlan_tag_insert, 399 vlan_tag, eop, loopback); 400 401 if (!eop) 402 err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback); 403 404 return err; 405} 406 407static int enic_queue_wq_skb_csum_l4(struct enic *enic, struct vnic_wq *wq, 408 struct sk_buff *skb, int vlan_tag_insert, 409 unsigned int vlan_tag, int loopback) 410{ 411 unsigned int head_len = skb_headlen(skb); 412 unsigned int len_left = skb->len - head_len; 413 unsigned int hdr_len = skb_checksum_start_offset(skb); 414 unsigned int csum_offset = hdr_len + skb->csum_offset; 415 int eop = (len_left == 0); 416 dma_addr_t dma_addr; 417 int err = 0; 418 419 dma_addr = pci_map_single(enic->pdev, skb->data, head_len, 420 PCI_DMA_TODEVICE); 421 if (unlikely(enic_dma_map_check(enic, dma_addr))) 422 return -ENOMEM; 423 424 /* Queue the main skb fragment. The fragments are no larger 425 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less 426 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor 427 * per fragment is queued. 428 */ 429 enic_queue_wq_desc_csum_l4(wq, skb, dma_addr, head_len, csum_offset, 430 hdr_len, vlan_tag_insert, vlan_tag, eop, 431 loopback); 432 433 if (!eop) 434 err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback); 435 436 return err; 437} 438 439static int enic_queue_wq_skb_tso(struct enic *enic, struct vnic_wq *wq, 440 struct sk_buff *skb, unsigned int mss, 441 int vlan_tag_insert, unsigned int vlan_tag, 442 int loopback) 443{ 444 unsigned int frag_len_left = skb_headlen(skb); 445 unsigned int len_left = skb->len - frag_len_left; 446 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 447 int eop = (len_left == 0); 448 unsigned int len; 449 dma_addr_t dma_addr; 450 unsigned int offset = 0; 451 skb_frag_t *frag; 452 453 /* Preload TCP csum field with IP pseudo hdr calculated 454 * with IP length set to zero. HW will later add in length 455 * to each TCP segment resulting from the TSO. 456 */ 457 458 if (skb->protocol == cpu_to_be16(ETH_P_IP)) { 459 ip_hdr(skb)->check = 0; 460 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr, 461 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0); 462 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) { 463 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 464 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0); 465 } 466 467 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors 468 * for the main skb fragment 469 */ 470 while (frag_len_left) { 471 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN); 472 dma_addr = pci_map_single(enic->pdev, skb->data + offset, len, 473 PCI_DMA_TODEVICE); 474 if (unlikely(enic_dma_map_check(enic, dma_addr))) 475 return -ENOMEM; 476 enic_queue_wq_desc_tso(wq, skb, dma_addr, len, mss, hdr_len, 477 vlan_tag_insert, vlan_tag, 478 eop && (len == frag_len_left), loopback); 479 frag_len_left -= len; 480 offset += len; 481 } 482 483 if (eop) 484 return 0; 485 486 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors 487 * for additional data fragments 488 */ 489 for (frag = skb_shinfo(skb)->frags; len_left; frag++) { 490 len_left -= skb_frag_size(frag); 491 frag_len_left = skb_frag_size(frag); 492 offset = 0; 493 494 while (frag_len_left) { 495 len = min(frag_len_left, 496 (unsigned int)WQ_ENET_MAX_DESC_LEN); 497 dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag, 498 offset, len, 499 DMA_TO_DEVICE); 500 if (unlikely(enic_dma_map_check(enic, dma_addr))) 501 return -ENOMEM; 502 enic_queue_wq_desc_cont(wq, skb, dma_addr, len, 503 (len_left == 0) && 504 (len == frag_len_left),/*EOP*/ 505 loopback); 506 frag_len_left -= len; 507 offset += len; 508 } 509 } 510 511 return 0; 512} 513 514static inline void enic_queue_wq_skb(struct enic *enic, 515 struct vnic_wq *wq, struct sk_buff *skb) 516{ 517 unsigned int mss = skb_shinfo(skb)->gso_size; 518 unsigned int vlan_tag = 0; 519 int vlan_tag_insert = 0; 520 int loopback = 0; 521 int err; 522 523 if (skb_vlan_tag_present(skb)) { 524 /* VLAN tag from trunking driver */ 525 vlan_tag_insert = 1; 526 vlan_tag = skb_vlan_tag_get(skb); 527 } else if (enic->loop_enable) { 528 vlan_tag = enic->loop_tag; 529 loopback = 1; 530 } 531 532 if (mss) 533 err = enic_queue_wq_skb_tso(enic, wq, skb, mss, 534 vlan_tag_insert, vlan_tag, 535 loopback); 536 else if (skb->ip_summed == CHECKSUM_PARTIAL) 537 err = enic_queue_wq_skb_csum_l4(enic, wq, skb, vlan_tag_insert, 538 vlan_tag, loopback); 539 else 540 err = enic_queue_wq_skb_vlan(enic, wq, skb, vlan_tag_insert, 541 vlan_tag, loopback); 542 if (unlikely(err)) { 543 struct vnic_wq_buf *buf; 544 545 buf = wq->to_use->prev; 546 /* while not EOP of previous pkt && queue not empty. 547 * For all non EOP bufs, os_buf is NULL. 548 */ 549 while (!buf->os_buf && (buf->next != wq->to_clean)) { 550 enic_free_wq_buf(wq, buf); 551 wq->ring.desc_avail++; 552 buf = buf->prev; 553 } 554 wq->to_use = buf->next; 555 dev_kfree_skb(skb); 556 } 557} 558 559/* netif_tx_lock held, process context with BHs disabled, or BH */ 560static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb, 561 struct net_device *netdev) 562{ 563 struct enic *enic = netdev_priv(netdev); 564 struct vnic_wq *wq; 565 unsigned int txq_map; 566 struct netdev_queue *txq; 567 568 if (skb->len <= 0) { 569 dev_kfree_skb_any(skb); 570 return NETDEV_TX_OK; 571 } 572 573 txq_map = skb_get_queue_mapping(skb) % enic->wq_count; 574 wq = &enic->wq[txq_map]; 575 txq = netdev_get_tx_queue(netdev, txq_map); 576 577 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs, 578 * which is very likely. In the off chance it's going to take 579 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb. 580 */ 581 582 if (skb_shinfo(skb)->gso_size == 0 && 583 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC && 584 skb_linearize(skb)) { 585 dev_kfree_skb_any(skb); 586 return NETDEV_TX_OK; 587 } 588 589 spin_lock(&enic->wq_lock[txq_map]); 590 591 if (vnic_wq_desc_avail(wq) < 592 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) { 593 netif_tx_stop_queue(txq); 594 /* This is a hard error, log it */ 595 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n"); 596 spin_unlock(&enic->wq_lock[txq_map]); 597 return NETDEV_TX_BUSY; 598 } 599 600 enic_queue_wq_skb(enic, wq, skb); 601 602 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS) 603 netif_tx_stop_queue(txq); 604 if (!skb->xmit_more || netif_xmit_stopped(txq)) 605 vnic_wq_doorbell(wq); 606 607 spin_unlock(&enic->wq_lock[txq_map]); 608 609 return NETDEV_TX_OK; 610} 611 612/* dev_base_lock rwlock held, nominally process context */ 613static struct rtnl_link_stats64 *enic_get_stats(struct net_device *netdev, 614 struct rtnl_link_stats64 *net_stats) 615{ 616 struct enic *enic = netdev_priv(netdev); 617 struct vnic_stats *stats; 618 int err; 619 620 err = enic_dev_stats_dump(enic, &stats); 621 /* return only when pci_zalloc_consistent fails in vnic_dev_stats_dump 622 * For other failures, like devcmd failure, we return previously 623 * recorded stats. 624 */ 625 if (err == -ENOMEM) 626 return net_stats; 627 628 net_stats->tx_packets = stats->tx.tx_frames_ok; 629 net_stats->tx_bytes = stats->tx.tx_bytes_ok; 630 net_stats->tx_errors = stats->tx.tx_errors; 631 net_stats->tx_dropped = stats->tx.tx_drops; 632 633 net_stats->rx_packets = stats->rx.rx_frames_ok; 634 net_stats->rx_bytes = stats->rx.rx_bytes_ok; 635 net_stats->rx_errors = stats->rx.rx_errors; 636 net_stats->multicast = stats->rx.rx_multicast_frames_ok; 637 net_stats->rx_over_errors = enic->rq_truncated_pkts; 638 net_stats->rx_crc_errors = enic->rq_bad_fcs; 639 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop; 640 641 return net_stats; 642} 643 644static int enic_mc_sync(struct net_device *netdev, const u8 *mc_addr) 645{ 646 struct enic *enic = netdev_priv(netdev); 647 648 if (enic->mc_count == ENIC_MULTICAST_PERFECT_FILTERS) { 649 unsigned int mc_count = netdev_mc_count(netdev); 650 651 netdev_warn(netdev, "Registering only %d out of %d multicast addresses\n", 652 ENIC_MULTICAST_PERFECT_FILTERS, mc_count); 653 654 return -ENOSPC; 655 } 656 657 enic_dev_add_addr(enic, mc_addr); 658 enic->mc_count++; 659 660 return 0; 661} 662 663static int enic_mc_unsync(struct net_device *netdev, const u8 *mc_addr) 664{ 665 struct enic *enic = netdev_priv(netdev); 666 667 enic_dev_del_addr(enic, mc_addr); 668 enic->mc_count--; 669 670 return 0; 671} 672 673static int enic_uc_sync(struct net_device *netdev, const u8 *uc_addr) 674{ 675 struct enic *enic = netdev_priv(netdev); 676 677 if (enic->uc_count == ENIC_UNICAST_PERFECT_FILTERS) { 678 unsigned int uc_count = netdev_uc_count(netdev); 679 680 netdev_warn(netdev, "Registering only %d out of %d unicast addresses\n", 681 ENIC_UNICAST_PERFECT_FILTERS, uc_count); 682 683 return -ENOSPC; 684 } 685 686 enic_dev_add_addr(enic, uc_addr); 687 enic->uc_count++; 688 689 return 0; 690} 691 692static int enic_uc_unsync(struct net_device *netdev, const u8 *uc_addr) 693{ 694 struct enic *enic = netdev_priv(netdev); 695 696 enic_dev_del_addr(enic, uc_addr); 697 enic->uc_count--; 698 699 return 0; 700} 701 702void enic_reset_addr_lists(struct enic *enic) 703{ 704 struct net_device *netdev = enic->netdev; 705 706 __dev_uc_unsync(netdev, NULL); 707 __dev_mc_unsync(netdev, NULL); 708 709 enic->mc_count = 0; 710 enic->uc_count = 0; 711 enic->flags = 0; 712} 713 714static int enic_set_mac_addr(struct net_device *netdev, char *addr) 715{ 716 struct enic *enic = netdev_priv(netdev); 717 718 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) { 719 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr)) 720 return -EADDRNOTAVAIL; 721 } else { 722 if (!is_valid_ether_addr(addr)) 723 return -EADDRNOTAVAIL; 724 } 725 726 memcpy(netdev->dev_addr, addr, netdev->addr_len); 727 728 return 0; 729} 730 731static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p) 732{ 733 struct enic *enic = netdev_priv(netdev); 734 struct sockaddr *saddr = p; 735 char *addr = saddr->sa_data; 736 int err; 737 738 if (netif_running(enic->netdev)) { 739 err = enic_dev_del_station_addr(enic); 740 if (err) 741 return err; 742 } 743 744 err = enic_set_mac_addr(netdev, addr); 745 if (err) 746 return err; 747 748 if (netif_running(enic->netdev)) { 749 err = enic_dev_add_station_addr(enic); 750 if (err) 751 return err; 752 } 753 754 return err; 755} 756 757static int enic_set_mac_address(struct net_device *netdev, void *p) 758{ 759 struct sockaddr *saddr = p; 760 char *addr = saddr->sa_data; 761 struct enic *enic = netdev_priv(netdev); 762 int err; 763 764 err = enic_dev_del_station_addr(enic); 765 if (err) 766 return err; 767 768 err = enic_set_mac_addr(netdev, addr); 769 if (err) 770 return err; 771 772 return enic_dev_add_station_addr(enic); 773} 774 775/* netif_tx_lock held, BHs disabled */ 776static void enic_set_rx_mode(struct net_device *netdev) 777{ 778 struct enic *enic = netdev_priv(netdev); 779 int directed = 1; 780 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0; 781 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0; 782 int promisc = (netdev->flags & IFF_PROMISC) || 783 netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS; 784 int allmulti = (netdev->flags & IFF_ALLMULTI) || 785 netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS; 786 unsigned int flags = netdev->flags | 787 (allmulti ? IFF_ALLMULTI : 0) | 788 (promisc ? IFF_PROMISC : 0); 789 790 if (enic->flags != flags) { 791 enic->flags = flags; 792 enic_dev_packet_filter(enic, directed, 793 multicast, broadcast, promisc, allmulti); 794 } 795 796 if (!promisc) { 797 __dev_uc_sync(netdev, enic_uc_sync, enic_uc_unsync); 798 if (!allmulti) 799 __dev_mc_sync(netdev, enic_mc_sync, enic_mc_unsync); 800 } 801} 802 803/* netif_tx_lock held, BHs disabled */ 804static void enic_tx_timeout(struct net_device *netdev) 805{ 806 struct enic *enic = netdev_priv(netdev); 807 schedule_work(&enic->reset); 808} 809 810static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac) 811{ 812 struct enic *enic = netdev_priv(netdev); 813 struct enic_port_profile *pp; 814 int err; 815 816 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 817 if (err) 818 return err; 819 820 if (is_valid_ether_addr(mac) || is_zero_ether_addr(mac)) { 821 if (vf == PORT_SELF_VF) { 822 memcpy(pp->vf_mac, mac, ETH_ALEN); 823 return 0; 824 } else { 825 /* 826 * For sriov vf's set the mac in hw 827 */ 828 ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic, 829 vnic_dev_set_mac_addr, mac); 830 return enic_dev_status_to_errno(err); 831 } 832 } else 833 return -EINVAL; 834} 835 836static int enic_set_vf_port(struct net_device *netdev, int vf, 837 struct nlattr *port[]) 838{ 839 struct enic *enic = netdev_priv(netdev); 840 struct enic_port_profile prev_pp; 841 struct enic_port_profile *pp; 842 int err = 0, restore_pp = 1; 843 844 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 845 if (err) 846 return err; 847 848 if (!port[IFLA_PORT_REQUEST]) 849 return -EOPNOTSUPP; 850 851 memcpy(&prev_pp, pp, sizeof(*enic->pp)); 852 memset(pp, 0, sizeof(*enic->pp)); 853 854 pp->set |= ENIC_SET_REQUEST; 855 pp->request = nla_get_u8(port[IFLA_PORT_REQUEST]); 856 857 if (port[IFLA_PORT_PROFILE]) { 858 pp->set |= ENIC_SET_NAME; 859 memcpy(pp->name, nla_data(port[IFLA_PORT_PROFILE]), 860 PORT_PROFILE_MAX); 861 } 862 863 if (port[IFLA_PORT_INSTANCE_UUID]) { 864 pp->set |= ENIC_SET_INSTANCE; 865 memcpy(pp->instance_uuid, 866 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX); 867 } 868 869 if (port[IFLA_PORT_HOST_UUID]) { 870 pp->set |= ENIC_SET_HOST; 871 memcpy(pp->host_uuid, 872 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX); 873 } 874 875 if (vf == PORT_SELF_VF) { 876 /* Special case handling: mac came from IFLA_VF_MAC */ 877 if (!is_zero_ether_addr(prev_pp.vf_mac)) 878 memcpy(pp->mac_addr, prev_pp.vf_mac, ETH_ALEN); 879 880 if (is_zero_ether_addr(netdev->dev_addr)) 881 eth_hw_addr_random(netdev); 882 } else { 883 /* SR-IOV VF: get mac from adapter */ 884 ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic, 885 vnic_dev_get_mac_addr, pp->mac_addr); 886 if (err) { 887 netdev_err(netdev, "Error getting mac for vf %d\n", vf); 888 memcpy(pp, &prev_pp, sizeof(*pp)); 889 return enic_dev_status_to_errno(err); 890 } 891 } 892 893 err = enic_process_set_pp_request(enic, vf, &prev_pp, &restore_pp); 894 if (err) { 895 if (restore_pp) { 896 /* Things are still the way they were: Implicit 897 * DISASSOCIATE failed 898 */ 899 memcpy(pp, &prev_pp, sizeof(*pp)); 900 } else { 901 memset(pp, 0, sizeof(*pp)); 902 if (vf == PORT_SELF_VF) 903 eth_zero_addr(netdev->dev_addr); 904 } 905 } else { 906 /* Set flag to indicate that the port assoc/disassoc 907 * request has been sent out to fw 908 */ 909 pp->set |= ENIC_PORT_REQUEST_APPLIED; 910 911 /* If DISASSOCIATE, clean up all assigned/saved macaddresses */ 912 if (pp->request == PORT_REQUEST_DISASSOCIATE) { 913 eth_zero_addr(pp->mac_addr); 914 if (vf == PORT_SELF_VF) 915 eth_zero_addr(netdev->dev_addr); 916 } 917 } 918 919 if (vf == PORT_SELF_VF) 920 eth_zero_addr(pp->vf_mac); 921 922 return err; 923} 924 925static int enic_get_vf_port(struct net_device *netdev, int vf, 926 struct sk_buff *skb) 927{ 928 struct enic *enic = netdev_priv(netdev); 929 u16 response = PORT_PROFILE_RESPONSE_SUCCESS; 930 struct enic_port_profile *pp; 931 int err; 932 933 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 934 if (err) 935 return err; 936 937 if (!(pp->set & ENIC_PORT_REQUEST_APPLIED)) 938 return -ENODATA; 939 940 err = enic_process_get_pp_request(enic, vf, pp->request, &response); 941 if (err) 942 return err; 943 944 if (nla_put_u16(skb, IFLA_PORT_REQUEST, pp->request) || 945 nla_put_u16(skb, IFLA_PORT_RESPONSE, response) || 946 ((pp->set & ENIC_SET_NAME) && 947 nla_put(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX, pp->name)) || 948 ((pp->set & ENIC_SET_INSTANCE) && 949 nla_put(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX, 950 pp->instance_uuid)) || 951 ((pp->set & ENIC_SET_HOST) && 952 nla_put(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX, pp->host_uuid))) 953 goto nla_put_failure; 954 return 0; 955 956nla_put_failure: 957 return -EMSGSIZE; 958} 959 960static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf) 961{ 962 struct enic *enic = vnic_dev_priv(rq->vdev); 963 964 if (!buf->os_buf) 965 return; 966 967 pci_unmap_single(enic->pdev, buf->dma_addr, 968 buf->len, PCI_DMA_FROMDEVICE); 969 dev_kfree_skb_any(buf->os_buf); 970 buf->os_buf = NULL; 971} 972 973static int enic_rq_alloc_buf(struct vnic_rq *rq) 974{ 975 struct enic *enic = vnic_dev_priv(rq->vdev); 976 struct net_device *netdev = enic->netdev; 977 struct sk_buff *skb; 978 unsigned int len = netdev->mtu + VLAN_ETH_HLEN; 979 unsigned int os_buf_index = 0; 980 dma_addr_t dma_addr; 981 struct vnic_rq_buf *buf = rq->to_use; 982 983 if (buf->os_buf) { 984 enic_queue_rq_desc(rq, buf->os_buf, os_buf_index, buf->dma_addr, 985 buf->len); 986 987 return 0; 988 } 989 skb = netdev_alloc_skb_ip_align(netdev, len); 990 if (!skb) 991 return -ENOMEM; 992 993 dma_addr = pci_map_single(enic->pdev, skb->data, len, 994 PCI_DMA_FROMDEVICE); 995 if (unlikely(enic_dma_map_check(enic, dma_addr))) { 996 dev_kfree_skb(skb); 997 return -ENOMEM; 998 } 999 1000 enic_queue_rq_desc(rq, skb, os_buf_index, 1001 dma_addr, len); 1002 1003 return 0; 1004} 1005 1006static void enic_intr_update_pkt_size(struct vnic_rx_bytes_counter *pkt_size, 1007 u32 pkt_len) 1008{ 1009 if (ENIC_LARGE_PKT_THRESHOLD <= pkt_len) 1010 pkt_size->large_pkt_bytes_cnt += pkt_len; 1011 else 1012 pkt_size->small_pkt_bytes_cnt += pkt_len; 1013} 1014 1015static bool enic_rxcopybreak(struct net_device *netdev, struct sk_buff **skb, 1016 struct vnic_rq_buf *buf, u16 len) 1017{ 1018 struct enic *enic = netdev_priv(netdev); 1019 struct sk_buff *new_skb; 1020 1021 if (len > enic->rx_copybreak) 1022 return false; 1023 new_skb = netdev_alloc_skb_ip_align(netdev, len); 1024 if (!new_skb) 1025 return false; 1026 pci_dma_sync_single_for_cpu(enic->pdev, buf->dma_addr, len, 1027 DMA_FROM_DEVICE); 1028 memcpy(new_skb->data, (*skb)->data, len); 1029 *skb = new_skb; 1030 1031 return true; 1032} 1033 1034static void enic_rq_indicate_buf(struct vnic_rq *rq, 1035 struct cq_desc *cq_desc, struct vnic_rq_buf *buf, 1036 int skipped, void *opaque) 1037{ 1038 struct enic *enic = vnic_dev_priv(rq->vdev); 1039 struct net_device *netdev = enic->netdev; 1040 struct sk_buff *skb; 1041 struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)]; 1042 1043 u8 type, color, eop, sop, ingress_port, vlan_stripped; 1044 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof; 1045 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok; 1046 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc; 1047 u8 packet_error; 1048 u16 q_number, completed_index, bytes_written, vlan_tci, checksum; 1049 u32 rss_hash; 1050 1051 if (skipped) 1052 return; 1053 1054 skb = buf->os_buf; 1055 1056 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc, 1057 &type, &color, &q_number, &completed_index, 1058 &ingress_port, &fcoe, &eop, &sop, &rss_type, 1059 &csum_not_calc, &rss_hash, &bytes_written, 1060 &packet_error, &vlan_stripped, &vlan_tci, &checksum, 1061 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error, 1062 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp, 1063 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment, 1064 &fcs_ok); 1065 1066 if (packet_error) { 1067 1068 if (!fcs_ok) { 1069 if (bytes_written > 0) 1070 enic->rq_bad_fcs++; 1071 else if (bytes_written == 0) 1072 enic->rq_truncated_pkts++; 1073 } 1074 1075 pci_unmap_single(enic->pdev, buf->dma_addr, buf->len, 1076 PCI_DMA_FROMDEVICE); 1077 dev_kfree_skb_any(skb); 1078 buf->os_buf = NULL; 1079 1080 return; 1081 } 1082 1083 if (eop && bytes_written > 0) { 1084 1085 /* Good receive 1086 */ 1087 1088 if (!enic_rxcopybreak(netdev, &skb, buf, bytes_written)) { 1089 buf->os_buf = NULL; 1090 pci_unmap_single(enic->pdev, buf->dma_addr, buf->len, 1091 PCI_DMA_FROMDEVICE); 1092 } 1093 prefetch(skb->data - NET_IP_ALIGN); 1094 1095 skb_put(skb, bytes_written); 1096 skb->protocol = eth_type_trans(skb, netdev); 1097 skb_record_rx_queue(skb, q_number); 1098 if (netdev->features & NETIF_F_RXHASH) { 1099 skb_set_hash(skb, rss_hash, 1100 (rss_type & 1101 (NIC_CFG_RSS_HASH_TYPE_TCP_IPV6_EX | 1102 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6 | 1103 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4)) ? 1104 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3); 1105 } 1106 1107 /* Hardware does not provide whole packet checksum. It only 1108 * provides pseudo checksum. Since hw validates the packet 1109 * checksum but not provide us the checksum value. use 1110 * CHECSUM_UNNECESSARY. 1111 */ 1112 if ((netdev->features & NETIF_F_RXCSUM) && tcp_udp_csum_ok && 1113 ipv4_csum_ok) 1114 skb->ip_summed = CHECKSUM_UNNECESSARY; 1115 1116 if (vlan_stripped) 1117 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tci); 1118 1119 skb_mark_napi_id(skb, &enic->napi[rq->index]); 1120 if (enic_poll_busy_polling(rq) || 1121 !(netdev->features & NETIF_F_GRO)) 1122 netif_receive_skb(skb); 1123 else 1124 napi_gro_receive(&enic->napi[q_number], skb); 1125 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1126 enic_intr_update_pkt_size(&cq->pkt_size_counter, 1127 bytes_written); 1128 } else { 1129 1130 /* Buffer overflow 1131 */ 1132 1133 pci_unmap_single(enic->pdev, buf->dma_addr, buf->len, 1134 PCI_DMA_FROMDEVICE); 1135 dev_kfree_skb_any(skb); 1136 buf->os_buf = NULL; 1137 } 1138} 1139 1140static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc, 1141 u8 type, u16 q_number, u16 completed_index, void *opaque) 1142{ 1143 struct enic *enic = vnic_dev_priv(vdev); 1144 1145 vnic_rq_service(&enic->rq[q_number], cq_desc, 1146 completed_index, VNIC_RQ_RETURN_DESC, 1147 enic_rq_indicate_buf, opaque); 1148 1149 return 0; 1150} 1151 1152static int enic_poll(struct napi_struct *napi, int budget) 1153{ 1154 struct net_device *netdev = napi->dev; 1155 struct enic *enic = netdev_priv(netdev); 1156 unsigned int cq_rq = enic_cq_rq(enic, 0); 1157 unsigned int cq_wq = enic_cq_wq(enic, 0); 1158 unsigned int intr = enic_legacy_io_intr(); 1159 unsigned int rq_work_to_do = budget; 1160 unsigned int wq_work_to_do = -1; /* no limit */ 1161 unsigned int work_done, rq_work_done = 0, wq_work_done; 1162 int err; 1163 1164 wq_work_done = vnic_cq_service(&enic->cq[cq_wq], wq_work_to_do, 1165 enic_wq_service, NULL); 1166 1167 if (!enic_poll_lock_napi(&enic->rq[cq_rq])) { 1168 if (wq_work_done > 0) 1169 vnic_intr_return_credits(&enic->intr[intr], 1170 wq_work_done, 1171 0 /* dont unmask intr */, 1172 0 /* dont reset intr timer */); 1173 return rq_work_done; 1174 } 1175 1176 if (budget > 0) 1177 rq_work_done = vnic_cq_service(&enic->cq[cq_rq], 1178 rq_work_to_do, enic_rq_service, NULL); 1179 1180 /* Accumulate intr event credits for this polling 1181 * cycle. An intr event is the completion of a 1182 * a WQ or RQ packet. 1183 */ 1184 1185 work_done = rq_work_done + wq_work_done; 1186 1187 if (work_done > 0) 1188 vnic_intr_return_credits(&enic->intr[intr], 1189 work_done, 1190 0 /* don't unmask intr */, 1191 0 /* don't reset intr timer */); 1192 1193 err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf); 1194 1195 /* Buffer allocation failed. Stay in polling 1196 * mode so we can try to fill the ring again. 1197 */ 1198 1199 if (err) 1200 rq_work_done = rq_work_to_do; 1201 1202 if (rq_work_done < rq_work_to_do) { 1203 1204 /* Some work done, but not enough to stay in polling, 1205 * exit polling 1206 */ 1207 1208 napi_complete(napi); 1209 vnic_intr_unmask(&enic->intr[intr]); 1210 } 1211 enic_poll_unlock_napi(&enic->rq[cq_rq]); 1212 1213 return rq_work_done; 1214} 1215 1216static void enic_set_int_moderation(struct enic *enic, struct vnic_rq *rq) 1217{ 1218 unsigned int intr = enic_msix_rq_intr(enic, rq->index); 1219 struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)]; 1220 u32 timer = cq->tobe_rx_coal_timeval; 1221 1222 if (cq->tobe_rx_coal_timeval != cq->cur_rx_coal_timeval) { 1223 vnic_intr_coalescing_timer_set(&enic->intr[intr], timer); 1224 cq->cur_rx_coal_timeval = cq->tobe_rx_coal_timeval; 1225 } 1226} 1227 1228static void enic_calc_int_moderation(struct enic *enic, struct vnic_rq *rq) 1229{ 1230 struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting; 1231 struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)]; 1232 struct vnic_rx_bytes_counter *pkt_size_counter = &cq->pkt_size_counter; 1233 int index; 1234 u32 timer; 1235 u32 range_start; 1236 u32 traffic; 1237 u64 delta; 1238 ktime_t now = ktime_get(); 1239 1240 delta = ktime_us_delta(now, cq->prev_ts); 1241 if (delta < ENIC_AIC_TS_BREAK) 1242 return; 1243 cq->prev_ts = now; 1244 1245 traffic = pkt_size_counter->large_pkt_bytes_cnt + 1246 pkt_size_counter->small_pkt_bytes_cnt; 1247 /* The table takes Mbps 1248 * traffic *= 8 => bits 1249 * traffic *= (10^6 / delta) => bps 1250 * traffic /= 10^6 => Mbps 1251 * 1252 * Combining, traffic *= (8 / delta) 1253 */ 1254 1255 traffic <<= 3; 1256 traffic = delta > UINT_MAX ? 0 : traffic / (u32)delta; 1257 1258 for (index = 0; index < ENIC_MAX_COALESCE_TIMERS; index++) 1259 if (traffic < mod_table[index].rx_rate) 1260 break; 1261 range_start = (pkt_size_counter->small_pkt_bytes_cnt > 1262 pkt_size_counter->large_pkt_bytes_cnt << 1) ? 1263 rx_coal->small_pkt_range_start : 1264 rx_coal->large_pkt_range_start; 1265 timer = range_start + ((rx_coal->range_end - range_start) * 1266 mod_table[index].range_percent / 100); 1267 /* Damping */ 1268 cq->tobe_rx_coal_timeval = (timer + cq->tobe_rx_coal_timeval) >> 1; 1269 1270 pkt_size_counter->large_pkt_bytes_cnt = 0; 1271 pkt_size_counter->small_pkt_bytes_cnt = 0; 1272} 1273 1274#ifdef CONFIG_RFS_ACCEL 1275static void enic_free_rx_cpu_rmap(struct enic *enic) 1276{ 1277 free_irq_cpu_rmap(enic->netdev->rx_cpu_rmap); 1278 enic->netdev->rx_cpu_rmap = NULL; 1279} 1280 1281static void enic_set_rx_cpu_rmap(struct enic *enic) 1282{ 1283 int i, res; 1284 1285 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) { 1286 enic->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(enic->rq_count); 1287 if (unlikely(!enic->netdev->rx_cpu_rmap)) 1288 return; 1289 for (i = 0; i < enic->rq_count; i++) { 1290 res = irq_cpu_rmap_add(enic->netdev->rx_cpu_rmap, 1291 enic->msix_entry[i].vector); 1292 if (unlikely(res)) { 1293 enic_free_rx_cpu_rmap(enic); 1294 return; 1295 } 1296 } 1297 } 1298} 1299 1300#else 1301 1302static void enic_free_rx_cpu_rmap(struct enic *enic) 1303{ 1304} 1305 1306static void enic_set_rx_cpu_rmap(struct enic *enic) 1307{ 1308} 1309 1310#endif /* CONFIG_RFS_ACCEL */ 1311 1312#ifdef CONFIG_NET_RX_BUSY_POLL 1313static int enic_busy_poll(struct napi_struct *napi) 1314{ 1315 struct net_device *netdev = napi->dev; 1316 struct enic *enic = netdev_priv(netdev); 1317 unsigned int rq = (napi - &enic->napi[0]); 1318 unsigned int cq = enic_cq_rq(enic, rq); 1319 unsigned int intr = enic_msix_rq_intr(enic, rq); 1320 unsigned int work_to_do = -1; /* clean all pkts possible */ 1321 unsigned int work_done; 1322 1323 if (!enic_poll_lock_poll(&enic->rq[rq])) 1324 return LL_FLUSH_BUSY; 1325 work_done = vnic_cq_service(&enic->cq[cq], work_to_do, 1326 enic_rq_service, NULL); 1327 1328 if (work_done > 0) 1329 vnic_intr_return_credits(&enic->intr[intr], 1330 work_done, 0, 0); 1331 vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf); 1332 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1333 enic_calc_int_moderation(enic, &enic->rq[rq]); 1334 enic_poll_unlock_poll(&enic->rq[rq]); 1335 1336 return work_done; 1337} 1338#endif /* CONFIG_NET_RX_BUSY_POLL */ 1339 1340static int enic_poll_msix_wq(struct napi_struct *napi, int budget) 1341{ 1342 struct net_device *netdev = napi->dev; 1343 struct enic *enic = netdev_priv(netdev); 1344 unsigned int wq_index = (napi - &enic->napi[0]) - enic->rq_count; 1345 struct vnic_wq *wq = &enic->wq[wq_index]; 1346 unsigned int cq; 1347 unsigned int intr; 1348 unsigned int wq_work_to_do = -1; /* clean all desc possible */ 1349 unsigned int wq_work_done; 1350 unsigned int wq_irq; 1351 1352 wq_irq = wq->index; 1353 cq = enic_cq_wq(enic, wq_irq); 1354 intr = enic_msix_wq_intr(enic, wq_irq); 1355 wq_work_done = vnic_cq_service(&enic->cq[cq], wq_work_to_do, 1356 enic_wq_service, NULL); 1357 1358 vnic_intr_return_credits(&enic->intr[intr], wq_work_done, 1359 0 /* don't unmask intr */, 1360 1 /* reset intr timer */); 1361 if (!wq_work_done) { 1362 napi_complete(napi); 1363 vnic_intr_unmask(&enic->intr[intr]); 1364 return 0; 1365 } 1366 1367 return budget; 1368} 1369 1370static int enic_poll_msix_rq(struct napi_struct *napi, int budget) 1371{ 1372 struct net_device *netdev = napi->dev; 1373 struct enic *enic = netdev_priv(netdev); 1374 unsigned int rq = (napi - &enic->napi[0]); 1375 unsigned int cq = enic_cq_rq(enic, rq); 1376 unsigned int intr = enic_msix_rq_intr(enic, rq); 1377 unsigned int work_to_do = budget; 1378 unsigned int work_done = 0; 1379 int err; 1380 1381 if (!enic_poll_lock_napi(&enic->rq[rq])) 1382 return budget; 1383 /* Service RQ 1384 */ 1385 1386 if (budget > 0) 1387 work_done = vnic_cq_service(&enic->cq[cq], 1388 work_to_do, enic_rq_service, NULL); 1389 1390 /* Return intr event credits for this polling 1391 * cycle. An intr event is the completion of a 1392 * RQ packet. 1393 */ 1394 1395 if (work_done > 0) 1396 vnic_intr_return_credits(&enic->intr[intr], 1397 work_done, 1398 0 /* don't unmask intr */, 1399 0 /* don't reset intr timer */); 1400 1401 err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf); 1402 1403 /* Buffer allocation failed. Stay in polling mode 1404 * so we can try to fill the ring again. 1405 */ 1406 1407 if (err) 1408 work_done = work_to_do; 1409 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1410 /* Call the function which refreshes 1411 * the intr coalescing timer value based on 1412 * the traffic. This is supported only in 1413 * the case of MSI-x mode 1414 */ 1415 enic_calc_int_moderation(enic, &enic->rq[rq]); 1416 1417 enic_poll_unlock_napi(&enic->rq[rq]); 1418 if (work_done < work_to_do) { 1419 1420 /* Some work done, but not enough to stay in polling, 1421 * exit polling 1422 */ 1423 1424 napi_complete(napi); 1425 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1426 enic_set_int_moderation(enic, &enic->rq[rq]); 1427 vnic_intr_unmask(&enic->intr[intr]); 1428 } 1429 1430 return work_done; 1431} 1432 1433static void enic_notify_timer(unsigned long data) 1434{ 1435 struct enic *enic = (struct enic *)data; 1436 1437 enic_notify_check(enic); 1438 1439 mod_timer(&enic->notify_timer, 1440 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD)); 1441} 1442 1443static void enic_free_intr(struct enic *enic) 1444{ 1445 struct net_device *netdev = enic->netdev; 1446 unsigned int i; 1447 1448 enic_free_rx_cpu_rmap(enic); 1449 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1450 case VNIC_DEV_INTR_MODE_INTX: 1451 free_irq(enic->pdev->irq, netdev); 1452 break; 1453 case VNIC_DEV_INTR_MODE_MSI: 1454 free_irq(enic->pdev->irq, enic); 1455 break; 1456 case VNIC_DEV_INTR_MODE_MSIX: 1457 for (i = 0; i < ARRAY_SIZE(enic->msix); i++) 1458 if (enic->msix[i].requested) 1459 free_irq(enic->msix_entry[i].vector, 1460 enic->msix[i].devid); 1461 break; 1462 default: 1463 break; 1464 } 1465} 1466 1467static int enic_request_intr(struct enic *enic) 1468{ 1469 struct net_device *netdev = enic->netdev; 1470 unsigned int i, intr; 1471 int err = 0; 1472 1473 enic_set_rx_cpu_rmap(enic); 1474 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1475 1476 case VNIC_DEV_INTR_MODE_INTX: 1477 1478 err = request_irq(enic->pdev->irq, enic_isr_legacy, 1479 IRQF_SHARED, netdev->name, netdev); 1480 break; 1481 1482 case VNIC_DEV_INTR_MODE_MSI: 1483 1484 err = request_irq(enic->pdev->irq, enic_isr_msi, 1485 0, netdev->name, enic); 1486 break; 1487 1488 case VNIC_DEV_INTR_MODE_MSIX: 1489 1490 for (i = 0; i < enic->rq_count; i++) { 1491 intr = enic_msix_rq_intr(enic, i); 1492 snprintf(enic->msix[intr].devname, 1493 sizeof(enic->msix[intr].devname), 1494 "%.11s-rx-%d", netdev->name, i); 1495 enic->msix[intr].isr = enic_isr_msix; 1496 enic->msix[intr].devid = &enic->napi[i]; 1497 } 1498 1499 for (i = 0; i < enic->wq_count; i++) { 1500 int wq = enic_cq_wq(enic, i); 1501 1502 intr = enic_msix_wq_intr(enic, i); 1503 snprintf(enic->msix[intr].devname, 1504 sizeof(enic->msix[intr].devname), 1505 "%.11s-tx-%d", netdev->name, i); 1506 enic->msix[intr].isr = enic_isr_msix; 1507 enic->msix[intr].devid = &enic->napi[wq]; 1508 } 1509 1510 intr = enic_msix_err_intr(enic); 1511 snprintf(enic->msix[intr].devname, 1512 sizeof(enic->msix[intr].devname), 1513 "%.11s-err", netdev->name); 1514 enic->msix[intr].isr = enic_isr_msix_err; 1515 enic->msix[intr].devid = enic; 1516 1517 intr = enic_msix_notify_intr(enic); 1518 snprintf(enic->msix[intr].devname, 1519 sizeof(enic->msix[intr].devname), 1520 "%.11s-notify", netdev->name); 1521 enic->msix[intr].isr = enic_isr_msix_notify; 1522 enic->msix[intr].devid = enic; 1523 1524 for (i = 0; i < ARRAY_SIZE(enic->msix); i++) 1525 enic->msix[i].requested = 0; 1526 1527 for (i = 0; i < enic->intr_count; i++) { 1528 err = request_irq(enic->msix_entry[i].vector, 1529 enic->msix[i].isr, 0, 1530 enic->msix[i].devname, 1531 enic->msix[i].devid); 1532 if (err) { 1533 enic_free_intr(enic); 1534 break; 1535 } 1536 enic->msix[i].requested = 1; 1537 } 1538 1539 break; 1540 1541 default: 1542 break; 1543 } 1544 1545 return err; 1546} 1547 1548static void enic_synchronize_irqs(struct enic *enic) 1549{ 1550 unsigned int i; 1551 1552 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1553 case VNIC_DEV_INTR_MODE_INTX: 1554 case VNIC_DEV_INTR_MODE_MSI: 1555 synchronize_irq(enic->pdev->irq); 1556 break; 1557 case VNIC_DEV_INTR_MODE_MSIX: 1558 for (i = 0; i < enic->intr_count; i++) 1559 synchronize_irq(enic->msix_entry[i].vector); 1560 break; 1561 default: 1562 break; 1563 } 1564} 1565 1566static void enic_set_rx_coal_setting(struct enic *enic) 1567{ 1568 unsigned int speed; 1569 int index = -1; 1570 struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting; 1571 1572 /* If intr mode is not MSIX, do not do adaptive coalescing */ 1573 if (VNIC_DEV_INTR_MODE_MSIX != vnic_dev_get_intr_mode(enic->vdev)) { 1574 netdev_info(enic->netdev, "INTR mode is not MSIX, Not initializing adaptive coalescing"); 1575 return; 1576 } 1577 1578 /* 1. Read the link speed from fw 1579 * 2. Pick the default range for the speed 1580 * 3. Update it in enic->rx_coalesce_setting 1581 */ 1582 speed = vnic_dev_port_speed(enic->vdev); 1583 if (ENIC_LINK_SPEED_10G < speed) 1584 index = ENIC_LINK_40G_INDEX; 1585 else if (ENIC_LINK_SPEED_4G < speed) 1586 index = ENIC_LINK_10G_INDEX; 1587 else 1588 index = ENIC_LINK_4G_INDEX; 1589 1590 rx_coal->small_pkt_range_start = mod_range[index].small_pkt_range_start; 1591 rx_coal->large_pkt_range_start = mod_range[index].large_pkt_range_start; 1592 rx_coal->range_end = ENIC_RX_COALESCE_RANGE_END; 1593 1594 /* Start with the value provided by UCSM */ 1595 for (index = 0; index < enic->rq_count; index++) 1596 enic->cq[index].cur_rx_coal_timeval = 1597 enic->config.intr_timer_usec; 1598 1599 rx_coal->use_adaptive_rx_coalesce = 1; 1600} 1601 1602static int enic_dev_notify_set(struct enic *enic) 1603{ 1604 int err; 1605 1606 spin_lock_bh(&enic->devcmd_lock); 1607 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1608 case VNIC_DEV_INTR_MODE_INTX: 1609 err = vnic_dev_notify_set(enic->vdev, 1610 enic_legacy_notify_intr()); 1611 break; 1612 case VNIC_DEV_INTR_MODE_MSIX: 1613 err = vnic_dev_notify_set(enic->vdev, 1614 enic_msix_notify_intr(enic)); 1615 break; 1616 default: 1617 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */); 1618 break; 1619 } 1620 spin_unlock_bh(&enic->devcmd_lock); 1621 1622 return err; 1623} 1624 1625static void enic_notify_timer_start(struct enic *enic) 1626{ 1627 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1628 case VNIC_DEV_INTR_MODE_MSI: 1629 mod_timer(&enic->notify_timer, jiffies); 1630 break; 1631 default: 1632 /* Using intr for notification for INTx/MSI-X */ 1633 break; 1634 } 1635} 1636 1637/* rtnl lock is held, process context */ 1638static int enic_open(struct net_device *netdev) 1639{ 1640 struct enic *enic = netdev_priv(netdev); 1641 unsigned int i; 1642 int err; 1643 1644 err = enic_request_intr(enic); 1645 if (err) { 1646 netdev_err(netdev, "Unable to request irq.\n"); 1647 return err; 1648 } 1649 1650 err = enic_dev_notify_set(enic); 1651 if (err) { 1652 netdev_err(netdev, 1653 "Failed to alloc notify buffer, aborting.\n"); 1654 goto err_out_free_intr; 1655 } 1656 1657 for (i = 0; i < enic->rq_count; i++) { 1658 vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf); 1659 /* Need at least one buffer on ring to get going */ 1660 if (vnic_rq_desc_used(&enic->rq[i]) == 0) { 1661 netdev_err(netdev, "Unable to alloc receive buffers\n"); 1662 err = -ENOMEM; 1663 goto err_out_free_rq; 1664 } 1665 } 1666 1667 for (i = 0; i < enic->wq_count; i++) 1668 vnic_wq_enable(&enic->wq[i]); 1669 for (i = 0; i < enic->rq_count; i++) 1670 vnic_rq_enable(&enic->rq[i]); 1671 1672 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic)) 1673 enic_dev_add_station_addr(enic); 1674 1675 enic_set_rx_mode(netdev); 1676 1677 netif_tx_wake_all_queues(netdev); 1678 1679 for (i = 0; i < enic->rq_count; i++) { 1680 enic_busy_poll_init_lock(&enic->rq[i]); 1681 napi_enable(&enic->napi[i]); 1682 } 1683 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) 1684 for (i = 0; i < enic->wq_count; i++) 1685 napi_enable(&enic->napi[enic_cq_wq(enic, i)]); 1686 enic_dev_enable(enic); 1687 1688 for (i = 0; i < enic->intr_count; i++) 1689 vnic_intr_unmask(&enic->intr[i]); 1690 1691 enic_notify_timer_start(enic); 1692 enic_rfs_flw_tbl_init(enic); 1693 1694 return 0; 1695 1696err_out_free_rq: 1697 for (i = 0; i < enic->rq_count; i++) 1698 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf); 1699 enic_dev_notify_unset(enic); 1700err_out_free_intr: 1701 enic_free_intr(enic); 1702 1703 return err; 1704} 1705 1706/* rtnl lock is held, process context */ 1707static int enic_stop(struct net_device *netdev) 1708{ 1709 struct enic *enic = netdev_priv(netdev); 1710 unsigned int i; 1711 int err; 1712 1713 for (i = 0; i < enic->intr_count; i++) { 1714 vnic_intr_mask(&enic->intr[i]); 1715 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */ 1716 } 1717 1718 enic_synchronize_irqs(enic); 1719 1720 del_timer_sync(&enic->notify_timer); 1721 enic_rfs_flw_tbl_free(enic); 1722 1723 enic_dev_disable(enic); 1724 1725 for (i = 0; i < enic->rq_count; i++) { 1726 napi_disable(&enic->napi[i]); 1727 local_bh_disable(); 1728 while (!enic_poll_lock_napi(&enic->rq[i])) 1729 mdelay(1); 1730 local_bh_enable(); 1731 } 1732 1733 netif_carrier_off(netdev); 1734 netif_tx_disable(netdev); 1735 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) 1736 for (i = 0; i < enic->wq_count; i++) 1737 napi_disable(&enic->napi[enic_cq_wq(enic, i)]); 1738 1739 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic)) 1740 enic_dev_del_station_addr(enic); 1741 1742 for (i = 0; i < enic->wq_count; i++) { 1743 err = vnic_wq_disable(&enic->wq[i]); 1744 if (err) 1745 return err; 1746 } 1747 for (i = 0; i < enic->rq_count; i++) { 1748 err = vnic_rq_disable(&enic->rq[i]); 1749 if (err) 1750 return err; 1751 } 1752 1753 enic_dev_notify_unset(enic); 1754 enic_free_intr(enic); 1755 1756 for (i = 0; i < enic->wq_count; i++) 1757 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf); 1758 for (i = 0; i < enic->rq_count; i++) 1759 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf); 1760 for (i = 0; i < enic->cq_count; i++) 1761 vnic_cq_clean(&enic->cq[i]); 1762 for (i = 0; i < enic->intr_count; i++) 1763 vnic_intr_clean(&enic->intr[i]); 1764 1765 return 0; 1766} 1767 1768static int enic_change_mtu(struct net_device *netdev, int new_mtu) 1769{ 1770 struct enic *enic = netdev_priv(netdev); 1771 int running = netif_running(netdev); 1772 1773 if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU) 1774 return -EINVAL; 1775 1776 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) 1777 return -EOPNOTSUPP; 1778 1779 if (running) 1780 enic_stop(netdev); 1781 1782 netdev->mtu = new_mtu; 1783 1784 if (netdev->mtu > enic->port_mtu) 1785 netdev_warn(netdev, 1786 "interface MTU (%d) set higher than port MTU (%d)\n", 1787 netdev->mtu, enic->port_mtu); 1788 1789 if (running) 1790 enic_open(netdev); 1791 1792 return 0; 1793} 1794 1795static void enic_change_mtu_work(struct work_struct *work) 1796{ 1797 struct enic *enic = container_of(work, struct enic, change_mtu_work); 1798 struct net_device *netdev = enic->netdev; 1799 int new_mtu = vnic_dev_mtu(enic->vdev); 1800 int err; 1801 unsigned int i; 1802 1803 new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu)); 1804 1805 rtnl_lock(); 1806 1807 /* Stop RQ */ 1808 del_timer_sync(&enic->notify_timer); 1809 1810 for (i = 0; i < enic->rq_count; i++) 1811 napi_disable(&enic->napi[i]); 1812 1813 vnic_intr_mask(&enic->intr[0]); 1814 enic_synchronize_irqs(enic); 1815 err = vnic_rq_disable(&enic->rq[0]); 1816 if (err) { 1817 rtnl_unlock(); 1818 netdev_err(netdev, "Unable to disable RQ.\n"); 1819 return; 1820 } 1821 vnic_rq_clean(&enic->rq[0], enic_free_rq_buf); 1822 vnic_cq_clean(&enic->cq[0]); 1823 vnic_intr_clean(&enic->intr[0]); 1824 1825 /* Fill RQ with new_mtu-sized buffers */ 1826 netdev->mtu = new_mtu; 1827 vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf); 1828 /* Need at least one buffer on ring to get going */ 1829 if (vnic_rq_desc_used(&enic->rq[0]) == 0) { 1830 rtnl_unlock(); 1831 netdev_err(netdev, "Unable to alloc receive buffers.\n"); 1832 return; 1833 } 1834 1835 /* Start RQ */ 1836 vnic_rq_enable(&enic->rq[0]); 1837 napi_enable(&enic->napi[0]); 1838 vnic_intr_unmask(&enic->intr[0]); 1839 enic_notify_timer_start(enic); 1840 1841 rtnl_unlock(); 1842 1843 netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu); 1844} 1845 1846#ifdef CONFIG_NET_POLL_CONTROLLER 1847static void enic_poll_controller(struct net_device *netdev) 1848{ 1849 struct enic *enic = netdev_priv(netdev); 1850 struct vnic_dev *vdev = enic->vdev; 1851 unsigned int i, intr; 1852 1853 switch (vnic_dev_get_intr_mode(vdev)) { 1854 case VNIC_DEV_INTR_MODE_MSIX: 1855 for (i = 0; i < enic->rq_count; i++) { 1856 intr = enic_msix_rq_intr(enic, i); 1857 enic_isr_msix(enic->msix_entry[intr].vector, 1858 &enic->napi[i]); 1859 } 1860 1861 for (i = 0; i < enic->wq_count; i++) { 1862 intr = enic_msix_wq_intr(enic, i); 1863 enic_isr_msix(enic->msix_entry[intr].vector, 1864 &enic->napi[enic_cq_wq(enic, i)]); 1865 } 1866 1867 break; 1868 case VNIC_DEV_INTR_MODE_MSI: 1869 enic_isr_msi(enic->pdev->irq, enic); 1870 break; 1871 case VNIC_DEV_INTR_MODE_INTX: 1872 enic_isr_legacy(enic->pdev->irq, netdev); 1873 break; 1874 default: 1875 break; 1876 } 1877} 1878#endif 1879 1880static int enic_dev_wait(struct vnic_dev *vdev, 1881 int (*start)(struct vnic_dev *, int), 1882 int (*finished)(struct vnic_dev *, int *), 1883 int arg) 1884{ 1885 unsigned long time; 1886 int done; 1887 int err; 1888 1889 BUG_ON(in_interrupt()); 1890 1891 err = start(vdev, arg); 1892 if (err) 1893 return err; 1894 1895 /* Wait for func to complete...2 seconds max 1896 */ 1897 1898 time = jiffies + (HZ * 2); 1899 do { 1900 1901 err = finished(vdev, &done); 1902 if (err) 1903 return err; 1904 1905 if (done) 1906 return 0; 1907 1908 schedule_timeout_uninterruptible(HZ / 10); 1909 1910 } while (time_after(time, jiffies)); 1911 1912 return -ETIMEDOUT; 1913} 1914 1915static int enic_dev_open(struct enic *enic) 1916{ 1917 int err; 1918 1919 err = enic_dev_wait(enic->vdev, vnic_dev_open, 1920 vnic_dev_open_done, 0); 1921 if (err) 1922 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n", 1923 err); 1924 1925 return err; 1926} 1927 1928static int enic_dev_hang_reset(struct enic *enic) 1929{ 1930 int err; 1931 1932 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset, 1933 vnic_dev_hang_reset_done, 0); 1934 if (err) 1935 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n", 1936 err); 1937 1938 return err; 1939} 1940 1941int __enic_set_rsskey(struct enic *enic) 1942{ 1943 union vnic_rss_key *rss_key_buf_va; 1944 dma_addr_t rss_key_buf_pa; 1945 int i, kidx, bidx, err; 1946 1947 rss_key_buf_va = pci_zalloc_consistent(enic->pdev, 1948 sizeof(union vnic_rss_key), 1949 &rss_key_buf_pa); 1950 if (!rss_key_buf_va) 1951 return -ENOMEM; 1952 1953 for (i = 0; i < ENIC_RSS_LEN; i++) { 1954 kidx = i / ENIC_RSS_BYTES_PER_KEY; 1955 bidx = i % ENIC_RSS_BYTES_PER_KEY; 1956 rss_key_buf_va->key[kidx].b[bidx] = enic->rss_key[i]; 1957 } 1958 spin_lock_bh(&enic->devcmd_lock); 1959 err = enic_set_rss_key(enic, 1960 rss_key_buf_pa, 1961 sizeof(union vnic_rss_key)); 1962 spin_unlock_bh(&enic->devcmd_lock); 1963 1964 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key), 1965 rss_key_buf_va, rss_key_buf_pa); 1966 1967 return err; 1968} 1969 1970static int enic_set_rsskey(struct enic *enic) 1971{ 1972 netdev_rss_key_fill(enic->rss_key, ENIC_RSS_LEN); 1973 1974 return __enic_set_rsskey(enic); 1975} 1976 1977static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits) 1978{ 1979 dma_addr_t rss_cpu_buf_pa; 1980 union vnic_rss_cpu *rss_cpu_buf_va = NULL; 1981 unsigned int i; 1982 int err; 1983 1984 rss_cpu_buf_va = pci_alloc_consistent(enic->pdev, 1985 sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa); 1986 if (!rss_cpu_buf_va) 1987 return -ENOMEM; 1988 1989 for (i = 0; i < (1 << rss_hash_bits); i++) 1990 (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count; 1991 1992 spin_lock_bh(&enic->devcmd_lock); 1993 err = enic_set_rss_cpu(enic, 1994 rss_cpu_buf_pa, 1995 sizeof(union vnic_rss_cpu)); 1996 spin_unlock_bh(&enic->devcmd_lock); 1997 1998 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu), 1999 rss_cpu_buf_va, rss_cpu_buf_pa); 2000 2001 return err; 2002} 2003 2004static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu, 2005 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable) 2006{ 2007 const u8 tso_ipid_split_en = 0; 2008 const u8 ig_vlan_strip_en = 1; 2009 int err; 2010 2011 /* Enable VLAN tag stripping. 2012 */ 2013 2014 spin_lock_bh(&enic->devcmd_lock); 2015 err = enic_set_nic_cfg(enic, 2016 rss_default_cpu, rss_hash_type, 2017 rss_hash_bits, rss_base_cpu, 2018 rss_enable, tso_ipid_split_en, 2019 ig_vlan_strip_en); 2020 spin_unlock_bh(&enic->devcmd_lock); 2021 2022 return err; 2023} 2024 2025static int enic_set_rss_nic_cfg(struct enic *enic) 2026{ 2027 struct device *dev = enic_get_dev(enic); 2028 const u8 rss_default_cpu = 0; 2029 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 | 2030 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 | 2031 NIC_CFG_RSS_HASH_TYPE_IPV6 | 2032 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6; 2033 const u8 rss_hash_bits = 7; 2034 const u8 rss_base_cpu = 0; 2035 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1); 2036 2037 if (rss_enable) { 2038 if (!enic_set_rsskey(enic)) { 2039 if (enic_set_rsscpu(enic, rss_hash_bits)) { 2040 rss_enable = 0; 2041 dev_warn(dev, "RSS disabled, " 2042 "Failed to set RSS cpu indirection table."); 2043 } 2044 } else { 2045 rss_enable = 0; 2046 dev_warn(dev, "RSS disabled, Failed to set RSS key.\n"); 2047 } 2048 } 2049 2050 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type, 2051 rss_hash_bits, rss_base_cpu, rss_enable); 2052} 2053 2054static void enic_reset(struct work_struct *work) 2055{ 2056 struct enic *enic = container_of(work, struct enic, reset); 2057 2058 if (!netif_running(enic->netdev)) 2059 return; 2060 2061 rtnl_lock(); 2062 2063 spin_lock(&enic->enic_api_lock); 2064 enic_dev_hang_notify(enic); 2065 enic_stop(enic->netdev); 2066 enic_dev_hang_reset(enic); 2067 enic_reset_addr_lists(enic); 2068 enic_init_vnic_resources(enic); 2069 enic_set_rss_nic_cfg(enic); 2070 enic_dev_set_ig_vlan_rewrite_mode(enic); 2071 enic_open(enic->netdev); 2072 spin_unlock(&enic->enic_api_lock); 2073 call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev); 2074 2075 rtnl_unlock(); 2076} 2077 2078static int enic_set_intr_mode(struct enic *enic) 2079{ 2080 unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX); 2081 unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX); 2082 unsigned int i; 2083 2084 /* Set interrupt mode (INTx, MSI, MSI-X) depending 2085 * on system capabilities. 2086 * 2087 * Try MSI-X first 2088 * 2089 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs 2090 * (the second to last INTR is used for WQ/RQ errors) 2091 * (the last INTR is used for notifications) 2092 */ 2093 2094 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2); 2095 for (i = 0; i < n + m + 2; i++) 2096 enic->msix_entry[i].entry = i; 2097 2098 /* Use multiple RQs if RSS is enabled 2099 */ 2100 2101 if (ENIC_SETTING(enic, RSS) && 2102 enic->config.intr_mode < 1 && 2103 enic->rq_count >= n && 2104 enic->wq_count >= m && 2105 enic->cq_count >= n + m && 2106 enic->intr_count >= n + m + 2) { 2107 2108 if (pci_enable_msix_range(enic->pdev, enic->msix_entry, 2109 n + m + 2, n + m + 2) > 0) { 2110 2111 enic->rq_count = n; 2112 enic->wq_count = m; 2113 enic->cq_count = n + m; 2114 enic->intr_count = n + m + 2; 2115 2116 vnic_dev_set_intr_mode(enic->vdev, 2117 VNIC_DEV_INTR_MODE_MSIX); 2118 2119 return 0; 2120 } 2121 } 2122 2123 if (enic->config.intr_mode < 1 && 2124 enic->rq_count >= 1 && 2125 enic->wq_count >= m && 2126 enic->cq_count >= 1 + m && 2127 enic->intr_count >= 1 + m + 2) { 2128 if (pci_enable_msix_range(enic->pdev, enic->msix_entry, 2129 1 + m + 2, 1 + m + 2) > 0) { 2130 2131 enic->rq_count = 1; 2132 enic->wq_count = m; 2133 enic->cq_count = 1 + m; 2134 enic->intr_count = 1 + m + 2; 2135 2136 vnic_dev_set_intr_mode(enic->vdev, 2137 VNIC_DEV_INTR_MODE_MSIX); 2138 2139 return 0; 2140 } 2141 } 2142 2143 /* Next try MSI 2144 * 2145 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR 2146 */ 2147 2148 if (enic->config.intr_mode < 2 && 2149 enic->rq_count >= 1 && 2150 enic->wq_count >= 1 && 2151 enic->cq_count >= 2 && 2152 enic->intr_count >= 1 && 2153 !pci_enable_msi(enic->pdev)) { 2154 2155 enic->rq_count = 1; 2156 enic->wq_count = 1; 2157 enic->cq_count = 2; 2158 enic->intr_count = 1; 2159 2160 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI); 2161 2162 return 0; 2163 } 2164 2165 /* Next try INTx 2166 * 2167 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs 2168 * (the first INTR is used for WQ/RQ) 2169 * (the second INTR is used for WQ/RQ errors) 2170 * (the last INTR is used for notifications) 2171 */ 2172 2173 if (enic->config.intr_mode < 3 && 2174 enic->rq_count >= 1 && 2175 enic->wq_count >= 1 && 2176 enic->cq_count >= 2 && 2177 enic->intr_count >= 3) { 2178 2179 enic->rq_count = 1; 2180 enic->wq_count = 1; 2181 enic->cq_count = 2; 2182 enic->intr_count = 3; 2183 2184 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX); 2185 2186 return 0; 2187 } 2188 2189 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN); 2190 2191 return -EINVAL; 2192} 2193 2194static void enic_clear_intr_mode(struct enic *enic) 2195{ 2196 switch (vnic_dev_get_intr_mode(enic->vdev)) { 2197 case VNIC_DEV_INTR_MODE_MSIX: 2198 pci_disable_msix(enic->pdev); 2199 break; 2200 case VNIC_DEV_INTR_MODE_MSI: 2201 pci_disable_msi(enic->pdev); 2202 break; 2203 default: 2204 break; 2205 } 2206 2207 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN); 2208} 2209 2210static const struct net_device_ops enic_netdev_dynamic_ops = { 2211 .ndo_open = enic_open, 2212 .ndo_stop = enic_stop, 2213 .ndo_start_xmit = enic_hard_start_xmit, 2214 .ndo_get_stats64 = enic_get_stats, 2215 .ndo_validate_addr = eth_validate_addr, 2216 .ndo_set_rx_mode = enic_set_rx_mode, 2217 .ndo_set_mac_address = enic_set_mac_address_dynamic, 2218 .ndo_change_mtu = enic_change_mtu, 2219 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid, 2220 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid, 2221 .ndo_tx_timeout = enic_tx_timeout, 2222 .ndo_set_vf_port = enic_set_vf_port, 2223 .ndo_get_vf_port = enic_get_vf_port, 2224 .ndo_set_vf_mac = enic_set_vf_mac, 2225#ifdef CONFIG_NET_POLL_CONTROLLER 2226 .ndo_poll_controller = enic_poll_controller, 2227#endif 2228#ifdef CONFIG_RFS_ACCEL 2229 .ndo_rx_flow_steer = enic_rx_flow_steer, 2230#endif 2231#ifdef CONFIG_NET_RX_BUSY_POLL 2232 .ndo_busy_poll = enic_busy_poll, 2233#endif 2234}; 2235 2236static const struct net_device_ops enic_netdev_ops = { 2237 .ndo_open = enic_open, 2238 .ndo_stop = enic_stop, 2239 .ndo_start_xmit = enic_hard_start_xmit, 2240 .ndo_get_stats64 = enic_get_stats, 2241 .ndo_validate_addr = eth_validate_addr, 2242 .ndo_set_mac_address = enic_set_mac_address, 2243 .ndo_set_rx_mode = enic_set_rx_mode, 2244 .ndo_change_mtu = enic_change_mtu, 2245 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid, 2246 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid, 2247 .ndo_tx_timeout = enic_tx_timeout, 2248 .ndo_set_vf_port = enic_set_vf_port, 2249 .ndo_get_vf_port = enic_get_vf_port, 2250 .ndo_set_vf_mac = enic_set_vf_mac, 2251#ifdef CONFIG_NET_POLL_CONTROLLER 2252 .ndo_poll_controller = enic_poll_controller, 2253#endif 2254#ifdef CONFIG_RFS_ACCEL 2255 .ndo_rx_flow_steer = enic_rx_flow_steer, 2256#endif 2257#ifdef CONFIG_NET_RX_BUSY_POLL 2258 .ndo_busy_poll = enic_busy_poll, 2259#endif 2260}; 2261 2262static void enic_dev_deinit(struct enic *enic) 2263{ 2264 unsigned int i; 2265 2266 for (i = 0; i < enic->rq_count; i++) { 2267 napi_hash_del(&enic->napi[i]); 2268 netif_napi_del(&enic->napi[i]); 2269 } 2270 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) 2271 for (i = 0; i < enic->wq_count; i++) 2272 netif_napi_del(&enic->napi[enic_cq_wq(enic, i)]); 2273 2274 enic_free_vnic_resources(enic); 2275 enic_clear_intr_mode(enic); 2276} 2277 2278static void enic_kdump_kernel_config(struct enic *enic) 2279{ 2280 if (is_kdump_kernel()) { 2281 dev_info(enic_get_dev(enic), "Running from within kdump kernel. Using minimal resources\n"); 2282 enic->rq_count = 1; 2283 enic->wq_count = 1; 2284 enic->config.rq_desc_count = ENIC_MIN_RQ_DESCS; 2285 enic->config.wq_desc_count = ENIC_MIN_WQ_DESCS; 2286 enic->config.mtu = min_t(u16, 1500, enic->config.mtu); 2287 } 2288} 2289 2290static int enic_dev_init(struct enic *enic) 2291{ 2292 struct device *dev = enic_get_dev(enic); 2293 struct net_device *netdev = enic->netdev; 2294 unsigned int i; 2295 int err; 2296 2297 /* Get interrupt coalesce timer info */ 2298 err = enic_dev_intr_coal_timer_info(enic); 2299 if (err) { 2300 dev_warn(dev, "Using default conversion factor for " 2301 "interrupt coalesce timer\n"); 2302 vnic_dev_intr_coal_timer_info_default(enic->vdev); 2303 } 2304 2305 /* Get vNIC configuration 2306 */ 2307 2308 err = enic_get_vnic_config(enic); 2309 if (err) { 2310 dev_err(dev, "Get vNIC configuration failed, aborting\n"); 2311 return err; 2312 } 2313 2314 /* Get available resource counts 2315 */ 2316 2317 enic_get_res_counts(enic); 2318 2319 /* modify resource count if we are in kdump_kernel 2320 */ 2321 enic_kdump_kernel_config(enic); 2322 2323 /* Set interrupt mode based on resource counts and system 2324 * capabilities 2325 */ 2326 2327 err = enic_set_intr_mode(enic); 2328 if (err) { 2329 dev_err(dev, "Failed to set intr mode based on resource " 2330 "counts and system capabilities, aborting\n"); 2331 return err; 2332 } 2333 2334 /* Allocate and configure vNIC resources 2335 */ 2336 2337 err = enic_alloc_vnic_resources(enic); 2338 if (err) { 2339 dev_err(dev, "Failed to alloc vNIC resources, aborting\n"); 2340 goto err_out_free_vnic_resources; 2341 } 2342 2343 enic_init_vnic_resources(enic); 2344 2345 err = enic_set_rss_nic_cfg(enic); 2346 if (err) { 2347 dev_err(dev, "Failed to config nic, aborting\n"); 2348 goto err_out_free_vnic_resources; 2349 } 2350 2351 switch (vnic_dev_get_intr_mode(enic->vdev)) { 2352 default: 2353 netif_napi_add(netdev, &enic->napi[0], enic_poll, 64); 2354 napi_hash_add(&enic->napi[0]); 2355 break; 2356 case VNIC_DEV_INTR_MODE_MSIX: 2357 for (i = 0; i < enic->rq_count; i++) { 2358 netif_napi_add(netdev, &enic->napi[i], 2359 enic_poll_msix_rq, NAPI_POLL_WEIGHT); 2360 napi_hash_add(&enic->napi[i]); 2361 } 2362 for (i = 0; i < enic->wq_count; i++) 2363 netif_napi_add(netdev, &enic->napi[enic_cq_wq(enic, i)], 2364 enic_poll_msix_wq, NAPI_POLL_WEIGHT); 2365 break; 2366 } 2367 2368 return 0; 2369 2370err_out_free_vnic_resources: 2371 enic_clear_intr_mode(enic); 2372 enic_free_vnic_resources(enic); 2373 2374 return err; 2375} 2376 2377static void enic_iounmap(struct enic *enic) 2378{ 2379 unsigned int i; 2380 2381 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) 2382 if (enic->bar[i].vaddr) 2383 iounmap(enic->bar[i].vaddr); 2384} 2385 2386static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2387{ 2388 struct device *dev = &pdev->dev; 2389 struct net_device *netdev; 2390 struct enic *enic; 2391 int using_dac = 0; 2392 unsigned int i; 2393 int err; 2394#ifdef CONFIG_PCI_IOV 2395 int pos = 0; 2396#endif 2397 int num_pps = 1; 2398 2399 /* Allocate net device structure and initialize. Private 2400 * instance data is initialized to zero. 2401 */ 2402 2403 netdev = alloc_etherdev_mqs(sizeof(struct enic), 2404 ENIC_RQ_MAX, ENIC_WQ_MAX); 2405 if (!netdev) 2406 return -ENOMEM; 2407 2408 pci_set_drvdata(pdev, netdev); 2409 2410 SET_NETDEV_DEV(netdev, &pdev->dev); 2411 2412 enic = netdev_priv(netdev); 2413 enic->netdev = netdev; 2414 enic->pdev = pdev; 2415 2416 /* Setup PCI resources 2417 */ 2418 2419 err = pci_enable_device_mem(pdev); 2420 if (err) { 2421 dev_err(dev, "Cannot enable PCI device, aborting\n"); 2422 goto err_out_free_netdev; 2423 } 2424 2425 err = pci_request_regions(pdev, DRV_NAME); 2426 if (err) { 2427 dev_err(dev, "Cannot request PCI regions, aborting\n"); 2428 goto err_out_disable_device; 2429 } 2430 2431 pci_set_master(pdev); 2432 2433 /* Query PCI controller on system for DMA addressing 2434 * limitation for the device. Try 64-bit first, and 2435 * fail to 32-bit. 2436 */ 2437 2438 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 2439 if (err) { 2440 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2441 if (err) { 2442 dev_err(dev, "No usable DMA configuration, aborting\n"); 2443 goto err_out_release_regions; 2444 } 2445 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 2446 if (err) { 2447 dev_err(dev, "Unable to obtain %u-bit DMA " 2448 "for consistent allocations, aborting\n", 32); 2449 goto err_out_release_regions; 2450 } 2451 } else { 2452 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); 2453 if (err) { 2454 dev_err(dev, "Unable to obtain %u-bit DMA " 2455 "for consistent allocations, aborting\n", 64); 2456 goto err_out_release_regions; 2457 } 2458 using_dac = 1; 2459 } 2460 2461 /* Map vNIC resources from BAR0-5 2462 */ 2463 2464 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) { 2465 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM)) 2466 continue; 2467 enic->bar[i].len = pci_resource_len(pdev, i); 2468 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len); 2469 if (!enic->bar[i].vaddr) { 2470 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i); 2471 err = -ENODEV; 2472 goto err_out_iounmap; 2473 } 2474 enic->bar[i].bus_addr = pci_resource_start(pdev, i); 2475 } 2476 2477 /* Register vNIC device 2478 */ 2479 2480 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar, 2481 ARRAY_SIZE(enic->bar)); 2482 if (!enic->vdev) { 2483 dev_err(dev, "vNIC registration failed, aborting\n"); 2484 err = -ENODEV; 2485 goto err_out_iounmap; 2486 } 2487 2488#ifdef CONFIG_PCI_IOV 2489 /* Get number of subvnics */ 2490 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); 2491 if (pos) { 2492 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, 2493 &enic->num_vfs); 2494 if (enic->num_vfs) { 2495 err = pci_enable_sriov(pdev, enic->num_vfs); 2496 if (err) { 2497 dev_err(dev, "SRIOV enable failed, aborting." 2498 " pci_enable_sriov() returned %d\n", 2499 err); 2500 goto err_out_vnic_unregister; 2501 } 2502 enic->priv_flags |= ENIC_SRIOV_ENABLED; 2503 num_pps = enic->num_vfs; 2504 } 2505 } 2506#endif 2507 2508 /* Allocate structure for port profiles */ 2509 enic->pp = kcalloc(num_pps, sizeof(*enic->pp), GFP_KERNEL); 2510 if (!enic->pp) { 2511 err = -ENOMEM; 2512 goto err_out_disable_sriov_pp; 2513 } 2514 2515 /* Issue device open to get device in known state 2516 */ 2517 2518 err = enic_dev_open(enic); 2519 if (err) { 2520 dev_err(dev, "vNIC dev open failed, aborting\n"); 2521 goto err_out_disable_sriov; 2522 } 2523 2524 /* Setup devcmd lock 2525 */ 2526 2527 spin_lock_init(&enic->devcmd_lock); 2528 spin_lock_init(&enic->enic_api_lock); 2529 2530 /* 2531 * Set ingress vlan rewrite mode before vnic initialization 2532 */ 2533 2534 err = enic_dev_set_ig_vlan_rewrite_mode(enic); 2535 if (err) { 2536 dev_err(dev, 2537 "Failed to set ingress vlan rewrite mode, aborting.\n"); 2538 goto err_out_dev_close; 2539 } 2540 2541 /* Issue device init to initialize the vnic-to-switch link. 2542 * We'll start with carrier off and wait for link UP 2543 * notification later to turn on carrier. We don't need 2544 * to wait here for the vnic-to-switch link initialization 2545 * to complete; link UP notification is the indication that 2546 * the process is complete. 2547 */ 2548 2549 netif_carrier_off(netdev); 2550 2551 /* Do not call dev_init for a dynamic vnic. 2552 * For a dynamic vnic, init_prov_info will be 2553 * called later by an upper layer. 2554 */ 2555 2556 if (!enic_is_dynamic(enic)) { 2557 err = vnic_dev_init(enic->vdev, 0); 2558 if (err) { 2559 dev_err(dev, "vNIC dev init failed, aborting\n"); 2560 goto err_out_dev_close; 2561 } 2562 } 2563 2564 err = enic_dev_init(enic); 2565 if (err) { 2566 dev_err(dev, "Device initialization failed, aborting\n"); 2567 goto err_out_dev_close; 2568 } 2569 2570 netif_set_real_num_tx_queues(netdev, enic->wq_count); 2571 netif_set_real_num_rx_queues(netdev, enic->rq_count); 2572 2573 /* Setup notification timer, HW reset task, and wq locks 2574 */ 2575 2576 init_timer(&enic->notify_timer); 2577 enic->notify_timer.function = enic_notify_timer; 2578 enic->notify_timer.data = (unsigned long)enic; 2579 2580 enic_set_rx_coal_setting(enic); 2581 INIT_WORK(&enic->reset, enic_reset); 2582 INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work); 2583 2584 for (i = 0; i < enic->wq_count; i++) 2585 spin_lock_init(&enic->wq_lock[i]); 2586 2587 /* Register net device 2588 */ 2589 2590 enic->port_mtu = enic->config.mtu; 2591 (void)enic_change_mtu(netdev, enic->port_mtu); 2592 2593 err = enic_set_mac_addr(netdev, enic->mac_addr); 2594 if (err) { 2595 dev_err(dev, "Invalid MAC address, aborting\n"); 2596 goto err_out_dev_deinit; 2597 } 2598 2599 enic->tx_coalesce_usecs = enic->config.intr_timer_usec; 2600 /* rx coalesce time already got initialized. This gets used 2601 * if adaptive coal is turned off 2602 */ 2603 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs; 2604 2605 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) 2606 netdev->netdev_ops = &enic_netdev_dynamic_ops; 2607 else 2608 netdev->netdev_ops = &enic_netdev_ops; 2609 2610 netdev->watchdog_timeo = 2 * HZ; 2611 enic_set_ethtool_ops(netdev); 2612 2613 netdev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX; 2614 if (ENIC_SETTING(enic, LOOP)) { 2615 netdev->features &= ~NETIF_F_HW_VLAN_CTAG_TX; 2616 enic->loop_enable = 1; 2617 enic->loop_tag = enic->config.loop_tag; 2618 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag); 2619 } 2620 if (ENIC_SETTING(enic, TXCSUM)) 2621 netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM; 2622 if (ENIC_SETTING(enic, TSO)) 2623 netdev->hw_features |= NETIF_F_TSO | 2624 NETIF_F_TSO6 | NETIF_F_TSO_ECN; 2625 if (ENIC_SETTING(enic, RSS)) 2626 netdev->hw_features |= NETIF_F_RXHASH; 2627 if (ENIC_SETTING(enic, RXCSUM)) 2628 netdev->hw_features |= NETIF_F_RXCSUM; 2629 2630 netdev->features |= netdev->hw_features; 2631 2632#ifdef CONFIG_RFS_ACCEL 2633 netdev->hw_features |= NETIF_F_NTUPLE; 2634#endif 2635 2636 if (using_dac) 2637 netdev->features |= NETIF_F_HIGHDMA; 2638 2639 netdev->priv_flags |= IFF_UNICAST_FLT; 2640 2641 err = register_netdev(netdev); 2642 if (err) { 2643 dev_err(dev, "Cannot register net device, aborting\n"); 2644 goto err_out_dev_deinit; 2645 } 2646 enic->rx_copybreak = RX_COPYBREAK_DEFAULT; 2647 2648 return 0; 2649 2650err_out_dev_deinit: 2651 enic_dev_deinit(enic); 2652err_out_dev_close: 2653 vnic_dev_close(enic->vdev); 2654err_out_disable_sriov: 2655 kfree(enic->pp); 2656err_out_disable_sriov_pp: 2657#ifdef CONFIG_PCI_IOV 2658 if (enic_sriov_enabled(enic)) { 2659 pci_disable_sriov(pdev); 2660 enic->priv_flags &= ~ENIC_SRIOV_ENABLED; 2661 } 2662err_out_vnic_unregister: 2663#endif 2664 vnic_dev_unregister(enic->vdev); 2665err_out_iounmap: 2666 enic_iounmap(enic); 2667err_out_release_regions: 2668 pci_release_regions(pdev); 2669err_out_disable_device: 2670 pci_disable_device(pdev); 2671err_out_free_netdev: 2672 free_netdev(netdev); 2673 2674 return err; 2675} 2676 2677static void enic_remove(struct pci_dev *pdev) 2678{ 2679 struct net_device *netdev = pci_get_drvdata(pdev); 2680 2681 if (netdev) { 2682 struct enic *enic = netdev_priv(netdev); 2683 2684 cancel_work_sync(&enic->reset); 2685 cancel_work_sync(&enic->change_mtu_work); 2686 unregister_netdev(netdev); 2687 enic_dev_deinit(enic); 2688 vnic_dev_close(enic->vdev); 2689#ifdef CONFIG_PCI_IOV 2690 if (enic_sriov_enabled(enic)) { 2691 pci_disable_sriov(pdev); 2692 enic->priv_flags &= ~ENIC_SRIOV_ENABLED; 2693 } 2694#endif 2695 kfree(enic->pp); 2696 vnic_dev_unregister(enic->vdev); 2697 enic_iounmap(enic); 2698 pci_release_regions(pdev); 2699 pci_disable_device(pdev); 2700 free_netdev(netdev); 2701 } 2702} 2703 2704static struct pci_driver enic_driver = { 2705 .name = DRV_NAME, 2706 .id_table = enic_id_table, 2707 .probe = enic_probe, 2708 .remove = enic_remove, 2709}; 2710 2711static int __init enic_init_module(void) 2712{ 2713 pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION); 2714 2715 return pci_register_driver(&enic_driver); 2716} 2717 2718static void __exit enic_cleanup_module(void) 2719{ 2720 pci_unregister_driver(&enic_driver); 2721} 2722 2723module_init(enic_init_module); 2724module_exit(enic_cleanup_module); 2725