1/* 2 * QLogic qlcnic NIC Driver 3 * Copyright (c) 2009-2013 QLogic Corporation 4 * 5 * See LICENSE.qlcnic for copyright and licensing details. 6 */ 7 8#include "qlcnic.h" 9#include "qlcnic_hw.h" 10 11struct crb_addr_pair { 12 u32 addr; 13 u32 data; 14}; 15 16#define QLCNIC_MAX_CRB_XFORM 60 17static unsigned int crb_addr_xform[QLCNIC_MAX_CRB_XFORM]; 18 19#define crb_addr_transform(name) \ 20 (crb_addr_xform[QLCNIC_HW_PX_MAP_CRB_##name] = \ 21 QLCNIC_HW_CRB_HUB_AGT_ADR_##name << 20) 22 23#define QLCNIC_ADDR_ERROR (0xffffffff) 24 25static int 26qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter); 27 28static void crb_addr_transform_setup(void) 29{ 30 crb_addr_transform(XDMA); 31 crb_addr_transform(TIMR); 32 crb_addr_transform(SRE); 33 crb_addr_transform(SQN3); 34 crb_addr_transform(SQN2); 35 crb_addr_transform(SQN1); 36 crb_addr_transform(SQN0); 37 crb_addr_transform(SQS3); 38 crb_addr_transform(SQS2); 39 crb_addr_transform(SQS1); 40 crb_addr_transform(SQS0); 41 crb_addr_transform(RPMX7); 42 crb_addr_transform(RPMX6); 43 crb_addr_transform(RPMX5); 44 crb_addr_transform(RPMX4); 45 crb_addr_transform(RPMX3); 46 crb_addr_transform(RPMX2); 47 crb_addr_transform(RPMX1); 48 crb_addr_transform(RPMX0); 49 crb_addr_transform(ROMUSB); 50 crb_addr_transform(SN); 51 crb_addr_transform(QMN); 52 crb_addr_transform(QMS); 53 crb_addr_transform(PGNI); 54 crb_addr_transform(PGND); 55 crb_addr_transform(PGN3); 56 crb_addr_transform(PGN2); 57 crb_addr_transform(PGN1); 58 crb_addr_transform(PGN0); 59 crb_addr_transform(PGSI); 60 crb_addr_transform(PGSD); 61 crb_addr_transform(PGS3); 62 crb_addr_transform(PGS2); 63 crb_addr_transform(PGS1); 64 crb_addr_transform(PGS0); 65 crb_addr_transform(PS); 66 crb_addr_transform(PH); 67 crb_addr_transform(NIU); 68 crb_addr_transform(I2Q); 69 crb_addr_transform(EG); 70 crb_addr_transform(MN); 71 crb_addr_transform(MS); 72 crb_addr_transform(CAS2); 73 crb_addr_transform(CAS1); 74 crb_addr_transform(CAS0); 75 crb_addr_transform(CAM); 76 crb_addr_transform(C2C1); 77 crb_addr_transform(C2C0); 78 crb_addr_transform(SMB); 79 crb_addr_transform(OCM0); 80 crb_addr_transform(I2C0); 81} 82 83void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter) 84{ 85 struct qlcnic_recv_context *recv_ctx; 86 struct qlcnic_host_rds_ring *rds_ring; 87 struct qlcnic_rx_buffer *rx_buf; 88 int i, ring; 89 90 recv_ctx = adapter->recv_ctx; 91 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 92 rds_ring = &recv_ctx->rds_rings[ring]; 93 for (i = 0; i < rds_ring->num_desc; ++i) { 94 rx_buf = &(rds_ring->rx_buf_arr[i]); 95 if (rx_buf->skb == NULL) 96 continue; 97 98 pci_unmap_single(adapter->pdev, 99 rx_buf->dma, 100 rds_ring->dma_size, 101 PCI_DMA_FROMDEVICE); 102 103 dev_kfree_skb_any(rx_buf->skb); 104 } 105 } 106} 107 108void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter) 109{ 110 struct qlcnic_recv_context *recv_ctx; 111 struct qlcnic_host_rds_ring *rds_ring; 112 struct qlcnic_rx_buffer *rx_buf; 113 int i, ring; 114 115 recv_ctx = adapter->recv_ctx; 116 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 117 rds_ring = &recv_ctx->rds_rings[ring]; 118 119 INIT_LIST_HEAD(&rds_ring->free_list); 120 121 rx_buf = rds_ring->rx_buf_arr; 122 for (i = 0; i < rds_ring->num_desc; i++) { 123 list_add_tail(&rx_buf->list, 124 &rds_ring->free_list); 125 rx_buf++; 126 } 127 } 128} 129 130void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter, 131 struct qlcnic_host_tx_ring *tx_ring) 132{ 133 struct qlcnic_cmd_buffer *cmd_buf; 134 struct qlcnic_skb_frag *buffrag; 135 int i, j; 136 137 spin_lock(&tx_ring->tx_clean_lock); 138 139 cmd_buf = tx_ring->cmd_buf_arr; 140 for (i = 0; i < tx_ring->num_desc; i++) { 141 buffrag = cmd_buf->frag_array; 142 if (buffrag->dma) { 143 pci_unmap_single(adapter->pdev, buffrag->dma, 144 buffrag->length, PCI_DMA_TODEVICE); 145 buffrag->dma = 0ULL; 146 } 147 for (j = 1; j < cmd_buf->frag_count; j++) { 148 buffrag++; 149 if (buffrag->dma) { 150 pci_unmap_page(adapter->pdev, buffrag->dma, 151 buffrag->length, 152 PCI_DMA_TODEVICE); 153 buffrag->dma = 0ULL; 154 } 155 } 156 if (cmd_buf->skb) { 157 dev_kfree_skb_any(cmd_buf->skb); 158 cmd_buf->skb = NULL; 159 } 160 cmd_buf++; 161 } 162 163 spin_unlock(&tx_ring->tx_clean_lock); 164} 165 166void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter) 167{ 168 struct qlcnic_recv_context *recv_ctx; 169 struct qlcnic_host_rds_ring *rds_ring; 170 int ring; 171 172 recv_ctx = adapter->recv_ctx; 173 174 if (recv_ctx->rds_rings == NULL) 175 return; 176 177 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 178 rds_ring = &recv_ctx->rds_rings[ring]; 179 vfree(rds_ring->rx_buf_arr); 180 rds_ring->rx_buf_arr = NULL; 181 } 182 kfree(recv_ctx->rds_rings); 183} 184 185int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter) 186{ 187 struct qlcnic_recv_context *recv_ctx; 188 struct qlcnic_host_rds_ring *rds_ring; 189 struct qlcnic_host_sds_ring *sds_ring; 190 struct qlcnic_rx_buffer *rx_buf; 191 int ring, i; 192 193 recv_ctx = adapter->recv_ctx; 194 195 rds_ring = kcalloc(adapter->max_rds_rings, 196 sizeof(struct qlcnic_host_rds_ring), GFP_KERNEL); 197 if (rds_ring == NULL) 198 goto err_out; 199 200 recv_ctx->rds_rings = rds_ring; 201 202 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 203 rds_ring = &recv_ctx->rds_rings[ring]; 204 switch (ring) { 205 case RCV_RING_NORMAL: 206 rds_ring->num_desc = adapter->num_rxd; 207 rds_ring->dma_size = QLCNIC_P3P_RX_BUF_MAX_LEN; 208 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN; 209 break; 210 211 case RCV_RING_JUMBO: 212 rds_ring->num_desc = adapter->num_jumbo_rxd; 213 rds_ring->dma_size = 214 QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN; 215 216 if (adapter->ahw->capabilities & 217 QLCNIC_FW_CAPABILITY_HW_LRO) 218 rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA; 219 220 rds_ring->skb_size = 221 rds_ring->dma_size + NET_IP_ALIGN; 222 break; 223 } 224 rds_ring->rx_buf_arr = vzalloc(RCV_BUFF_RINGSIZE(rds_ring)); 225 if (rds_ring->rx_buf_arr == NULL) 226 goto err_out; 227 228 INIT_LIST_HEAD(&rds_ring->free_list); 229 /* 230 * Now go through all of them, set reference handles 231 * and put them in the queues. 232 */ 233 rx_buf = rds_ring->rx_buf_arr; 234 for (i = 0; i < rds_ring->num_desc; i++) { 235 list_add_tail(&rx_buf->list, 236 &rds_ring->free_list); 237 rx_buf->ref_handle = i; 238 rx_buf++; 239 } 240 spin_lock_init(&rds_ring->lock); 241 } 242 243 for (ring = 0; ring < adapter->drv_sds_rings; ring++) { 244 sds_ring = &recv_ctx->sds_rings[ring]; 245 sds_ring->irq = adapter->msix_entries[ring].vector; 246 sds_ring->adapter = adapter; 247 sds_ring->num_desc = adapter->num_rxd; 248 if (qlcnic_82xx_check(adapter)) { 249 if (qlcnic_check_multi_tx(adapter) && 250 !adapter->ahw->diag_test) 251 sds_ring->tx_ring = &adapter->tx_ring[ring]; 252 else 253 sds_ring->tx_ring = &adapter->tx_ring[0]; 254 } 255 for (i = 0; i < NUM_RCV_DESC_RINGS; i++) 256 INIT_LIST_HEAD(&sds_ring->free_list[i]); 257 } 258 259 return 0; 260 261err_out: 262 qlcnic_free_sw_resources(adapter); 263 return -ENOMEM; 264} 265 266/* 267 * Utility to translate from internal Phantom CRB address 268 * to external PCI CRB address. 269 */ 270static u32 qlcnic_decode_crb_addr(u32 addr) 271{ 272 int i; 273 u32 base_addr, offset, pci_base; 274 275 crb_addr_transform_setup(); 276 277 pci_base = QLCNIC_ADDR_ERROR; 278 base_addr = addr & 0xfff00000; 279 offset = addr & 0x000fffff; 280 281 for (i = 0; i < QLCNIC_MAX_CRB_XFORM; i++) { 282 if (crb_addr_xform[i] == base_addr) { 283 pci_base = i << 20; 284 break; 285 } 286 } 287 if (pci_base == QLCNIC_ADDR_ERROR) 288 return pci_base; 289 else 290 return pci_base + offset; 291} 292 293#define QLCNIC_MAX_ROM_WAIT_USEC 100 294 295static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter) 296{ 297 long timeout = 0; 298 long done = 0; 299 int err = 0; 300 301 cond_resched(); 302 while (done == 0) { 303 done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS, &err); 304 done &= 2; 305 if (++timeout >= QLCNIC_MAX_ROM_WAIT_USEC) { 306 dev_err(&adapter->pdev->dev, 307 "Timeout reached waiting for rom done"); 308 return -EIO; 309 } 310 udelay(1); 311 } 312 return 0; 313} 314 315static int do_rom_fast_read(struct qlcnic_adapter *adapter, 316 u32 addr, u32 *valp) 317{ 318 int err = 0; 319 320 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ADDRESS, addr); 321 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); 322 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 3); 323 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_INSTR_OPCODE, 0xb); 324 if (qlcnic_wait_rom_done(adapter)) { 325 dev_err(&adapter->pdev->dev, "Error waiting for rom done\n"); 326 return -EIO; 327 } 328 /* reset abyte_cnt and dummy_byte_cnt */ 329 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 0); 330 udelay(10); 331 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); 332 333 *valp = QLCRD32(adapter, QLCNIC_ROMUSB_ROM_RDATA, &err); 334 if (err == -EIO) 335 return err; 336 return 0; 337} 338 339static int do_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr, 340 u8 *bytes, size_t size) 341{ 342 int addridx; 343 int ret = 0; 344 345 for (addridx = addr; addridx < (addr + size); addridx += 4) { 346 int v; 347 ret = do_rom_fast_read(adapter, addridx, &v); 348 if (ret != 0) 349 break; 350 *(__le32 *)bytes = cpu_to_le32(v); 351 bytes += 4; 352 } 353 354 return ret; 355} 356 357int 358qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr, 359 u8 *bytes, size_t size) 360{ 361 int ret; 362 363 ret = qlcnic_rom_lock(adapter); 364 if (ret < 0) 365 return ret; 366 367 ret = do_rom_fast_read_words(adapter, addr, bytes, size); 368 369 qlcnic_rom_unlock(adapter); 370 return ret; 371} 372 373int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, u32 addr, u32 *valp) 374{ 375 int ret; 376 377 if (qlcnic_rom_lock(adapter) != 0) 378 return -EIO; 379 380 ret = do_rom_fast_read(adapter, addr, valp); 381 qlcnic_rom_unlock(adapter); 382 return ret; 383} 384 385int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter) 386{ 387 int addr, err = 0; 388 int i, n, init_delay; 389 struct crb_addr_pair *buf; 390 unsigned offset; 391 u32 off, val; 392 struct pci_dev *pdev = adapter->pdev; 393 394 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, 0); 395 QLC_SHARED_REG_WR32(adapter, QLCNIC_RCVPEG_STATE, 0); 396 397 /* Halt all the indiviual PEGs and other blocks */ 398 /* disable all I2Q */ 399 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x10, 0x0); 400 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x14, 0x0); 401 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x18, 0x0); 402 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x1c, 0x0); 403 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x20, 0x0); 404 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x24, 0x0); 405 406 /* disable all niu interrupts */ 407 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x40, 0xff); 408 /* disable xge rx/tx */ 409 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x70000, 0x00); 410 /* disable xg1 rx/tx */ 411 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x80000, 0x00); 412 /* disable sideband mac */ 413 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x90000, 0x00); 414 /* disable ap0 mac */ 415 QLCWR32(adapter, QLCNIC_CRB_NIU + 0xa0000, 0x00); 416 /* disable ap1 mac */ 417 QLCWR32(adapter, QLCNIC_CRB_NIU + 0xb0000, 0x00); 418 419 /* halt sre */ 420 val = QLCRD32(adapter, QLCNIC_CRB_SRE + 0x1000, &err); 421 if (err == -EIO) 422 return err; 423 QLCWR32(adapter, QLCNIC_CRB_SRE + 0x1000, val & (~(0x1))); 424 425 /* halt epg */ 426 QLCWR32(adapter, QLCNIC_CRB_EPG + 0x1300, 0x1); 427 428 /* halt timers */ 429 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x0, 0x0); 430 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x8, 0x0); 431 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x10, 0x0); 432 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x18, 0x0); 433 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x100, 0x0); 434 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x200, 0x0); 435 /* halt pegs */ 436 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x3c, 1); 437 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x3c, 1); 438 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x3c, 1); 439 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x3c, 1); 440 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x3c, 1); 441 msleep(20); 442 443 qlcnic_rom_unlock(adapter); 444 /* big hammer don't reset CAM block on reset */ 445 QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0xfeffffff); 446 447 /* Init HW CRB block */ 448 if (qlcnic_rom_fast_read(adapter, 0, &n) != 0 || (n != 0xcafecafe) || 449 qlcnic_rom_fast_read(adapter, 4, &n) != 0) { 450 dev_err(&pdev->dev, "ERROR Reading crb_init area: val:%x\n", n); 451 return -EIO; 452 } 453 offset = n & 0xffffU; 454 n = (n >> 16) & 0xffffU; 455 456 if (n >= 1024) { 457 dev_err(&pdev->dev, "QLOGIC card flash not initialized.\n"); 458 return -EIO; 459 } 460 461 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL); 462 if (buf == NULL) 463 return -ENOMEM; 464 465 for (i = 0; i < n; i++) { 466 if (qlcnic_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 || 467 qlcnic_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) { 468 kfree(buf); 469 return -EIO; 470 } 471 472 buf[i].addr = addr; 473 buf[i].data = val; 474 } 475 476 for (i = 0; i < n; i++) { 477 478 off = qlcnic_decode_crb_addr(buf[i].addr); 479 if (off == QLCNIC_ADDR_ERROR) { 480 dev_err(&pdev->dev, "CRB init value out of range %x\n", 481 buf[i].addr); 482 continue; 483 } 484 off += QLCNIC_PCI_CRBSPACE; 485 486 if (off & 1) 487 continue; 488 489 /* skipping cold reboot MAGIC */ 490 if (off == QLCNIC_CAM_RAM(0x1fc)) 491 continue; 492 if (off == (QLCNIC_CRB_I2C0 + 0x1c)) 493 continue; 494 if (off == (ROMUSB_GLB + 0xbc)) /* do not reset PCI */ 495 continue; 496 if (off == (ROMUSB_GLB + 0xa8)) 497 continue; 498 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */ 499 continue; 500 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */ 501 continue; 502 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */ 503 continue; 504 if ((off & 0x0ff00000) == QLCNIC_CRB_DDR_NET) 505 continue; 506 /* skip the function enable register */ 507 if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION)) 508 continue; 509 if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION2)) 510 continue; 511 if ((off & 0x0ff00000) == QLCNIC_CRB_SMB) 512 continue; 513 514 init_delay = 1; 515 /* After writing this register, HW needs time for CRB */ 516 /* to quiet down (else crb_window returns 0xffffffff) */ 517 if (off == QLCNIC_ROMUSB_GLB_SW_RESET) 518 init_delay = 1000; 519 520 QLCWR32(adapter, off, buf[i].data); 521 522 msleep(init_delay); 523 } 524 kfree(buf); 525 526 /* Initialize protocol process engine */ 527 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0xec, 0x1e); 528 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0x4c, 8); 529 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_I + 0x4c, 8); 530 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x8, 0); 531 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0xc, 0); 532 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x8, 0); 533 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0xc, 0); 534 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x8, 0); 535 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0xc, 0); 536 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x8, 0); 537 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0xc, 0); 538 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x8, 0); 539 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0xc, 0); 540 usleep_range(1000, 1500); 541 542 QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS1, 0); 543 QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS2, 0); 544 545 return 0; 546} 547 548static int qlcnic_cmd_peg_ready(struct qlcnic_adapter *adapter) 549{ 550 u32 val; 551 int retries = QLCNIC_CMDPEG_CHECK_RETRY_COUNT; 552 553 do { 554 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CMDPEG_STATE); 555 556 switch (val) { 557 case PHAN_INITIALIZE_COMPLETE: 558 case PHAN_INITIALIZE_ACK: 559 return 0; 560 case PHAN_INITIALIZE_FAILED: 561 goto out_err; 562 default: 563 break; 564 } 565 566 msleep(QLCNIC_CMDPEG_CHECK_DELAY); 567 568 } while (--retries); 569 570 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, 571 PHAN_INITIALIZE_FAILED); 572 573out_err: 574 dev_err(&adapter->pdev->dev, "Command Peg initialization not " 575 "complete, state: 0x%x.\n", val); 576 return -EIO; 577} 578 579static int 580qlcnic_receive_peg_ready(struct qlcnic_adapter *adapter) 581{ 582 u32 val; 583 int retries = QLCNIC_RCVPEG_CHECK_RETRY_COUNT; 584 585 do { 586 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_RCVPEG_STATE); 587 588 if (val == PHAN_PEG_RCV_INITIALIZED) 589 return 0; 590 591 msleep(QLCNIC_RCVPEG_CHECK_DELAY); 592 593 } while (--retries); 594 595 if (!retries) { 596 dev_err(&adapter->pdev->dev, "Receive Peg initialization not " 597 "complete, state: 0x%x.\n", val); 598 return -EIO; 599 } 600 601 return 0; 602} 603 604int 605qlcnic_check_fw_status(struct qlcnic_adapter *adapter) 606{ 607 int err; 608 609 err = qlcnic_cmd_peg_ready(adapter); 610 if (err) 611 return err; 612 613 err = qlcnic_receive_peg_ready(adapter); 614 if (err) 615 return err; 616 617 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, PHAN_INITIALIZE_ACK); 618 619 return err; 620} 621 622int 623qlcnic_setup_idc_param(struct qlcnic_adapter *adapter) { 624 625 int timeo; 626 u32 val; 627 628 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO); 629 val = QLC_DEV_GET_DRV(val, adapter->portnum); 630 if ((val & 0x3) != QLCNIC_TYPE_NIC) { 631 dev_err(&adapter->pdev->dev, 632 "Not an Ethernet NIC func=%u\n", val); 633 return -EIO; 634 } 635 adapter->ahw->physical_port = (val >> 2); 636 if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DEV_INIT_TIMEOUT, &timeo)) 637 timeo = QLCNIC_INIT_TIMEOUT_SECS; 638 639 adapter->dev_init_timeo = timeo; 640 641 if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DRV_RESET_TIMEOUT, &timeo)) 642 timeo = QLCNIC_RESET_TIMEOUT_SECS; 643 644 adapter->reset_ack_timeo = timeo; 645 646 return 0; 647} 648 649static int qlcnic_get_flt_entry(struct qlcnic_adapter *adapter, u8 region, 650 struct qlcnic_flt_entry *region_entry) 651{ 652 struct qlcnic_flt_header flt_hdr; 653 struct qlcnic_flt_entry *flt_entry; 654 int i = 0, ret; 655 u32 entry_size; 656 657 memset(region_entry, 0, sizeof(struct qlcnic_flt_entry)); 658 ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION, 659 (u8 *)&flt_hdr, 660 sizeof(struct qlcnic_flt_header)); 661 if (ret) { 662 dev_warn(&adapter->pdev->dev, 663 "error reading flash layout header\n"); 664 return -EIO; 665 } 666 667 entry_size = flt_hdr.len - sizeof(struct qlcnic_flt_header); 668 flt_entry = vzalloc(entry_size); 669 if (flt_entry == NULL) 670 return -EIO; 671 672 ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION + 673 sizeof(struct qlcnic_flt_header), 674 (u8 *)flt_entry, entry_size); 675 if (ret) { 676 dev_warn(&adapter->pdev->dev, 677 "error reading flash layout entries\n"); 678 goto err_out; 679 } 680 681 while (i < (entry_size/sizeof(struct qlcnic_flt_entry))) { 682 if (flt_entry[i].region == region) 683 break; 684 i++; 685 } 686 if (i >= (entry_size/sizeof(struct qlcnic_flt_entry))) { 687 dev_warn(&adapter->pdev->dev, 688 "region=%x not found in %d regions\n", region, i); 689 ret = -EIO; 690 goto err_out; 691 } 692 memcpy(region_entry, &flt_entry[i], sizeof(struct qlcnic_flt_entry)); 693 694err_out: 695 vfree(flt_entry); 696 return ret; 697} 698 699int 700qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter) 701{ 702 struct qlcnic_flt_entry fw_entry; 703 u32 ver = -1, min_ver; 704 int ret; 705 706 if (adapter->ahw->revision_id == QLCNIC_P3P_C0) 707 ret = qlcnic_get_flt_entry(adapter, QLCNIC_C0_FW_IMAGE_REGION, 708 &fw_entry); 709 else 710 ret = qlcnic_get_flt_entry(adapter, QLCNIC_B0_FW_IMAGE_REGION, 711 &fw_entry); 712 713 if (!ret) 714 /* 0-4:-signature, 4-8:-fw version */ 715 qlcnic_rom_fast_read(adapter, fw_entry.start_addr + 4, 716 (int *)&ver); 717 else 718 qlcnic_rom_fast_read(adapter, QLCNIC_FW_VERSION_OFFSET, 719 (int *)&ver); 720 721 ver = QLCNIC_DECODE_VERSION(ver); 722 min_ver = QLCNIC_MIN_FW_VERSION; 723 724 if (ver < min_ver) { 725 dev_err(&adapter->pdev->dev, 726 "firmware version %d.%d.%d unsupported." 727 "Min supported version %d.%d.%d\n", 728 _major(ver), _minor(ver), _build(ver), 729 _major(min_ver), _minor(min_ver), _build(min_ver)); 730 return -EINVAL; 731 } 732 733 return 0; 734} 735 736static int 737qlcnic_has_mn(struct qlcnic_adapter *adapter) 738{ 739 u32 capability = 0; 740 int err = 0; 741 742 capability = QLCRD32(adapter, QLCNIC_PEG_TUNE_CAPABILITY, &err); 743 if (err == -EIO) 744 return err; 745 if (capability & QLCNIC_PEG_TUNE_MN_PRESENT) 746 return 1; 747 748 return 0; 749} 750 751static 752struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section) 753{ 754 u32 i, entries; 755 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0]; 756 entries = le32_to_cpu(directory->num_entries); 757 758 for (i = 0; i < entries; i++) { 759 760 u32 offs = le32_to_cpu(directory->findex) + 761 i * le32_to_cpu(directory->entry_size); 762 u32 tab_type = le32_to_cpu(*((__le32 *)&unirom[offs] + 8)); 763 764 if (tab_type == section) 765 return (struct uni_table_desc *) &unirom[offs]; 766 } 767 768 return NULL; 769} 770 771#define FILEHEADER_SIZE (14 * 4) 772 773static int 774qlcnic_validate_header(struct qlcnic_adapter *adapter) 775{ 776 const u8 *unirom = adapter->fw->data; 777 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0]; 778 u32 entries, entry_size, tab_size, fw_file_size; 779 780 fw_file_size = adapter->fw->size; 781 782 if (fw_file_size < FILEHEADER_SIZE) 783 return -EINVAL; 784 785 entries = le32_to_cpu(directory->num_entries); 786 entry_size = le32_to_cpu(directory->entry_size); 787 tab_size = le32_to_cpu(directory->findex) + (entries * entry_size); 788 789 if (fw_file_size < tab_size) 790 return -EINVAL; 791 792 return 0; 793} 794 795static int 796qlcnic_validate_bootld(struct qlcnic_adapter *adapter) 797{ 798 struct uni_table_desc *tab_desc; 799 struct uni_data_desc *descr; 800 u32 offs, tab_size, data_size, idx; 801 const u8 *unirom = adapter->fw->data; 802 __le32 temp; 803 804 temp = *((__le32 *)&unirom[adapter->file_prd_off] + 805 QLCNIC_UNI_BOOTLD_IDX_OFF); 806 idx = le32_to_cpu(temp); 807 tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_BOOTLD); 808 809 if (!tab_desc) 810 return -EINVAL; 811 812 tab_size = le32_to_cpu(tab_desc->findex) + 813 le32_to_cpu(tab_desc->entry_size) * (idx + 1); 814 815 if (adapter->fw->size < tab_size) 816 return -EINVAL; 817 818 offs = le32_to_cpu(tab_desc->findex) + 819 le32_to_cpu(tab_desc->entry_size) * idx; 820 descr = (struct uni_data_desc *)&unirom[offs]; 821 822 data_size = le32_to_cpu(descr->findex) + le32_to_cpu(descr->size); 823 824 if (adapter->fw->size < data_size) 825 return -EINVAL; 826 827 return 0; 828} 829 830static int 831qlcnic_validate_fw(struct qlcnic_adapter *adapter) 832{ 833 struct uni_table_desc *tab_desc; 834 struct uni_data_desc *descr; 835 const u8 *unirom = adapter->fw->data; 836 u32 offs, tab_size, data_size, idx; 837 __le32 temp; 838 839 temp = *((__le32 *)&unirom[adapter->file_prd_off] + 840 QLCNIC_UNI_FIRMWARE_IDX_OFF); 841 idx = le32_to_cpu(temp); 842 tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_FW); 843 844 if (!tab_desc) 845 return -EINVAL; 846 847 tab_size = le32_to_cpu(tab_desc->findex) + 848 le32_to_cpu(tab_desc->entry_size) * (idx + 1); 849 850 if (adapter->fw->size < tab_size) 851 return -EINVAL; 852 853 offs = le32_to_cpu(tab_desc->findex) + 854 le32_to_cpu(tab_desc->entry_size) * idx; 855 descr = (struct uni_data_desc *)&unirom[offs]; 856 data_size = le32_to_cpu(descr->findex) + le32_to_cpu(descr->size); 857 858 if (adapter->fw->size < data_size) 859 return -EINVAL; 860 861 return 0; 862} 863 864static int 865qlcnic_validate_product_offs(struct qlcnic_adapter *adapter) 866{ 867 struct uni_table_desc *ptab_descr; 868 const u8 *unirom = adapter->fw->data; 869 int mn_present = qlcnic_has_mn(adapter); 870 u32 entries, entry_size, tab_size, i; 871 __le32 temp; 872 873 ptab_descr = qlcnic_get_table_desc(unirom, 874 QLCNIC_UNI_DIR_SECT_PRODUCT_TBL); 875 if (!ptab_descr) 876 return -EINVAL; 877 878 entries = le32_to_cpu(ptab_descr->num_entries); 879 entry_size = le32_to_cpu(ptab_descr->entry_size); 880 tab_size = le32_to_cpu(ptab_descr->findex) + (entries * entry_size); 881 882 if (adapter->fw->size < tab_size) 883 return -EINVAL; 884 885nomn: 886 for (i = 0; i < entries; i++) { 887 888 u32 flags, file_chiprev, offs; 889 u8 chiprev = adapter->ahw->revision_id; 890 u32 flagbit; 891 892 offs = le32_to_cpu(ptab_descr->findex) + 893 i * le32_to_cpu(ptab_descr->entry_size); 894 temp = *((__le32 *)&unirom[offs] + QLCNIC_UNI_FLAGS_OFF); 895 flags = le32_to_cpu(temp); 896 temp = *((__le32 *)&unirom[offs] + QLCNIC_UNI_CHIP_REV_OFF); 897 file_chiprev = le32_to_cpu(temp); 898 899 flagbit = mn_present ? 1 : 2; 900 901 if ((chiprev == file_chiprev) && 902 ((1ULL << flagbit) & flags)) { 903 adapter->file_prd_off = offs; 904 return 0; 905 } 906 } 907 if (mn_present) { 908 mn_present = 0; 909 goto nomn; 910 } 911 return -EINVAL; 912} 913 914static int 915qlcnic_validate_unified_romimage(struct qlcnic_adapter *adapter) 916{ 917 if (qlcnic_validate_header(adapter)) { 918 dev_err(&adapter->pdev->dev, 919 "unified image: header validation failed\n"); 920 return -EINVAL; 921 } 922 923 if (qlcnic_validate_product_offs(adapter)) { 924 dev_err(&adapter->pdev->dev, 925 "unified image: product validation failed\n"); 926 return -EINVAL; 927 } 928 929 if (qlcnic_validate_bootld(adapter)) { 930 dev_err(&adapter->pdev->dev, 931 "unified image: bootld validation failed\n"); 932 return -EINVAL; 933 } 934 935 if (qlcnic_validate_fw(adapter)) { 936 dev_err(&adapter->pdev->dev, 937 "unified image: firmware validation failed\n"); 938 return -EINVAL; 939 } 940 941 return 0; 942} 943 944static 945struct uni_data_desc *qlcnic_get_data_desc(struct qlcnic_adapter *adapter, 946 u32 section, u32 idx_offset) 947{ 948 const u8 *unirom = adapter->fw->data; 949 struct uni_table_desc *tab_desc; 950 u32 offs, idx; 951 __le32 temp; 952 953 temp = *((__le32 *)&unirom[adapter->file_prd_off] + idx_offset); 954 idx = le32_to_cpu(temp); 955 956 tab_desc = qlcnic_get_table_desc(unirom, section); 957 958 if (tab_desc == NULL) 959 return NULL; 960 961 offs = le32_to_cpu(tab_desc->findex) + 962 le32_to_cpu(tab_desc->entry_size) * idx; 963 964 return (struct uni_data_desc *)&unirom[offs]; 965} 966 967static u8 * 968qlcnic_get_bootld_offs(struct qlcnic_adapter *adapter) 969{ 970 u32 offs = QLCNIC_BOOTLD_START; 971 struct uni_data_desc *data_desc; 972 973 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_BOOTLD, 974 QLCNIC_UNI_BOOTLD_IDX_OFF); 975 976 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE) 977 offs = le32_to_cpu(data_desc->findex); 978 979 return (u8 *)&adapter->fw->data[offs]; 980} 981 982static u8 * 983qlcnic_get_fw_offs(struct qlcnic_adapter *adapter) 984{ 985 u32 offs = QLCNIC_IMAGE_START; 986 struct uni_data_desc *data_desc; 987 988 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW, 989 QLCNIC_UNI_FIRMWARE_IDX_OFF); 990 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE) 991 offs = le32_to_cpu(data_desc->findex); 992 993 return (u8 *)&adapter->fw->data[offs]; 994} 995 996static u32 qlcnic_get_fw_size(struct qlcnic_adapter *adapter) 997{ 998 struct uni_data_desc *data_desc; 999 const u8 *unirom = adapter->fw->data; 1000 1001 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW, 1002 QLCNIC_UNI_FIRMWARE_IDX_OFF); 1003 1004 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE) 1005 return le32_to_cpu(data_desc->size); 1006 else 1007 return le32_to_cpu(*(__le32 *)&unirom[QLCNIC_FW_SIZE_OFFSET]); 1008} 1009 1010static u32 qlcnic_get_fw_version(struct qlcnic_adapter *adapter) 1011{ 1012 struct uni_data_desc *fw_data_desc; 1013 const struct firmware *fw = adapter->fw; 1014 u32 major, minor, sub; 1015 __le32 version_offset; 1016 const u8 *ver_str; 1017 int i, ret; 1018 1019 if (adapter->ahw->fw_type != QLCNIC_UNIFIED_ROMIMAGE) { 1020 version_offset = *(__le32 *)&fw->data[QLCNIC_FW_VERSION_OFFSET]; 1021 return le32_to_cpu(version_offset); 1022 } 1023 1024 fw_data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW, 1025 QLCNIC_UNI_FIRMWARE_IDX_OFF); 1026 ver_str = fw->data + le32_to_cpu(fw_data_desc->findex) + 1027 le32_to_cpu(fw_data_desc->size) - 17; 1028 1029 for (i = 0; i < 12; i++) { 1030 if (!strncmp(&ver_str[i], "REV=", 4)) { 1031 ret = sscanf(&ver_str[i+4], "%u.%u.%u ", 1032 &major, &minor, &sub); 1033 if (ret != 3) 1034 return 0; 1035 else 1036 return major + (minor << 8) + (sub << 16); 1037 } 1038 } 1039 1040 return 0; 1041} 1042 1043static u32 qlcnic_get_bios_version(struct qlcnic_adapter *adapter) 1044{ 1045 const struct firmware *fw = adapter->fw; 1046 u32 bios_ver, prd_off = adapter->file_prd_off; 1047 u8 *version_offset; 1048 __le32 temp; 1049 1050 if (adapter->ahw->fw_type != QLCNIC_UNIFIED_ROMIMAGE) { 1051 version_offset = (u8 *)&fw->data[QLCNIC_BIOS_VERSION_OFFSET]; 1052 return le32_to_cpu(*(__le32 *)version_offset); 1053 } 1054 1055 temp = *((__le32 *)(&fw->data[prd_off]) + QLCNIC_UNI_BIOS_VERSION_OFF); 1056 bios_ver = le32_to_cpu(temp); 1057 1058 return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24); 1059} 1060 1061static void qlcnic_rom_lock_recovery(struct qlcnic_adapter *adapter) 1062{ 1063 if (qlcnic_pcie_sem_lock(adapter, 2, QLCNIC_ROM_LOCK_ID)) 1064 dev_info(&adapter->pdev->dev, "Resetting rom_lock\n"); 1065 1066 qlcnic_pcie_sem_unlock(adapter, 2); 1067} 1068 1069static int 1070qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter) 1071{ 1072 u32 heartbeat, ret = -EIO; 1073 int retries = QLCNIC_HEARTBEAT_CHECK_RETRY_COUNT; 1074 1075 adapter->heartbeat = QLC_SHARED_REG_RD32(adapter, 1076 QLCNIC_PEG_ALIVE_COUNTER); 1077 1078 do { 1079 msleep(QLCNIC_HEARTBEAT_PERIOD_MSECS); 1080 heartbeat = QLC_SHARED_REG_RD32(adapter, 1081 QLCNIC_PEG_ALIVE_COUNTER); 1082 if (heartbeat != adapter->heartbeat) { 1083 ret = QLCNIC_RCODE_SUCCESS; 1084 break; 1085 } 1086 } while (--retries); 1087 1088 return ret; 1089} 1090 1091int 1092qlcnic_need_fw_reset(struct qlcnic_adapter *adapter) 1093{ 1094 if ((adapter->flags & QLCNIC_FW_HANG) || 1095 qlcnic_check_fw_hearbeat(adapter)) { 1096 qlcnic_rom_lock_recovery(adapter); 1097 return 1; 1098 } 1099 1100 if (adapter->need_fw_reset) 1101 return 1; 1102 1103 if (adapter->fw) 1104 return 1; 1105 1106 return 0; 1107} 1108 1109static const char *fw_name[] = { 1110 QLCNIC_UNIFIED_ROMIMAGE_NAME, 1111 QLCNIC_FLASH_ROMIMAGE_NAME, 1112}; 1113 1114int 1115qlcnic_load_firmware(struct qlcnic_adapter *adapter) 1116{ 1117 __le64 *ptr64; 1118 u32 i, flashaddr, size; 1119 const struct firmware *fw = adapter->fw; 1120 struct pci_dev *pdev = adapter->pdev; 1121 1122 dev_info(&pdev->dev, "loading firmware from %s\n", 1123 fw_name[adapter->ahw->fw_type]); 1124 1125 if (fw) { 1126 u64 data; 1127 1128 size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8; 1129 1130 ptr64 = (__le64 *)qlcnic_get_bootld_offs(adapter); 1131 flashaddr = QLCNIC_BOOTLD_START; 1132 1133 for (i = 0; i < size; i++) { 1134 data = le64_to_cpu(ptr64[i]); 1135 1136 if (qlcnic_pci_mem_write_2M(adapter, flashaddr, data)) 1137 return -EIO; 1138 1139 flashaddr += 8; 1140 } 1141 1142 size = qlcnic_get_fw_size(adapter) / 8; 1143 1144 ptr64 = (__le64 *)qlcnic_get_fw_offs(adapter); 1145 flashaddr = QLCNIC_IMAGE_START; 1146 1147 for (i = 0; i < size; i++) { 1148 data = le64_to_cpu(ptr64[i]); 1149 1150 if (qlcnic_pci_mem_write_2M(adapter, 1151 flashaddr, data)) 1152 return -EIO; 1153 1154 flashaddr += 8; 1155 } 1156 1157 size = qlcnic_get_fw_size(adapter) % 8; 1158 if (size) { 1159 data = le64_to_cpu(ptr64[i]); 1160 1161 if (qlcnic_pci_mem_write_2M(adapter, 1162 flashaddr, data)) 1163 return -EIO; 1164 } 1165 1166 } else { 1167 u64 data; 1168 u32 hi, lo; 1169 int ret; 1170 struct qlcnic_flt_entry bootld_entry; 1171 1172 ret = qlcnic_get_flt_entry(adapter, QLCNIC_BOOTLD_REGION, 1173 &bootld_entry); 1174 if (!ret) { 1175 size = bootld_entry.size / 8; 1176 flashaddr = bootld_entry.start_addr; 1177 } else { 1178 size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8; 1179 flashaddr = QLCNIC_BOOTLD_START; 1180 dev_info(&pdev->dev, 1181 "using legacy method to get flash fw region"); 1182 } 1183 1184 for (i = 0; i < size; i++) { 1185 if (qlcnic_rom_fast_read(adapter, 1186 flashaddr, (int *)&lo) != 0) 1187 return -EIO; 1188 if (qlcnic_rom_fast_read(adapter, 1189 flashaddr + 4, (int *)&hi) != 0) 1190 return -EIO; 1191 1192 data = (((u64)hi << 32) | lo); 1193 1194 if (qlcnic_pci_mem_write_2M(adapter, 1195 flashaddr, data)) 1196 return -EIO; 1197 1198 flashaddr += 8; 1199 } 1200 } 1201 usleep_range(1000, 1500); 1202 1203 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x18, 0x1020); 1204 QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0x80001e); 1205 return 0; 1206} 1207 1208static int 1209qlcnic_validate_firmware(struct qlcnic_adapter *adapter) 1210{ 1211 u32 val; 1212 u32 ver, bios, min_size; 1213 struct pci_dev *pdev = adapter->pdev; 1214 const struct firmware *fw = adapter->fw; 1215 u8 fw_type = adapter->ahw->fw_type; 1216 1217 if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) { 1218 if (qlcnic_validate_unified_romimage(adapter)) 1219 return -EINVAL; 1220 1221 min_size = QLCNIC_UNI_FW_MIN_SIZE; 1222 } else { 1223 val = le32_to_cpu(*(__le32 *)&fw->data[QLCNIC_FW_MAGIC_OFFSET]); 1224 if (val != QLCNIC_BDINFO_MAGIC) 1225 return -EINVAL; 1226 1227 min_size = QLCNIC_FW_MIN_SIZE; 1228 } 1229 1230 if (fw->size < min_size) 1231 return -EINVAL; 1232 1233 val = qlcnic_get_fw_version(adapter); 1234 ver = QLCNIC_DECODE_VERSION(val); 1235 1236 if (ver < QLCNIC_MIN_FW_VERSION) { 1237 dev_err(&pdev->dev, 1238 "%s: firmware version %d.%d.%d unsupported\n", 1239 fw_name[fw_type], _major(ver), _minor(ver), _build(ver)); 1240 return -EINVAL; 1241 } 1242 1243 val = qlcnic_get_bios_version(adapter); 1244 qlcnic_rom_fast_read(adapter, QLCNIC_BIOS_VERSION_OFFSET, (int *)&bios); 1245 if (val != bios) { 1246 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n", 1247 fw_name[fw_type]); 1248 return -EINVAL; 1249 } 1250 1251 QLC_SHARED_REG_WR32(adapter, QLCNIC_FW_IMG_VALID, QLCNIC_BDINFO_MAGIC); 1252 return 0; 1253} 1254 1255static void 1256qlcnic_get_next_fwtype(struct qlcnic_adapter *adapter) 1257{ 1258 u8 fw_type; 1259 1260 switch (adapter->ahw->fw_type) { 1261 case QLCNIC_UNKNOWN_ROMIMAGE: 1262 fw_type = QLCNIC_UNIFIED_ROMIMAGE; 1263 break; 1264 1265 case QLCNIC_UNIFIED_ROMIMAGE: 1266 default: 1267 fw_type = QLCNIC_FLASH_ROMIMAGE; 1268 break; 1269 } 1270 1271 adapter->ahw->fw_type = fw_type; 1272} 1273 1274 1275 1276void qlcnic_request_firmware(struct qlcnic_adapter *adapter) 1277{ 1278 struct pci_dev *pdev = adapter->pdev; 1279 int rc; 1280 1281 adapter->ahw->fw_type = QLCNIC_UNKNOWN_ROMIMAGE; 1282 1283next: 1284 qlcnic_get_next_fwtype(adapter); 1285 1286 if (adapter->ahw->fw_type == QLCNIC_FLASH_ROMIMAGE) { 1287 adapter->fw = NULL; 1288 } else { 1289 rc = request_firmware(&adapter->fw, 1290 fw_name[adapter->ahw->fw_type], 1291 &pdev->dev); 1292 if (rc != 0) 1293 goto next; 1294 1295 rc = qlcnic_validate_firmware(adapter); 1296 if (rc != 0) { 1297 release_firmware(adapter->fw); 1298 usleep_range(1000, 1500); 1299 goto next; 1300 } 1301 } 1302} 1303 1304 1305void 1306qlcnic_release_firmware(struct qlcnic_adapter *adapter) 1307{ 1308 release_firmware(adapter->fw); 1309 adapter->fw = NULL; 1310} 1311