1/*
2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include "asix.h"
23
24#define PHY_MODE_MARVELL	0x0000
25#define MII_MARVELL_LED_CTRL	0x0018
26#define MII_MARVELL_STATUS	0x001b
27#define MII_MARVELL_CTRL	0x0014
28
29#define MARVELL_LED_MANUAL	0x0019
30
31#define MARVELL_STATUS_HWCFG	0x0004
32
33#define MARVELL_CTRL_TXDELAY	0x0002
34#define MARVELL_CTRL_RXDELAY	0x0080
35
36#define	PHY_MODE_RTL8211CL	0x000C
37
38struct ax88172_int_data {
39	__le16 res1;
40	u8 link;
41	__le16 res2;
42	u8 status;
43	__le16 res3;
44} __packed;
45
46static void asix_status(struct usbnet *dev, struct urb *urb)
47{
48	struct ax88172_int_data *event;
49	int link;
50
51	if (urb->actual_length < 8)
52		return;
53
54	event = urb->transfer_buffer;
55	link = event->link & 0x01;
56	if (netif_carrier_ok(dev->net) != link) {
57		usbnet_link_change(dev, link, 1);
58		netdev_dbg(dev->net, "Link Status is: %d\n", link);
59	}
60}
61
62static void asix_set_netdev_dev_addr(struct usbnet *dev, u8 *addr)
63{
64	if (is_valid_ether_addr(addr)) {
65		memcpy(dev->net->dev_addr, addr, ETH_ALEN);
66	} else {
67		netdev_info(dev->net, "invalid hw address, using random\n");
68		eth_hw_addr_random(dev->net);
69	}
70}
71
72/* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
73static u32 asix_get_phyid(struct usbnet *dev)
74{
75	int phy_reg;
76	u32 phy_id;
77	int i;
78
79	/* Poll for the rare case the FW or phy isn't ready yet.  */
80	for (i = 0; i < 100; i++) {
81		phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
82		if (phy_reg != 0 && phy_reg != 0xFFFF)
83			break;
84		mdelay(1);
85	}
86
87	if (phy_reg <= 0 || phy_reg == 0xFFFF)
88		return 0;
89
90	phy_id = (phy_reg & 0xffff) << 16;
91
92	phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
93	if (phy_reg < 0)
94		return 0;
95
96	phy_id |= (phy_reg & 0xffff);
97
98	return phy_id;
99}
100
101static u32 asix_get_link(struct net_device *net)
102{
103	struct usbnet *dev = netdev_priv(net);
104
105	return mii_link_ok(&dev->mii);
106}
107
108static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
109{
110	struct usbnet *dev = netdev_priv(net);
111
112	return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
113}
114
115/* We need to override some ethtool_ops so we require our
116   own structure so we don't interfere with other usbnet
117   devices that may be connected at the same time. */
118static const struct ethtool_ops ax88172_ethtool_ops = {
119	.get_drvinfo		= asix_get_drvinfo,
120	.get_link		= asix_get_link,
121	.get_msglevel		= usbnet_get_msglevel,
122	.set_msglevel		= usbnet_set_msglevel,
123	.get_wol		= asix_get_wol,
124	.set_wol		= asix_set_wol,
125	.get_eeprom_len		= asix_get_eeprom_len,
126	.get_eeprom		= asix_get_eeprom,
127	.set_eeprom		= asix_set_eeprom,
128	.get_settings		= usbnet_get_settings,
129	.set_settings		= usbnet_set_settings,
130	.nway_reset		= usbnet_nway_reset,
131};
132
133static void ax88172_set_multicast(struct net_device *net)
134{
135	struct usbnet *dev = netdev_priv(net);
136	struct asix_data *data = (struct asix_data *)&dev->data;
137	u8 rx_ctl = 0x8c;
138
139	if (net->flags & IFF_PROMISC) {
140		rx_ctl |= 0x01;
141	} else if (net->flags & IFF_ALLMULTI ||
142		   netdev_mc_count(net) > AX_MAX_MCAST) {
143		rx_ctl |= 0x02;
144	} else if (netdev_mc_empty(net)) {
145		/* just broadcast and directed */
146	} else {
147		/* We use the 20 byte dev->data
148		 * for our 8 byte filter buffer
149		 * to avoid allocating memory that
150		 * is tricky to free later */
151		struct netdev_hw_addr *ha;
152		u32 crc_bits;
153
154		memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
155
156		/* Build the multicast hash filter. */
157		netdev_for_each_mc_addr(ha, net) {
158			crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
159			data->multi_filter[crc_bits >> 3] |=
160			    1 << (crc_bits & 7);
161		}
162
163		asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
164				   AX_MCAST_FILTER_SIZE, data->multi_filter);
165
166		rx_ctl |= 0x10;
167	}
168
169	asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
170}
171
172static int ax88172_link_reset(struct usbnet *dev)
173{
174	u8 mode;
175	struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
176
177	mii_check_media(&dev->mii, 1, 1);
178	mii_ethtool_gset(&dev->mii, &ecmd);
179	mode = AX88172_MEDIUM_DEFAULT;
180
181	if (ecmd.duplex != DUPLEX_FULL)
182		mode |= ~AX88172_MEDIUM_FD;
183
184	netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
185		   ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
186
187	asix_write_medium_mode(dev, mode);
188
189	return 0;
190}
191
192static const struct net_device_ops ax88172_netdev_ops = {
193	.ndo_open		= usbnet_open,
194	.ndo_stop		= usbnet_stop,
195	.ndo_start_xmit		= usbnet_start_xmit,
196	.ndo_tx_timeout		= usbnet_tx_timeout,
197	.ndo_change_mtu		= usbnet_change_mtu,
198	.ndo_set_mac_address 	= eth_mac_addr,
199	.ndo_validate_addr	= eth_validate_addr,
200	.ndo_do_ioctl		= asix_ioctl,
201	.ndo_set_rx_mode	= ax88172_set_multicast,
202};
203
204static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
205{
206	int ret = 0;
207	u8 buf[ETH_ALEN];
208	int i;
209	unsigned long gpio_bits = dev->driver_info->data;
210
211	usbnet_get_endpoints(dev,intf);
212
213	/* Toggle the GPIOs in a manufacturer/model specific way */
214	for (i = 2; i >= 0; i--) {
215		ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
216				(gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL);
217		if (ret < 0)
218			goto out;
219		msleep(5);
220	}
221
222	ret = asix_write_rx_ctl(dev, 0x80);
223	if (ret < 0)
224		goto out;
225
226	/* Get the MAC address */
227	ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
228	if (ret < 0) {
229		netdev_dbg(dev->net, "read AX_CMD_READ_NODE_ID failed: %d\n",
230			   ret);
231		goto out;
232	}
233
234	asix_set_netdev_dev_addr(dev, buf);
235
236	/* Initialize MII structure */
237	dev->mii.dev = dev->net;
238	dev->mii.mdio_read = asix_mdio_read;
239	dev->mii.mdio_write = asix_mdio_write;
240	dev->mii.phy_id_mask = 0x3f;
241	dev->mii.reg_num_mask = 0x1f;
242	dev->mii.phy_id = asix_get_phy_addr(dev);
243
244	dev->net->netdev_ops = &ax88172_netdev_ops;
245	dev->net->ethtool_ops = &ax88172_ethtool_ops;
246	dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
247	dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
248
249	asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
250	asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
251		ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
252	mii_nway_restart(&dev->mii);
253
254	return 0;
255
256out:
257	return ret;
258}
259
260static const struct ethtool_ops ax88772_ethtool_ops = {
261	.get_drvinfo		= asix_get_drvinfo,
262	.get_link		= asix_get_link,
263	.get_msglevel		= usbnet_get_msglevel,
264	.set_msglevel		= usbnet_set_msglevel,
265	.get_wol		= asix_get_wol,
266	.set_wol		= asix_set_wol,
267	.get_eeprom_len		= asix_get_eeprom_len,
268	.get_eeprom		= asix_get_eeprom,
269	.set_eeprom		= asix_set_eeprom,
270	.get_settings		= usbnet_get_settings,
271	.set_settings		= usbnet_set_settings,
272	.nway_reset		= usbnet_nway_reset,
273};
274
275static int ax88772_link_reset(struct usbnet *dev)
276{
277	u16 mode;
278	struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
279
280	mii_check_media(&dev->mii, 1, 1);
281	mii_ethtool_gset(&dev->mii, &ecmd);
282	mode = AX88772_MEDIUM_DEFAULT;
283
284	if (ethtool_cmd_speed(&ecmd) != SPEED_100)
285		mode &= ~AX_MEDIUM_PS;
286
287	if (ecmd.duplex != DUPLEX_FULL)
288		mode &= ~AX_MEDIUM_FD;
289
290	netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
291		   ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
292
293	asix_write_medium_mode(dev, mode);
294
295	return 0;
296}
297
298static int ax88772_reset(struct usbnet *dev)
299{
300	struct asix_data *data = (struct asix_data *)&dev->data;
301	int ret, embd_phy;
302	u16 rx_ctl;
303
304	ret = asix_write_gpio(dev,
305			AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5);
306	if (ret < 0)
307		goto out;
308
309	embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
310
311	ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
312	if (ret < 0) {
313		netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
314		goto out;
315	}
316
317	ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
318	if (ret < 0)
319		goto out;
320
321	msleep(150);
322
323	ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
324	if (ret < 0)
325		goto out;
326
327	msleep(150);
328
329	if (embd_phy) {
330		ret = asix_sw_reset(dev, AX_SWRESET_IPRL);
331		if (ret < 0)
332			goto out;
333	} else {
334		ret = asix_sw_reset(dev, AX_SWRESET_PRTE);
335		if (ret < 0)
336			goto out;
337	}
338
339	msleep(150);
340	rx_ctl = asix_read_rx_ctl(dev);
341	netdev_dbg(dev->net, "RX_CTL is 0x%04x after software reset\n", rx_ctl);
342	ret = asix_write_rx_ctl(dev, 0x0000);
343	if (ret < 0)
344		goto out;
345
346	rx_ctl = asix_read_rx_ctl(dev);
347	netdev_dbg(dev->net, "RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl);
348
349	ret = asix_sw_reset(dev, AX_SWRESET_PRL);
350	if (ret < 0)
351		goto out;
352
353	msleep(150);
354
355	ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL);
356	if (ret < 0)
357		goto out;
358
359	msleep(150);
360
361	asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
362	asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
363			ADVERTISE_ALL | ADVERTISE_CSMA);
364	mii_nway_restart(&dev->mii);
365
366	ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT);
367	if (ret < 0)
368		goto out;
369
370	ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
371				AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
372				AX88772_IPG2_DEFAULT, 0, NULL);
373	if (ret < 0) {
374		netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
375		goto out;
376	}
377
378	/* Rewrite MAC address */
379	memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
380	ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
381							data->mac_addr);
382	if (ret < 0)
383		goto out;
384
385	/* Set RX_CTL to default values with 2k buffer, and enable cactus */
386	ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
387	if (ret < 0)
388		goto out;
389
390	rx_ctl = asix_read_rx_ctl(dev);
391	netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
392		   rx_ctl);
393
394	rx_ctl = asix_read_medium_status(dev);
395	netdev_dbg(dev->net,
396		   "Medium Status is 0x%04x after all initializations\n",
397		   rx_ctl);
398
399	return 0;
400
401out:
402	return ret;
403
404}
405
406static const struct net_device_ops ax88772_netdev_ops = {
407	.ndo_open		= usbnet_open,
408	.ndo_stop		= usbnet_stop,
409	.ndo_start_xmit		= usbnet_start_xmit,
410	.ndo_tx_timeout		= usbnet_tx_timeout,
411	.ndo_change_mtu		= usbnet_change_mtu,
412	.ndo_set_mac_address 	= asix_set_mac_address,
413	.ndo_validate_addr	= eth_validate_addr,
414	.ndo_do_ioctl		= asix_ioctl,
415	.ndo_set_rx_mode        = asix_set_multicast,
416};
417
418static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
419{
420	int ret, embd_phy, i;
421	u8 buf[ETH_ALEN];
422	u32 phyid;
423
424	usbnet_get_endpoints(dev,intf);
425
426	/* Get the MAC address */
427	if (dev->driver_info->data & FLAG_EEPROM_MAC) {
428		for (i = 0; i < (ETH_ALEN >> 1); i++) {
429			ret = asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x04 + i,
430					0, 2, buf + i * 2);
431			if (ret < 0)
432				break;
433		}
434	} else {
435		ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
436				0, 0, ETH_ALEN, buf);
437	}
438
439	if (ret < 0) {
440		netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
441		return ret;
442	}
443
444	asix_set_netdev_dev_addr(dev, buf);
445
446	/* Initialize MII structure */
447	dev->mii.dev = dev->net;
448	dev->mii.mdio_read = asix_mdio_read;
449	dev->mii.mdio_write = asix_mdio_write;
450	dev->mii.phy_id_mask = 0x1f;
451	dev->mii.reg_num_mask = 0x1f;
452	dev->mii.phy_id = asix_get_phy_addr(dev);
453
454	dev->net->netdev_ops = &ax88772_netdev_ops;
455	dev->net->ethtool_ops = &ax88772_ethtool_ops;
456	dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
457	dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
458
459	embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
460
461	/* Reset the PHY to normal operation mode */
462	ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
463	if (ret < 0) {
464		netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
465		return ret;
466	}
467
468	ax88772_reset(dev);
469
470	/* Read PHYID register *AFTER* the PHY was reset properly */
471	phyid = asix_get_phyid(dev);
472	netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
473
474	/* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
475	if (dev->driver_info->flags & FLAG_FRAMING_AX) {
476		/* hard_mtu  is still the default - the device does not support
477		   jumbo eth frames */
478		dev->rx_urb_size = 2048;
479	}
480
481	dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
482	if (!dev->driver_priv)
483		return -ENOMEM;
484
485	return 0;
486}
487
488static void ax88772_unbind(struct usbnet *dev, struct usb_interface *intf)
489{
490	kfree(dev->driver_priv);
491}
492
493static const struct ethtool_ops ax88178_ethtool_ops = {
494	.get_drvinfo		= asix_get_drvinfo,
495	.get_link		= asix_get_link,
496	.get_msglevel		= usbnet_get_msglevel,
497	.set_msglevel		= usbnet_set_msglevel,
498	.get_wol		= asix_get_wol,
499	.set_wol		= asix_set_wol,
500	.get_eeprom_len		= asix_get_eeprom_len,
501	.get_eeprom		= asix_get_eeprom,
502	.set_eeprom		= asix_set_eeprom,
503	.get_settings		= usbnet_get_settings,
504	.set_settings		= usbnet_set_settings,
505	.nway_reset		= usbnet_nway_reset,
506};
507
508static int marvell_phy_init(struct usbnet *dev)
509{
510	struct asix_data *data = (struct asix_data *)&dev->data;
511	u16 reg;
512
513	netdev_dbg(dev->net, "marvell_phy_init()\n");
514
515	reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
516	netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
517
518	asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
519			MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
520
521	if (data->ledmode) {
522		reg = asix_mdio_read(dev->net, dev->mii.phy_id,
523			MII_MARVELL_LED_CTRL);
524		netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
525
526		reg &= 0xf8ff;
527		reg |= (1 + 0x0100);
528		asix_mdio_write(dev->net, dev->mii.phy_id,
529			MII_MARVELL_LED_CTRL, reg);
530
531		reg = asix_mdio_read(dev->net, dev->mii.phy_id,
532			MII_MARVELL_LED_CTRL);
533		netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
534		reg &= 0xfc0f;
535	}
536
537	return 0;
538}
539
540static int rtl8211cl_phy_init(struct usbnet *dev)
541{
542	struct asix_data *data = (struct asix_data *)&dev->data;
543
544	netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");
545
546	asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
547	asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
548	asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
549		asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
550	asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
551
552	if (data->ledmode == 12) {
553		asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
554		asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
555		asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
556	}
557
558	return 0;
559}
560
561static int marvell_led_status(struct usbnet *dev, u16 speed)
562{
563	u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
564
565	netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
566
567	/* Clear out the center LED bits - 0x03F0 */
568	reg &= 0xfc0f;
569
570	switch (speed) {
571		case SPEED_1000:
572			reg |= 0x03e0;
573			break;
574		case SPEED_100:
575			reg |= 0x03b0;
576			break;
577		default:
578			reg |= 0x02f0;
579	}
580
581	netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
582	asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
583
584	return 0;
585}
586
587static int ax88178_reset(struct usbnet *dev)
588{
589	struct asix_data *data = (struct asix_data *)&dev->data;
590	int ret;
591	__le16 eeprom;
592	u8 status;
593	int gpio0 = 0;
594	u32 phyid;
595
596	asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
597	netdev_dbg(dev->net, "GPIO Status: 0x%04x\n", status);
598
599	asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
600	asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
601	asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
602
603	netdev_dbg(dev->net, "EEPROM index 0x17 is 0x%04x\n", eeprom);
604
605	if (eeprom == cpu_to_le16(0xffff)) {
606		data->phymode = PHY_MODE_MARVELL;
607		data->ledmode = 0;
608		gpio0 = 1;
609	} else {
610		data->phymode = le16_to_cpu(eeprom) & 0x7F;
611		data->ledmode = le16_to_cpu(eeprom) >> 8;
612		gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
613	}
614	netdev_dbg(dev->net, "GPIO0: %d, PhyMode: %d\n", gpio0, data->phymode);
615
616	/* Power up external GigaPHY through AX88178 GPIO pin */
617	asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
618	if ((le16_to_cpu(eeprom) >> 8) != 1) {
619		asix_write_gpio(dev, 0x003c, 30);
620		asix_write_gpio(dev, 0x001c, 300);
621		asix_write_gpio(dev, 0x003c, 30);
622	} else {
623		netdev_dbg(dev->net, "gpio phymode == 1 path\n");
624		asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
625		asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
626	}
627
628	/* Read PHYID register *AFTER* powering up PHY */
629	phyid = asix_get_phyid(dev);
630	netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
631
632	/* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
633	asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL);
634
635	asix_sw_reset(dev, 0);
636	msleep(150);
637
638	asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
639	msleep(150);
640
641	asix_write_rx_ctl(dev, 0);
642
643	if (data->phymode == PHY_MODE_MARVELL) {
644		marvell_phy_init(dev);
645		msleep(60);
646	} else if (data->phymode == PHY_MODE_RTL8211CL)
647		rtl8211cl_phy_init(dev);
648
649	asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
650			BMCR_RESET | BMCR_ANENABLE);
651	asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
652			ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
653	asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
654			ADVERTISE_1000FULL);
655
656	mii_nway_restart(&dev->mii);
657
658	ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT);
659	if (ret < 0)
660		return ret;
661
662	/* Rewrite MAC address */
663	memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
664	ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
665							data->mac_addr);
666	if (ret < 0)
667		return ret;
668
669	ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
670	if (ret < 0)
671		return ret;
672
673	return 0;
674}
675
676static int ax88178_link_reset(struct usbnet *dev)
677{
678	u16 mode;
679	struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
680	struct asix_data *data = (struct asix_data *)&dev->data;
681	u32 speed;
682
683	netdev_dbg(dev->net, "ax88178_link_reset()\n");
684
685	mii_check_media(&dev->mii, 1, 1);
686	mii_ethtool_gset(&dev->mii, &ecmd);
687	mode = AX88178_MEDIUM_DEFAULT;
688	speed = ethtool_cmd_speed(&ecmd);
689
690	if (speed == SPEED_1000)
691		mode |= AX_MEDIUM_GM;
692	else if (speed == SPEED_100)
693		mode |= AX_MEDIUM_PS;
694	else
695		mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
696
697	mode |= AX_MEDIUM_ENCK;
698
699	if (ecmd.duplex == DUPLEX_FULL)
700		mode |= AX_MEDIUM_FD;
701	else
702		mode &= ~AX_MEDIUM_FD;
703
704	netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
705		   speed, ecmd.duplex, mode);
706
707	asix_write_medium_mode(dev, mode);
708
709	if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
710		marvell_led_status(dev, speed);
711
712	return 0;
713}
714
715static void ax88178_set_mfb(struct usbnet *dev)
716{
717	u16 mfb = AX_RX_CTL_MFB_16384;
718	u16 rxctl;
719	u16 medium;
720	int old_rx_urb_size = dev->rx_urb_size;
721
722	if (dev->hard_mtu < 2048) {
723		dev->rx_urb_size = 2048;
724		mfb = AX_RX_CTL_MFB_2048;
725	} else if (dev->hard_mtu < 4096) {
726		dev->rx_urb_size = 4096;
727		mfb = AX_RX_CTL_MFB_4096;
728	} else if (dev->hard_mtu < 8192) {
729		dev->rx_urb_size = 8192;
730		mfb = AX_RX_CTL_MFB_8192;
731	} else if (dev->hard_mtu < 16384) {
732		dev->rx_urb_size = 16384;
733		mfb = AX_RX_CTL_MFB_16384;
734	}
735
736	rxctl = asix_read_rx_ctl(dev);
737	asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
738
739	medium = asix_read_medium_status(dev);
740	if (dev->net->mtu > 1500)
741		medium |= AX_MEDIUM_JFE;
742	else
743		medium &= ~AX_MEDIUM_JFE;
744	asix_write_medium_mode(dev, medium);
745
746	if (dev->rx_urb_size > old_rx_urb_size)
747		usbnet_unlink_rx_urbs(dev);
748}
749
750static int ax88178_change_mtu(struct net_device *net, int new_mtu)
751{
752	struct usbnet *dev = netdev_priv(net);
753	int ll_mtu = new_mtu + net->hard_header_len + 4;
754
755	netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
756
757	if (new_mtu <= 0 || ll_mtu > 16384)
758		return -EINVAL;
759
760	if ((ll_mtu % dev->maxpacket) == 0)
761		return -EDOM;
762
763	net->mtu = new_mtu;
764	dev->hard_mtu = net->mtu + net->hard_header_len;
765	ax88178_set_mfb(dev);
766
767	/* max qlen depend on hard_mtu and rx_urb_size */
768	usbnet_update_max_qlen(dev);
769
770	return 0;
771}
772
773static const struct net_device_ops ax88178_netdev_ops = {
774	.ndo_open		= usbnet_open,
775	.ndo_stop		= usbnet_stop,
776	.ndo_start_xmit		= usbnet_start_xmit,
777	.ndo_tx_timeout		= usbnet_tx_timeout,
778	.ndo_set_mac_address 	= asix_set_mac_address,
779	.ndo_validate_addr	= eth_validate_addr,
780	.ndo_set_rx_mode	= asix_set_multicast,
781	.ndo_do_ioctl 		= asix_ioctl,
782	.ndo_change_mtu 	= ax88178_change_mtu,
783};
784
785static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
786{
787	int ret;
788	u8 buf[ETH_ALEN];
789
790	usbnet_get_endpoints(dev,intf);
791
792	/* Get the MAC address */
793	ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
794	if (ret < 0) {
795		netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
796		return ret;
797	}
798
799	asix_set_netdev_dev_addr(dev, buf);
800
801	/* Initialize MII structure */
802	dev->mii.dev = dev->net;
803	dev->mii.mdio_read = asix_mdio_read;
804	dev->mii.mdio_write = asix_mdio_write;
805	dev->mii.phy_id_mask = 0x1f;
806	dev->mii.reg_num_mask = 0xff;
807	dev->mii.supports_gmii = 1;
808	dev->mii.phy_id = asix_get_phy_addr(dev);
809
810	dev->net->netdev_ops = &ax88178_netdev_ops;
811	dev->net->ethtool_ops = &ax88178_ethtool_ops;
812
813	/* Blink LEDS so users know driver saw dongle */
814	asix_sw_reset(dev, 0);
815	msleep(150);
816
817	asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
818	msleep(150);
819
820	/* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
821	if (dev->driver_info->flags & FLAG_FRAMING_AX) {
822		/* hard_mtu  is still the default - the device does not support
823		   jumbo eth frames */
824		dev->rx_urb_size = 2048;
825	}
826
827	dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
828	if (!dev->driver_priv)
829			return -ENOMEM;
830
831	return 0;
832}
833
834static const struct driver_info ax8817x_info = {
835	.description = "ASIX AX8817x USB 2.0 Ethernet",
836	.bind = ax88172_bind,
837	.status = asix_status,
838	.link_reset = ax88172_link_reset,
839	.reset = ax88172_link_reset,
840	.flags =  FLAG_ETHER | FLAG_LINK_INTR,
841	.data = 0x00130103,
842};
843
844static const struct driver_info dlink_dub_e100_info = {
845	.description = "DLink DUB-E100 USB Ethernet",
846	.bind = ax88172_bind,
847	.status = asix_status,
848	.link_reset = ax88172_link_reset,
849	.reset = ax88172_link_reset,
850	.flags =  FLAG_ETHER | FLAG_LINK_INTR,
851	.data = 0x009f9d9f,
852};
853
854static const struct driver_info netgear_fa120_info = {
855	.description = "Netgear FA-120 USB Ethernet",
856	.bind = ax88172_bind,
857	.status = asix_status,
858	.link_reset = ax88172_link_reset,
859	.reset = ax88172_link_reset,
860	.flags =  FLAG_ETHER | FLAG_LINK_INTR,
861	.data = 0x00130103,
862};
863
864static const struct driver_info hawking_uf200_info = {
865	.description = "Hawking UF200 USB Ethernet",
866	.bind = ax88172_bind,
867	.status = asix_status,
868	.link_reset = ax88172_link_reset,
869	.reset = ax88172_link_reset,
870	.flags =  FLAG_ETHER | FLAG_LINK_INTR,
871	.data = 0x001f1d1f,
872};
873
874static const struct driver_info ax88772_info = {
875	.description = "ASIX AX88772 USB 2.0 Ethernet",
876	.bind = ax88772_bind,
877	.unbind = ax88772_unbind,
878	.status = asix_status,
879	.link_reset = ax88772_link_reset,
880	.reset = ax88772_link_reset,
881	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | FLAG_MULTI_PACKET,
882	.rx_fixup = asix_rx_fixup_common,
883	.tx_fixup = asix_tx_fixup,
884};
885
886static const struct driver_info ax88772b_info = {
887	.description = "ASIX AX88772B USB 2.0 Ethernet",
888	.bind = ax88772_bind,
889	.unbind = ax88772_unbind,
890	.status = asix_status,
891	.link_reset = ax88772_link_reset,
892	.reset = ax88772_reset,
893	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
894	         FLAG_MULTI_PACKET,
895	.rx_fixup = asix_rx_fixup_common,
896	.tx_fixup = asix_tx_fixup,
897	.data = FLAG_EEPROM_MAC,
898};
899
900static const struct driver_info ax88178_info = {
901	.description = "ASIX AX88178 USB 2.0 Ethernet",
902	.bind = ax88178_bind,
903	.unbind = ax88772_unbind,
904	.status = asix_status,
905	.link_reset = ax88178_link_reset,
906	.reset = ax88178_reset,
907	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
908		 FLAG_MULTI_PACKET,
909	.rx_fixup = asix_rx_fixup_common,
910	.tx_fixup = asix_tx_fixup,
911};
912
913/*
914 * USBLINK 20F9 "USB 2.0 LAN" USB ethernet adapter, typically found in
915 * no-name packaging.
916 * USB device strings are:
917 *   1: Manufacturer: USBLINK
918 *   2: Product: HG20F9 USB2.0
919 *   3: Serial: 000003
920 * Appears to be compatible with Asix 88772B.
921 */
922static const struct driver_info hg20f9_info = {
923	.description = "HG20F9 USB 2.0 Ethernet",
924	.bind = ax88772_bind,
925	.unbind = ax88772_unbind,
926	.status = asix_status,
927	.link_reset = ax88772_link_reset,
928	.reset = ax88772_reset,
929	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
930	         FLAG_MULTI_PACKET,
931	.rx_fixup = asix_rx_fixup_common,
932	.tx_fixup = asix_tx_fixup,
933	.data = FLAG_EEPROM_MAC,
934};
935
936static const struct usb_device_id	products [] = {
937{
938	// Linksys USB200M
939	USB_DEVICE (0x077b, 0x2226),
940	.driver_info =	(unsigned long) &ax8817x_info,
941}, {
942	// Netgear FA120
943	USB_DEVICE (0x0846, 0x1040),
944	.driver_info =  (unsigned long) &netgear_fa120_info,
945}, {
946	// DLink DUB-E100
947	USB_DEVICE (0x2001, 0x1a00),
948	.driver_info =  (unsigned long) &dlink_dub_e100_info,
949}, {
950	// Intellinet, ST Lab USB Ethernet
951	USB_DEVICE (0x0b95, 0x1720),
952	.driver_info =  (unsigned long) &ax8817x_info,
953}, {
954	// Hawking UF200, TrendNet TU2-ET100
955	USB_DEVICE (0x07b8, 0x420a),
956	.driver_info =  (unsigned long) &hawking_uf200_info,
957}, {
958	// Billionton Systems, USB2AR
959	USB_DEVICE (0x08dd, 0x90ff),
960	.driver_info =  (unsigned long) &ax8817x_info,
961}, {
962	// ATEN UC210T
963	USB_DEVICE (0x0557, 0x2009),
964	.driver_info =  (unsigned long) &ax8817x_info,
965}, {
966	// Buffalo LUA-U2-KTX
967	USB_DEVICE (0x0411, 0x003d),
968	.driver_info =  (unsigned long) &ax8817x_info,
969}, {
970	// Buffalo LUA-U2-GT 10/100/1000
971	USB_DEVICE (0x0411, 0x006e),
972	.driver_info =  (unsigned long) &ax88178_info,
973}, {
974	// Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
975	USB_DEVICE (0x6189, 0x182d),
976	.driver_info =  (unsigned long) &ax8817x_info,
977}, {
978	// Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
979	USB_DEVICE (0x0df6, 0x0056),
980	.driver_info =  (unsigned long) &ax88178_info,
981}, {
982	// Sitecom LN-028 "USB 2.0 10/100/1000 Ethernet adapter"
983	USB_DEVICE (0x0df6, 0x061c),
984	.driver_info =  (unsigned long) &ax88178_info,
985}, {
986	// corega FEther USB2-TX
987	USB_DEVICE (0x07aa, 0x0017),
988	.driver_info =  (unsigned long) &ax8817x_info,
989}, {
990	// Surecom EP-1427X-2
991	USB_DEVICE (0x1189, 0x0893),
992	.driver_info = (unsigned long) &ax8817x_info,
993}, {
994	// goodway corp usb gwusb2e
995	USB_DEVICE (0x1631, 0x6200),
996	.driver_info = (unsigned long) &ax8817x_info,
997}, {
998	// JVC MP-PRX1 Port Replicator
999	USB_DEVICE (0x04f1, 0x3008),
1000	.driver_info = (unsigned long) &ax8817x_info,
1001}, {
1002	// Lenovo U2L100P 10/100
1003	USB_DEVICE (0x17ef, 0x7203),
1004	.driver_info = (unsigned long) &ax88772_info,
1005}, {
1006	// ASIX AX88772B 10/100
1007	USB_DEVICE (0x0b95, 0x772b),
1008	.driver_info = (unsigned long) &ax88772b_info,
1009}, {
1010	// ASIX AX88772 10/100
1011	USB_DEVICE (0x0b95, 0x7720),
1012	.driver_info = (unsigned long) &ax88772_info,
1013}, {
1014	// ASIX AX88178 10/100/1000
1015	USB_DEVICE (0x0b95, 0x1780),
1016	.driver_info = (unsigned long) &ax88178_info,
1017}, {
1018	// Logitec LAN-GTJ/U2A
1019	USB_DEVICE (0x0789, 0x0160),
1020	.driver_info = (unsigned long) &ax88178_info,
1021}, {
1022	// Linksys USB200M Rev 2
1023	USB_DEVICE (0x13b1, 0x0018),
1024	.driver_info = (unsigned long) &ax88772_info,
1025}, {
1026	// 0Q0 cable ethernet
1027	USB_DEVICE (0x1557, 0x7720),
1028	.driver_info = (unsigned long) &ax88772_info,
1029}, {
1030	// DLink DUB-E100 H/W Ver B1
1031	USB_DEVICE (0x07d1, 0x3c05),
1032	.driver_info = (unsigned long) &ax88772_info,
1033}, {
1034	// DLink DUB-E100 H/W Ver B1 Alternate
1035	USB_DEVICE (0x2001, 0x3c05),
1036	.driver_info = (unsigned long) &ax88772_info,
1037}, {
1038       // DLink DUB-E100 H/W Ver C1
1039       USB_DEVICE (0x2001, 0x1a02),
1040       .driver_info = (unsigned long) &ax88772_info,
1041}, {
1042	// Linksys USB1000
1043	USB_DEVICE (0x1737, 0x0039),
1044	.driver_info = (unsigned long) &ax88178_info,
1045}, {
1046	// IO-DATA ETG-US2
1047	USB_DEVICE (0x04bb, 0x0930),
1048	.driver_info = (unsigned long) &ax88178_info,
1049}, {
1050	// Belkin F5D5055
1051	USB_DEVICE(0x050d, 0x5055),
1052	.driver_info = (unsigned long) &ax88178_info,
1053}, {
1054	// Apple USB Ethernet Adapter
1055	USB_DEVICE(0x05ac, 0x1402),
1056	.driver_info = (unsigned long) &ax88772_info,
1057}, {
1058	// Cables-to-Go USB Ethernet Adapter
1059	USB_DEVICE(0x0b95, 0x772a),
1060	.driver_info = (unsigned long) &ax88772_info,
1061}, {
1062	// ABOCOM for pci
1063	USB_DEVICE(0x14ea, 0xab11),
1064	.driver_info = (unsigned long) &ax88178_info,
1065}, {
1066	// ASIX 88772a
1067	USB_DEVICE(0x0db0, 0xa877),
1068	.driver_info = (unsigned long) &ax88772_info,
1069}, {
1070	// Asus USB Ethernet Adapter
1071	USB_DEVICE (0x0b95, 0x7e2b),
1072	.driver_info = (unsigned long) &ax88772_info,
1073}, {
1074	/* ASIX 88172a demo board */
1075	USB_DEVICE(0x0b95, 0x172a),
1076	.driver_info = (unsigned long) &ax88172a_info,
1077}, {
1078	/*
1079	 * USBLINK HG20F9 "USB 2.0 LAN"
1080	 * Appears to have gazumped Linksys's manufacturer ID but
1081	 * doesn't (yet) conflict with any known Linksys product.
1082	 */
1083	USB_DEVICE(0x066b, 0x20f9),
1084	.driver_info = (unsigned long) &hg20f9_info,
1085},
1086	{ },		// END
1087};
1088MODULE_DEVICE_TABLE(usb, products);
1089
1090static struct usb_driver asix_driver = {
1091	.name =		DRIVER_NAME,
1092	.id_table =	products,
1093	.probe =	usbnet_probe,
1094	.suspend =	usbnet_suspend,
1095	.resume =	usbnet_resume,
1096	.disconnect =	usbnet_disconnect,
1097	.supports_autosuspend = 1,
1098	.disable_hub_initiated_lpm = 1,
1099};
1100
1101module_usb_driver(asix_driver);
1102
1103MODULE_AUTHOR("David Hollis");
1104MODULE_VERSION(DRIVER_VERSION);
1105MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1106MODULE_LICENSE("GPL");
1107
1108