1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license.  When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
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15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18 * General Public License for more details.
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22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
23 * USA
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28 * Contact Information:
29 *  Intel Linux Wireless <ilw@linux.intel.com>
30 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 *
32 * BSD LICENSE
33 *
34 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
35 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
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64 *****************************************************************************/
65
66#ifndef __fw_api_h__
67#define __fw_api_h__
68
69#include "fw-api-rs.h"
70#include "fw-api-tx.h"
71#include "fw-api-sta.h"
72#include "fw-api-mac.h"
73#include "fw-api-power.h"
74#include "fw-api-d3.h"
75#include "fw-api-coex.h"
76#include "fw-api-scan.h"
77#include "fw-api-stats.h"
78
79/* Tx queue numbers */
80enum {
81	IWL_MVM_OFFCHANNEL_QUEUE = 8,
82	IWL_MVM_CMD_QUEUE = 9,
83};
84
85enum iwl_mvm_tx_fifo {
86	IWL_MVM_TX_FIFO_BK = 0,
87	IWL_MVM_TX_FIFO_BE,
88	IWL_MVM_TX_FIFO_VI,
89	IWL_MVM_TX_FIFO_VO,
90	IWL_MVM_TX_FIFO_MCAST = 5,
91	IWL_MVM_TX_FIFO_CMD = 7,
92};
93
94#define IWL_MVM_STATION_COUNT	16
95
96#define IWL_MVM_TDLS_STA_COUNT	4
97
98/* commands */
99enum {
100	MVM_ALIVE = 0x1,
101	REPLY_ERROR = 0x2,
102
103	INIT_COMPLETE_NOTIF = 0x4,
104
105	/* PHY context commands */
106	PHY_CONTEXT_CMD = 0x8,
107	DBG_CFG = 0x9,
108	ANTENNA_COUPLING_NOTIFICATION = 0xa,
109
110	/* UMAC scan commands */
111	SCAN_CFG_CMD = 0xc,
112	SCAN_REQ_UMAC = 0xd,
113	SCAN_ABORT_UMAC = 0xe,
114	SCAN_COMPLETE_UMAC = 0xf,
115
116	/* station table */
117	ADD_STA_KEY = 0x17,
118	ADD_STA = 0x18,
119	REMOVE_STA = 0x19,
120
121	/* TX */
122	TX_CMD = 0x1c,
123	TXPATH_FLUSH = 0x1e,
124	MGMT_MCAST_KEY = 0x1f,
125
126	/* scheduler config */
127	SCD_QUEUE_CFG = 0x1d,
128
129	/* global key */
130	WEP_KEY = 0x20,
131
132	/* Memory */
133	SHARED_MEM_CFG = 0x25,
134
135	/* TDLS */
136	TDLS_CHANNEL_SWITCH_CMD = 0x27,
137	TDLS_CHANNEL_SWITCH_NOTIFICATION = 0xaa,
138	TDLS_CONFIG_CMD = 0xa7,
139
140	/* MAC and Binding commands */
141	MAC_CONTEXT_CMD = 0x28,
142	TIME_EVENT_CMD = 0x29, /* both CMD and response */
143	TIME_EVENT_NOTIFICATION = 0x2a,
144	BINDING_CONTEXT_CMD = 0x2b,
145	TIME_QUOTA_CMD = 0x2c,
146	NON_QOS_TX_COUNTER_CMD = 0x2d,
147
148	LQ_CMD = 0x4e,
149
150	/* Calibration */
151	TEMPERATURE_NOTIFICATION = 0x62,
152	CALIBRATION_CFG_CMD = 0x65,
153	CALIBRATION_RES_NOTIFICATION = 0x66,
154	CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
155	RADIO_VERSION_NOTIFICATION = 0x68,
156
157	/* Scan offload */
158	SCAN_OFFLOAD_REQUEST_CMD = 0x51,
159	SCAN_OFFLOAD_ABORT_CMD = 0x52,
160	HOT_SPOT_CMD = 0x53,
161	SCAN_OFFLOAD_COMPLETE = 0x6D,
162	SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E,
163	SCAN_OFFLOAD_CONFIG_CMD = 0x6f,
164	MATCH_FOUND_NOTIFICATION = 0xd9,
165	SCAN_ITERATION_COMPLETE = 0xe7,
166
167	/* Phy */
168	PHY_CONFIGURATION_CMD = 0x6a,
169	CALIB_RES_NOTIF_PHY_DB = 0x6b,
170	/* PHY_DB_CMD = 0x6c, */
171
172	/* Power - legacy power table command */
173	POWER_TABLE_CMD = 0x77,
174	PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION = 0x78,
175	LTR_CONFIG = 0xee,
176
177	/* Thermal Throttling*/
178	REPLY_THERMAL_MNG_BACKOFF = 0x7e,
179
180	/* Scanning */
181	SCAN_REQUEST_CMD = 0x80,
182	SCAN_ABORT_CMD = 0x81,
183	SCAN_START_NOTIFICATION = 0x82,
184	SCAN_RESULTS_NOTIFICATION = 0x83,
185	SCAN_COMPLETE_NOTIFICATION = 0x84,
186
187	/* NVM */
188	NVM_ACCESS_CMD = 0x88,
189
190	SET_CALIB_DEFAULT_CMD = 0x8e,
191
192	BEACON_NOTIFICATION = 0x90,
193	BEACON_TEMPLATE_CMD = 0x91,
194	TX_ANT_CONFIGURATION_CMD = 0x98,
195	STATISTICS_CMD = 0x9c,
196	STATISTICS_NOTIFICATION = 0x9d,
197	EOSP_NOTIFICATION = 0x9e,
198	REDUCE_TX_POWER_CMD = 0x9f,
199
200	/* RF-KILL commands and notifications */
201	CARD_STATE_CMD = 0xa0,
202	CARD_STATE_NOTIFICATION = 0xa1,
203
204	MISSED_BEACONS_NOTIFICATION = 0xa2,
205
206	/* Power - new power table command */
207	MAC_PM_POWER_TABLE = 0xa9,
208
209	MFUART_LOAD_NOTIFICATION = 0xb1,
210
211	REPLY_RX_PHY_CMD = 0xc0,
212	REPLY_RX_MPDU_CMD = 0xc1,
213	BA_NOTIF = 0xc5,
214
215	/* Location Aware Regulatory */
216	MCC_UPDATE_CMD = 0xc8,
217	MCC_CHUB_UPDATE_CMD = 0xc9,
218
219	MARKER_CMD = 0xcb,
220
221	/* BT Coex */
222	BT_COEX_PRIO_TABLE = 0xcc,
223	BT_COEX_PROT_ENV = 0xcd,
224	BT_PROFILE_NOTIFICATION = 0xce,
225	BT_CONFIG = 0x9b,
226	BT_COEX_UPDATE_SW_BOOST = 0x5a,
227	BT_COEX_UPDATE_CORUN_LUT = 0x5b,
228	BT_COEX_UPDATE_REDUCED_TXP = 0x5c,
229	BT_COEX_CI = 0x5d,
230
231	REPLY_SF_CFG_CMD = 0xd1,
232	REPLY_BEACON_FILTERING_CMD = 0xd2,
233
234	/* DTS measurements */
235	CMD_DTS_MEASUREMENT_TRIGGER = 0xdc,
236	DTS_MEASUREMENT_NOTIFICATION = 0xdd,
237
238	REPLY_DEBUG_CMD = 0xf0,
239	DEBUG_LOG_MSG = 0xf7,
240
241	BCAST_FILTER_CMD = 0xcf,
242	MCAST_FILTER_CMD = 0xd0,
243
244	/* D3 commands/notifications */
245	D3_CONFIG_CMD = 0xd3,
246	PROT_OFFLOAD_CONFIG_CMD = 0xd4,
247	OFFLOADS_QUERY_CMD = 0xd5,
248	REMOTE_WAKE_CONFIG_CMD = 0xd6,
249	D0I3_END_CMD = 0xed,
250
251	/* for WoWLAN in particular */
252	WOWLAN_PATTERNS = 0xe0,
253	WOWLAN_CONFIGURATION = 0xe1,
254	WOWLAN_TSC_RSC_PARAM = 0xe2,
255	WOWLAN_TKIP_PARAM = 0xe3,
256	WOWLAN_KEK_KCK_MATERIAL = 0xe4,
257	WOWLAN_GET_STATUSES = 0xe5,
258	WOWLAN_TX_POWER_PER_DB = 0xe6,
259
260	/* and for NetDetect */
261	SCAN_OFFLOAD_PROFILES_QUERY_CMD = 0x56,
262	SCAN_OFFLOAD_HOTSPOTS_CONFIG_CMD = 0x58,
263	SCAN_OFFLOAD_HOTSPOTS_QUERY_CMD = 0x59,
264
265	REPLY_MAX = 0xff,
266};
267
268/**
269 * struct iwl_cmd_response - generic response struct for most commands
270 * @status: status of the command asked, changes for each one
271 */
272struct iwl_cmd_response {
273	__le32 status;
274};
275
276/*
277 * struct iwl_tx_ant_cfg_cmd
278 * @valid: valid antenna configuration
279 */
280struct iwl_tx_ant_cfg_cmd {
281	__le32 valid;
282} __packed;
283
284/*
285 * Calibration control struct.
286 * Sent as part of the phy configuration command.
287 * @flow_trigger: bitmap for which calibrations to perform according to
288 *		flow triggers.
289 * @event_trigger: bitmap for which calibrations to perform according to
290 *		event triggers.
291 */
292struct iwl_calib_ctrl {
293	__le32 flow_trigger;
294	__le32 event_trigger;
295} __packed;
296
297/* This enum defines the bitmap of various calibrations to enable in both
298 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
299 */
300enum iwl_calib_cfg {
301	IWL_CALIB_CFG_XTAL_IDX			= BIT(0),
302	IWL_CALIB_CFG_TEMPERATURE_IDX		= BIT(1),
303	IWL_CALIB_CFG_VOLTAGE_READ_IDX		= BIT(2),
304	IWL_CALIB_CFG_PAPD_IDX			= BIT(3),
305	IWL_CALIB_CFG_TX_PWR_IDX		= BIT(4),
306	IWL_CALIB_CFG_DC_IDX			= BIT(5),
307	IWL_CALIB_CFG_BB_FILTER_IDX		= BIT(6),
308	IWL_CALIB_CFG_LO_LEAKAGE_IDX		= BIT(7),
309	IWL_CALIB_CFG_TX_IQ_IDX			= BIT(8),
310	IWL_CALIB_CFG_TX_IQ_SKEW_IDX		= BIT(9),
311	IWL_CALIB_CFG_RX_IQ_IDX			= BIT(10),
312	IWL_CALIB_CFG_RX_IQ_SKEW_IDX		= BIT(11),
313	IWL_CALIB_CFG_SENSITIVITY_IDX		= BIT(12),
314	IWL_CALIB_CFG_CHAIN_NOISE_IDX		= BIT(13),
315	IWL_CALIB_CFG_DISCONNECTED_ANT_IDX	= BIT(14),
316	IWL_CALIB_CFG_ANT_COUPLING_IDX		= BIT(15),
317	IWL_CALIB_CFG_DAC_IDX			= BIT(16),
318	IWL_CALIB_CFG_ABS_IDX			= BIT(17),
319	IWL_CALIB_CFG_AGC_IDX			= BIT(18),
320};
321
322/*
323 * Phy configuration command.
324 */
325struct iwl_phy_cfg_cmd {
326	__le32	phy_cfg;
327	struct iwl_calib_ctrl calib_control;
328} __packed;
329
330#define PHY_CFG_RADIO_TYPE	(BIT(0) | BIT(1))
331#define PHY_CFG_RADIO_STEP	(BIT(2) | BIT(3))
332#define PHY_CFG_RADIO_DASH	(BIT(4) | BIT(5))
333#define PHY_CFG_PRODUCT_NUMBER	(BIT(6) | BIT(7))
334#define PHY_CFG_TX_CHAIN_A	BIT(8)
335#define PHY_CFG_TX_CHAIN_B	BIT(9)
336#define PHY_CFG_TX_CHAIN_C	BIT(10)
337#define PHY_CFG_RX_CHAIN_A	BIT(12)
338#define PHY_CFG_RX_CHAIN_B	BIT(13)
339#define PHY_CFG_RX_CHAIN_C	BIT(14)
340
341
342/* Target of the NVM_ACCESS_CMD */
343enum {
344	NVM_ACCESS_TARGET_CACHE = 0,
345	NVM_ACCESS_TARGET_OTP = 1,
346	NVM_ACCESS_TARGET_EEPROM = 2,
347};
348
349/* Section types for NVM_ACCESS_CMD */
350enum {
351	NVM_SECTION_TYPE_SW = 1,
352	NVM_SECTION_TYPE_REGULATORY = 3,
353	NVM_SECTION_TYPE_CALIBRATION = 4,
354	NVM_SECTION_TYPE_PRODUCTION = 5,
355	NVM_SECTION_TYPE_MAC_OVERRIDE = 11,
356	NVM_SECTION_TYPE_PHY_SKU = 12,
357	NVM_MAX_NUM_SECTIONS = 13,
358};
359
360/**
361 * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section
362 * @op_code: 0 - read, 1 - write
363 * @target: NVM_ACCESS_TARGET_*
364 * @type: NVM_SECTION_TYPE_*
365 * @offset: offset in bytes into the section
366 * @length: in bytes, to read/write
367 * @data: if write operation, the data to write. On read its empty
368 */
369struct iwl_nvm_access_cmd {
370	u8 op_code;
371	u8 target;
372	__le16 type;
373	__le16 offset;
374	__le16 length;
375	u8 data[];
376} __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */
377
378/**
379 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
380 * @offset: offset in bytes into the section
381 * @length: in bytes, either how much was written or read
382 * @type: NVM_SECTION_TYPE_*
383 * @status: 0 for success, fail otherwise
384 * @data: if read operation, the data returned. Empty on write.
385 */
386struct iwl_nvm_access_resp {
387	__le16 offset;
388	__le16 length;
389	__le16 type;
390	__le16 status;
391	u8 data[];
392} __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */
393
394/* MVM_ALIVE 0x1 */
395
396/* alive response is_valid values */
397#define ALIVE_RESP_UCODE_OK	BIT(0)
398#define ALIVE_RESP_RFKILL	BIT(1)
399
400/* alive response ver_type values */
401enum {
402	FW_TYPE_HW = 0,
403	FW_TYPE_PROT = 1,
404	FW_TYPE_AP = 2,
405	FW_TYPE_WOWLAN = 3,
406	FW_TYPE_TIMING = 4,
407	FW_TYPE_WIPAN = 5
408};
409
410/* alive response ver_subtype values */
411enum {
412	FW_SUBTYPE_FULL_FEATURE = 0,
413	FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */
414	FW_SUBTYPE_REDUCED = 2,
415	FW_SUBTYPE_ALIVE_ONLY = 3,
416	FW_SUBTYPE_WOWLAN = 4,
417	FW_SUBTYPE_AP_SUBTYPE = 5,
418	FW_SUBTYPE_WIPAN = 6,
419	FW_SUBTYPE_INITIALIZE = 9
420};
421
422#define IWL_ALIVE_STATUS_ERR 0xDEAD
423#define IWL_ALIVE_STATUS_OK 0xCAFE
424
425#define IWL_ALIVE_FLG_RFKILL	BIT(0)
426
427struct mvm_alive_resp_ver1 {
428	__le16 status;
429	__le16 flags;
430	u8 ucode_minor;
431	u8 ucode_major;
432	__le16 id;
433	u8 api_minor;
434	u8 api_major;
435	u8 ver_subtype;
436	u8 ver_type;
437	u8 mac;
438	u8 opt;
439	__le16 reserved2;
440	__le32 timestamp;
441	__le32 error_event_table_ptr;	/* SRAM address for error log */
442	__le32 log_event_table_ptr;	/* SRAM address for event log */
443	__le32 cpu_register_ptr;
444	__le32 dbgm_config_ptr;
445	__le32 alive_counter_ptr;
446	__le32 scd_base_ptr;		/* SRAM address for SCD */
447} __packed; /* ALIVE_RES_API_S_VER_1 */
448
449struct mvm_alive_resp_ver2 {
450	__le16 status;
451	__le16 flags;
452	u8 ucode_minor;
453	u8 ucode_major;
454	__le16 id;
455	u8 api_minor;
456	u8 api_major;
457	u8 ver_subtype;
458	u8 ver_type;
459	u8 mac;
460	u8 opt;
461	__le16 reserved2;
462	__le32 timestamp;
463	__le32 error_event_table_ptr;	/* SRAM address for error log */
464	__le32 log_event_table_ptr;	/* SRAM address for LMAC event log */
465	__le32 cpu_register_ptr;
466	__le32 dbgm_config_ptr;
467	__le32 alive_counter_ptr;
468	__le32 scd_base_ptr;		/* SRAM address for SCD */
469	__le32 st_fwrd_addr;		/* pointer to Store and forward */
470	__le32 st_fwrd_size;
471	u8 umac_minor;			/* UMAC version: minor */
472	u8 umac_major;			/* UMAC version: major */
473	__le16 umac_id;			/* UMAC version: id */
474	__le32 error_info_addr;		/* SRAM address for UMAC error log */
475	__le32 dbg_print_buff_addr;
476} __packed; /* ALIVE_RES_API_S_VER_2 */
477
478struct mvm_alive_resp {
479	__le16 status;
480	__le16 flags;
481	__le32 ucode_minor;
482	__le32 ucode_major;
483	u8 ver_subtype;
484	u8 ver_type;
485	u8 mac;
486	u8 opt;
487	__le32 timestamp;
488	__le32 error_event_table_ptr;	/* SRAM address for error log */
489	__le32 log_event_table_ptr;	/* SRAM address for LMAC event log */
490	__le32 cpu_register_ptr;
491	__le32 dbgm_config_ptr;
492	__le32 alive_counter_ptr;
493	__le32 scd_base_ptr;		/* SRAM address for SCD */
494	__le32 st_fwrd_addr;		/* pointer to Store and forward */
495	__le32 st_fwrd_size;
496	__le32 umac_minor;		/* UMAC version: minor */
497	__le32 umac_major;		/* UMAC version: major */
498	__le32 error_info_addr;		/* SRAM address for UMAC error log */
499	__le32 dbg_print_buff_addr;
500} __packed; /* ALIVE_RES_API_S_VER_3 */
501
502/* Error response/notification */
503enum {
504	FW_ERR_UNKNOWN_CMD = 0x0,
505	FW_ERR_INVALID_CMD_PARAM = 0x1,
506	FW_ERR_SERVICE = 0x2,
507	FW_ERR_ARC_MEMORY = 0x3,
508	FW_ERR_ARC_CODE = 0x4,
509	FW_ERR_WATCH_DOG = 0x5,
510	FW_ERR_WEP_GRP_KEY_INDX = 0x10,
511	FW_ERR_WEP_KEY_SIZE = 0x11,
512	FW_ERR_OBSOLETE_FUNC = 0x12,
513	FW_ERR_UNEXPECTED = 0xFE,
514	FW_ERR_FATAL = 0xFF
515};
516
517/**
518 * struct iwl_error_resp - FW error indication
519 * ( REPLY_ERROR = 0x2 )
520 * @error_type: one of FW_ERR_*
521 * @cmd_id: the command ID for which the error occured
522 * @bad_cmd_seq_num: sequence number of the erroneous command
523 * @error_service: which service created the error, applicable only if
524 *	error_type = 2, otherwise 0
525 * @timestamp: TSF in usecs.
526 */
527struct iwl_error_resp {
528	__le32 error_type;
529	u8 cmd_id;
530	u8 reserved1;
531	__le16 bad_cmd_seq_num;
532	__le32 error_service;
533	__le64 timestamp;
534} __packed;
535
536
537/* Common PHY, MAC and Bindings definitions */
538
539#define MAX_MACS_IN_BINDING	(3)
540#define MAX_BINDINGS		(4)
541#define AUX_BINDING_INDEX	(3)
542#define MAX_PHYS		(4)
543
544/* Used to extract ID and color from the context dword */
545#define FW_CTXT_ID_POS	  (0)
546#define FW_CTXT_ID_MSK	  (0xff << FW_CTXT_ID_POS)
547#define FW_CTXT_COLOR_POS (8)
548#define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS)
549#define FW_CTXT_INVALID	  (0xffffffff)
550
551#define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\
552					  (_color << FW_CTXT_COLOR_POS))
553
554/* Possible actions on PHYs, MACs and Bindings */
555enum {
556	FW_CTXT_ACTION_STUB = 0,
557	FW_CTXT_ACTION_ADD,
558	FW_CTXT_ACTION_MODIFY,
559	FW_CTXT_ACTION_REMOVE,
560	FW_CTXT_ACTION_NUM
561}; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */
562
563/* Time Events */
564
565/* Time Event types, according to MAC type */
566enum iwl_time_event_type {
567	/* BSS Station Events */
568	TE_BSS_STA_AGGRESSIVE_ASSOC,
569	TE_BSS_STA_ASSOC,
570	TE_BSS_EAP_DHCP_PROT,
571	TE_BSS_QUIET_PERIOD,
572
573	/* P2P Device Events */
574	TE_P2P_DEVICE_DISCOVERABLE,
575	TE_P2P_DEVICE_LISTEN,
576	TE_P2P_DEVICE_ACTION_SCAN,
577	TE_P2P_DEVICE_FULL_SCAN,
578
579	/* P2P Client Events */
580	TE_P2P_CLIENT_AGGRESSIVE_ASSOC,
581	TE_P2P_CLIENT_ASSOC,
582	TE_P2P_CLIENT_QUIET_PERIOD,
583
584	/* P2P GO Events */
585	TE_P2P_GO_ASSOC_PROT,
586	TE_P2P_GO_REPETITIVE_NOA,
587	TE_P2P_GO_CT_WINDOW,
588
589	/* WiDi Sync Events */
590	TE_WIDI_TX_SYNC,
591
592	/* Channel Switch NoA */
593	TE_CHANNEL_SWITCH_PERIOD,
594
595	TE_MAX
596}; /* MAC_EVENT_TYPE_API_E_VER_1 */
597
598
599
600/* Time event - defines for command API v1 */
601
602/*
603 * @TE_V1_FRAG_NONE: fragmentation of the time event is NOT allowed.
604 * @TE_V1_FRAG_SINGLE: fragmentation of the time event is allowed, but only
605 *	the first fragment is scheduled.
606 * @TE_V1_FRAG_DUAL: fragmentation of the time event is allowed, but only
607 *	the first 2 fragments are scheduled.
608 * @TE_V1_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
609 *	number of fragments are valid.
610 *
611 * Other than the constant defined above, specifying a fragmentation value 'x'
612 * means that the event can be fragmented but only the first 'x' will be
613 * scheduled.
614 */
615enum {
616	TE_V1_FRAG_NONE = 0,
617	TE_V1_FRAG_SINGLE = 1,
618	TE_V1_FRAG_DUAL = 2,
619	TE_V1_FRAG_ENDLESS = 0xffffffff
620};
621
622/* If a Time Event can be fragmented, this is the max number of fragments */
623#define TE_V1_FRAG_MAX_MSK	0x0fffffff
624/* Repeat the time event endlessly (until removed) */
625#define TE_V1_REPEAT_ENDLESS	0xffffffff
626/* If a Time Event has bounded repetitions, this is the maximal value */
627#define TE_V1_REPEAT_MAX_MSK_V1	0x0fffffff
628
629/* Time Event dependencies: none, on another TE, or in a specific time */
630enum {
631	TE_V1_INDEPENDENT		= 0,
632	TE_V1_DEP_OTHER			= BIT(0),
633	TE_V1_DEP_TSF			= BIT(1),
634	TE_V1_EVENT_SOCIOPATHIC		= BIT(2),
635}; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */
636
637/*
638 * @TE_V1_NOTIF_NONE: no notifications
639 * @TE_V1_NOTIF_HOST_EVENT_START: request/receive notification on event start
640 * @TE_V1_NOTIF_HOST_EVENT_END:request/receive notification on event end
641 * @TE_V1_NOTIF_INTERNAL_EVENT_START: internal FW use
642 * @TE_V1_NOTIF_INTERNAL_EVENT_END: internal FW use.
643 * @TE_V1_NOTIF_HOST_FRAG_START: request/receive notification on frag start
644 * @TE_V1_NOTIF_HOST_FRAG_END:request/receive notification on frag end
645 * @TE_V1_NOTIF_INTERNAL_FRAG_START: internal FW use.
646 * @TE_V1_NOTIF_INTERNAL_FRAG_END: internal FW use.
647 *
648 * Supported Time event notifications configuration.
649 * A notification (both event and fragment) includes a status indicating weather
650 * the FW was able to schedule the event or not. For fragment start/end
651 * notification the status is always success. There is no start/end fragment
652 * notification for monolithic events.
653 */
654enum {
655	TE_V1_NOTIF_NONE = 0,
656	TE_V1_NOTIF_HOST_EVENT_START = BIT(0),
657	TE_V1_NOTIF_HOST_EVENT_END = BIT(1),
658	TE_V1_NOTIF_INTERNAL_EVENT_START = BIT(2),
659	TE_V1_NOTIF_INTERNAL_EVENT_END = BIT(3),
660	TE_V1_NOTIF_HOST_FRAG_START = BIT(4),
661	TE_V1_NOTIF_HOST_FRAG_END = BIT(5),
662	TE_V1_NOTIF_INTERNAL_FRAG_START = BIT(6),
663	TE_V1_NOTIF_INTERNAL_FRAG_END = BIT(7),
664}; /* MAC_EVENT_ACTION_API_E_VER_2 */
665
666/* Time event - defines for command API */
667
668/*
669 * @TE_V2_FRAG_NONE: fragmentation of the time event is NOT allowed.
670 * @TE_V2_FRAG_SINGLE: fragmentation of the time event is allowed, but only
671 *  the first fragment is scheduled.
672 * @TE_V2_FRAG_DUAL: fragmentation of the time event is allowed, but only
673 *  the first 2 fragments are scheduled.
674 * @TE_V2_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
675 *  number of fragments are valid.
676 *
677 * Other than the constant defined above, specifying a fragmentation value 'x'
678 * means that the event can be fragmented but only the first 'x' will be
679 * scheduled.
680 */
681enum {
682	TE_V2_FRAG_NONE = 0,
683	TE_V2_FRAG_SINGLE = 1,
684	TE_V2_FRAG_DUAL = 2,
685	TE_V2_FRAG_MAX = 0xfe,
686	TE_V2_FRAG_ENDLESS = 0xff
687};
688
689/* Repeat the time event endlessly (until removed) */
690#define TE_V2_REPEAT_ENDLESS	0xff
691/* If a Time Event has bounded repetitions, this is the maximal value */
692#define TE_V2_REPEAT_MAX	0xfe
693
694#define TE_V2_PLACEMENT_POS	12
695#define TE_V2_ABSENCE_POS	15
696
697/* Time event policy values
698 * A notification (both event and fragment) includes a status indicating weather
699 * the FW was able to schedule the event or not. For fragment start/end
700 * notification the status is always success. There is no start/end fragment
701 * notification for monolithic events.
702 *
703 * @TE_V2_DEFAULT_POLICY: independent, social, present, unoticable
704 * @TE_V2_NOTIF_HOST_EVENT_START: request/receive notification on event start
705 * @TE_V2_NOTIF_HOST_EVENT_END:request/receive notification on event end
706 * @TE_V2_NOTIF_INTERNAL_EVENT_START: internal FW use
707 * @TE_V2_NOTIF_INTERNAL_EVENT_END: internal FW use.
708 * @TE_V2_NOTIF_HOST_FRAG_START: request/receive notification on frag start
709 * @TE_V2_NOTIF_HOST_FRAG_END:request/receive notification on frag end
710 * @TE_V2_NOTIF_INTERNAL_FRAG_START: internal FW use.
711 * @TE_V2_NOTIF_INTERNAL_FRAG_END: internal FW use.
712 * @TE_V2_DEP_OTHER: depends on another time event
713 * @TE_V2_DEP_TSF: depends on a specific time
714 * @TE_V2_EVENT_SOCIOPATHIC: can't co-exist with other events of tha same MAC
715 * @TE_V2_ABSENCE: are we present or absent during the Time Event.
716 */
717enum {
718	TE_V2_DEFAULT_POLICY = 0x0,
719
720	/* notifications (event start/stop, fragment start/stop) */
721	TE_V2_NOTIF_HOST_EVENT_START = BIT(0),
722	TE_V2_NOTIF_HOST_EVENT_END = BIT(1),
723	TE_V2_NOTIF_INTERNAL_EVENT_START = BIT(2),
724	TE_V2_NOTIF_INTERNAL_EVENT_END = BIT(3),
725
726	TE_V2_NOTIF_HOST_FRAG_START = BIT(4),
727	TE_V2_NOTIF_HOST_FRAG_END = BIT(5),
728	TE_V2_NOTIF_INTERNAL_FRAG_START = BIT(6),
729	TE_V2_NOTIF_INTERNAL_FRAG_END = BIT(7),
730	T2_V2_START_IMMEDIATELY = BIT(11),
731
732	TE_V2_NOTIF_MSK = 0xff,
733
734	/* placement characteristics */
735	TE_V2_DEP_OTHER = BIT(TE_V2_PLACEMENT_POS),
736	TE_V2_DEP_TSF = BIT(TE_V2_PLACEMENT_POS + 1),
737	TE_V2_EVENT_SOCIOPATHIC = BIT(TE_V2_PLACEMENT_POS + 2),
738
739	/* are we present or absent during the Time Event. */
740	TE_V2_ABSENCE = BIT(TE_V2_ABSENCE_POS),
741};
742
743/**
744 * struct iwl_time_event_cmd_api - configuring Time Events
745 * with struct MAC_TIME_EVENT_DATA_API_S_VER_2 (see also
746 * with version 1. determined by IWL_UCODE_TLV_FLAGS)
747 * ( TIME_EVENT_CMD = 0x29 )
748 * @id_and_color: ID and color of the relevant MAC
749 * @action: action to perform, one of FW_CTXT_ACTION_*
750 * @id: this field has two meanings, depending on the action:
751 *	If the action is ADD, then it means the type of event to add.
752 *	For all other actions it is the unique event ID assigned when the
753 *	event was added by the FW.
754 * @apply_time: When to start the Time Event (in GP2)
755 * @max_delay: maximum delay to event's start (apply time), in TU
756 * @depends_on: the unique ID of the event we depend on (if any)
757 * @interval: interval between repetitions, in TU
758 * @duration: duration of event in TU
759 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
760 * @max_frags: maximal number of fragments the Time Event can be divided to
761 * @policy: defines whether uCode shall notify the host or other uCode modules
762 *	on event and/or fragment start and/or end
763 *	using one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF
764 *	TE_EVENT_SOCIOPATHIC
765 *	using TE_ABSENCE and using TE_NOTIF_*
766 */
767struct iwl_time_event_cmd {
768	/* COMMON_INDEX_HDR_API_S_VER_1 */
769	__le32 id_and_color;
770	__le32 action;
771	__le32 id;
772	/* MAC_TIME_EVENT_DATA_API_S_VER_2 */
773	__le32 apply_time;
774	__le32 max_delay;
775	__le32 depends_on;
776	__le32 interval;
777	__le32 duration;
778	u8 repeat;
779	u8 max_frags;
780	__le16 policy;
781} __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_2 */
782
783/**
784 * struct iwl_time_event_resp - response structure to iwl_time_event_cmd
785 * @status: bit 0 indicates success, all others specify errors
786 * @id: the Time Event type
787 * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE
788 * @id_and_color: ID and color of the relevant MAC
789 */
790struct iwl_time_event_resp {
791	__le32 status;
792	__le32 id;
793	__le32 unique_id;
794	__le32 id_and_color;
795} __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */
796
797/**
798 * struct iwl_time_event_notif - notifications of time event start/stop
799 * ( TIME_EVENT_NOTIFICATION = 0x2a )
800 * @timestamp: action timestamp in GP2
801 * @session_id: session's unique id
802 * @unique_id: unique id of the Time Event itself
803 * @id_and_color: ID and color of the relevant MAC
804 * @action: one of TE_NOTIF_START or TE_NOTIF_END
805 * @status: true if scheduled, false otherwise (not executed)
806 */
807struct iwl_time_event_notif {
808	__le32 timestamp;
809	__le32 session_id;
810	__le32 unique_id;
811	__le32 id_and_color;
812	__le32 action;
813	__le32 status;
814} __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */
815
816
817/* Bindings and Time Quota */
818
819/**
820 * struct iwl_binding_cmd - configuring bindings
821 * ( BINDING_CONTEXT_CMD = 0x2b )
822 * @id_and_color: ID and color of the relevant Binding
823 * @action: action to perform, one of FW_CTXT_ACTION_*
824 * @macs: array of MAC id and colors which belong to the binding
825 * @phy: PHY id and color which belongs to the binding
826 */
827struct iwl_binding_cmd {
828	/* COMMON_INDEX_HDR_API_S_VER_1 */
829	__le32 id_and_color;
830	__le32 action;
831	/* BINDING_DATA_API_S_VER_1 */
832	__le32 macs[MAX_MACS_IN_BINDING];
833	__le32 phy;
834} __packed; /* BINDING_CMD_API_S_VER_1 */
835
836/* The maximal number of fragments in the FW's schedule session */
837#define IWL_MVM_MAX_QUOTA 128
838
839/**
840 * struct iwl_time_quota_data - configuration of time quota per binding
841 * @id_and_color: ID and color of the relevant Binding
842 * @quota: absolute time quota in TU. The scheduler will try to divide the
843 *	remainig quota (after Time Events) according to this quota.
844 * @max_duration: max uninterrupted context duration in TU
845 */
846struct iwl_time_quota_data {
847	__le32 id_and_color;
848	__le32 quota;
849	__le32 max_duration;
850} __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */
851
852/**
853 * struct iwl_time_quota_cmd - configuration of time quota between bindings
854 * ( TIME_QUOTA_CMD = 0x2c )
855 * @quotas: allocations per binding
856 */
857struct iwl_time_quota_cmd {
858	struct iwl_time_quota_data quotas[MAX_BINDINGS];
859} __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
860
861
862/* PHY context */
863
864/* Supported bands */
865#define PHY_BAND_5  (0)
866#define PHY_BAND_24 (1)
867
868/* Supported channel width, vary if there is VHT support */
869#define PHY_VHT_CHANNEL_MODE20	(0x0)
870#define PHY_VHT_CHANNEL_MODE40	(0x1)
871#define PHY_VHT_CHANNEL_MODE80	(0x2)
872#define PHY_VHT_CHANNEL_MODE160	(0x3)
873
874/*
875 * Control channel position:
876 * For legacy set bit means upper channel, otherwise lower.
877 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
878 *   bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
879 *                                   center_freq
880 *                                        |
881 * 40Mhz                          |_______|_______|
882 * 80Mhz                  |_______|_______|_______|_______|
883 * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
884 * code      011     010     001     000  |  100     101     110    111
885 */
886#define PHY_VHT_CTRL_POS_1_BELOW  (0x0)
887#define PHY_VHT_CTRL_POS_2_BELOW  (0x1)
888#define PHY_VHT_CTRL_POS_3_BELOW  (0x2)
889#define PHY_VHT_CTRL_POS_4_BELOW  (0x3)
890#define PHY_VHT_CTRL_POS_1_ABOVE  (0x4)
891#define PHY_VHT_CTRL_POS_2_ABOVE  (0x5)
892#define PHY_VHT_CTRL_POS_3_ABOVE  (0x6)
893#define PHY_VHT_CTRL_POS_4_ABOVE  (0x7)
894
895/*
896 * @band: PHY_BAND_*
897 * @channel: channel number
898 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
899 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
900 */
901struct iwl_fw_channel_info {
902	u8 band;
903	u8 channel;
904	u8 width;
905	u8 ctrl_pos;
906} __packed;
907
908#define PHY_RX_CHAIN_DRIVER_FORCE_POS	(0)
909#define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
910	(0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
911#define PHY_RX_CHAIN_VALID_POS		(1)
912#define PHY_RX_CHAIN_VALID_MSK \
913	(0x7 << PHY_RX_CHAIN_VALID_POS)
914#define PHY_RX_CHAIN_FORCE_SEL_POS	(4)
915#define PHY_RX_CHAIN_FORCE_SEL_MSK \
916	(0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
917#define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS	(7)
918#define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
919	(0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
920#define PHY_RX_CHAIN_CNT_POS		(10)
921#define PHY_RX_CHAIN_CNT_MSK \
922	(0x3 << PHY_RX_CHAIN_CNT_POS)
923#define PHY_RX_CHAIN_MIMO_CNT_POS	(12)
924#define PHY_RX_CHAIN_MIMO_CNT_MSK \
925	(0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
926#define PHY_RX_CHAIN_MIMO_FORCE_POS	(14)
927#define PHY_RX_CHAIN_MIMO_FORCE_MSK \
928	(0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
929
930/* TODO: fix the value, make it depend on firmware at runtime? */
931#define NUM_PHY_CTX	3
932
933/* TODO: complete missing documentation */
934/**
935 * struct iwl_phy_context_cmd - config of the PHY context
936 * ( PHY_CONTEXT_CMD = 0x8 )
937 * @id_and_color: ID and color of the relevant Binding
938 * @action: action to perform, one of FW_CTXT_ACTION_*
939 * @apply_time: 0 means immediate apply and context switch.
940 *	other value means apply new params after X usecs
941 * @tx_param_color: ???
942 * @channel_info:
943 * @txchain_info: ???
944 * @rxchain_info: ???
945 * @acquisition_data: ???
946 * @dsp_cfg_flags: set to 0
947 */
948struct iwl_phy_context_cmd {
949	/* COMMON_INDEX_HDR_API_S_VER_1 */
950	__le32 id_and_color;
951	__le32 action;
952	/* PHY_CONTEXT_DATA_API_S_VER_1 */
953	__le32 apply_time;
954	__le32 tx_param_color;
955	struct iwl_fw_channel_info ci;
956	__le32 txchain_info;
957	__le32 rxchain_info;
958	__le32 acquisition_data;
959	__le32 dsp_cfg_flags;
960} __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
961
962/*
963 * Aux ROC command
964 *
965 * Command requests the firmware to create a time event for a certain duration
966 * and remain on the given channel. This is done by using the Aux framework in
967 * the FW.
968 * The command was first used for Hot Spot issues - but can be used regardless
969 * to Hot Spot.
970 *
971 * ( HOT_SPOT_CMD 0x53 )
972 *
973 * @id_and_color: ID and color of the MAC
974 * @action: action to perform, one of FW_CTXT_ACTION_*
975 * @event_unique_id: If the action FW_CTXT_ACTION_REMOVE then the
976 *	event_unique_id should be the id of the time event assigned by ucode.
977 *	Otherwise ignore the event_unique_id.
978 * @sta_id_and_color: station id and color, resumed during "Remain On Channel"
979 *	activity.
980 * @channel_info: channel info
981 * @node_addr: Our MAC Address
982 * @reserved: reserved for alignment
983 * @apply_time: GP2 value to start (should always be the current GP2 value)
984 * @apply_time_max_delay: Maximum apply time delay value in TU. Defines max
985 *	time by which start of the event is allowed to be postponed.
986 * @duration: event duration in TU To calculate event duration:
987 *	timeEventDuration = min(duration, remainingQuota)
988 */
989struct iwl_hs20_roc_req {
990	/* COMMON_INDEX_HDR_API_S_VER_1 hdr */
991	__le32 id_and_color;
992	__le32 action;
993	__le32 event_unique_id;
994	__le32 sta_id_and_color;
995	struct iwl_fw_channel_info channel_info;
996	u8 node_addr[ETH_ALEN];
997	__le16 reserved;
998	__le32 apply_time;
999	__le32 apply_time_max_delay;
1000	__le32 duration;
1001} __packed; /* HOT_SPOT_CMD_API_S_VER_1 */
1002
1003/*
1004 * values for AUX ROC result values
1005 */
1006enum iwl_mvm_hot_spot {
1007	HOT_SPOT_RSP_STATUS_OK,
1008	HOT_SPOT_RSP_STATUS_TOO_MANY_EVENTS,
1009	HOT_SPOT_MAX_NUM_OF_SESSIONS,
1010};
1011
1012/*
1013 * Aux ROC command response
1014 *
1015 * In response to iwl_hs20_roc_req the FW sends this command to notify the
1016 * driver the uid of the timevent.
1017 *
1018 * ( HOT_SPOT_CMD 0x53 )
1019 *
1020 * @event_unique_id: Unique ID of time event assigned by ucode
1021 * @status: Return status 0 is success, all the rest used for specific errors
1022 */
1023struct iwl_hs20_roc_res {
1024	__le32 event_unique_id;
1025	__le32 status;
1026} __packed; /* HOT_SPOT_RSP_API_S_VER_1 */
1027
1028#define IWL_RX_INFO_PHY_CNT 8
1029#define IWL_RX_INFO_ENERGY_ANT_ABC_IDX 1
1030#define IWL_RX_INFO_ENERGY_ANT_A_MSK 0x000000ff
1031#define IWL_RX_INFO_ENERGY_ANT_B_MSK 0x0000ff00
1032#define IWL_RX_INFO_ENERGY_ANT_C_MSK 0x00ff0000
1033#define IWL_RX_INFO_ENERGY_ANT_A_POS 0
1034#define IWL_RX_INFO_ENERGY_ANT_B_POS 8
1035#define IWL_RX_INFO_ENERGY_ANT_C_POS 16
1036
1037#define IWL_RX_INFO_AGC_IDX 1
1038#define IWL_RX_INFO_RSSI_AB_IDX 2
1039#define IWL_OFDM_AGC_A_MSK 0x0000007f
1040#define IWL_OFDM_AGC_A_POS 0
1041#define IWL_OFDM_AGC_B_MSK 0x00003f80
1042#define IWL_OFDM_AGC_B_POS 7
1043#define IWL_OFDM_AGC_CODE_MSK 0x3fe00000
1044#define IWL_OFDM_AGC_CODE_POS 20
1045#define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff
1046#define IWL_OFDM_RSSI_A_POS 0
1047#define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00
1048#define IWL_OFDM_RSSI_ALLBAND_A_POS 8
1049#define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000
1050#define IWL_OFDM_RSSI_B_POS 16
1051#define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000
1052#define IWL_OFDM_RSSI_ALLBAND_B_POS 24
1053
1054/**
1055 * struct iwl_rx_phy_info - phy info
1056 * (REPLY_RX_PHY_CMD = 0xc0)
1057 * @non_cfg_phy_cnt: non configurable DSP phy data byte count
1058 * @cfg_phy_cnt: configurable DSP phy data byte count
1059 * @stat_id: configurable DSP phy data set ID
1060 * @reserved1:
1061 * @system_timestamp: GP2  at on air rise
1062 * @timestamp: TSF at on air rise
1063 * @beacon_time_stamp: beacon at on-air rise
1064 * @phy_flags: general phy flags: band, modulation, ...
1065 * @channel: channel number
1066 * @non_cfg_phy_buf: for various implementations of non_cfg_phy
1067 * @rate_n_flags: RATE_MCS_*
1068 * @byte_count: frame's byte-count
1069 * @frame_time: frame's time on the air, based on byte count and frame rate
1070 *	calculation
1071 * @mac_active_msk: what MACs were active when the frame was received
1072 *
1073 * Before each Rx, the device sends this data. It contains PHY information
1074 * about the reception of the packet.
1075 */
1076struct iwl_rx_phy_info {
1077	u8 non_cfg_phy_cnt;
1078	u8 cfg_phy_cnt;
1079	u8 stat_id;
1080	u8 reserved1;
1081	__le32 system_timestamp;
1082	__le64 timestamp;
1083	__le32 beacon_time_stamp;
1084	__le16 phy_flags;
1085	__le16 channel;
1086	__le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT];
1087	__le32 rate_n_flags;
1088	__le32 byte_count;
1089	__le16 mac_active_msk;
1090	__le16 frame_time;
1091} __packed;
1092
1093struct iwl_rx_mpdu_res_start {
1094	__le16 byte_count;
1095	__le16 reserved;
1096} __packed;
1097
1098/**
1099 * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags
1100 * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band
1101 * @RX_RES_PHY_FLAGS_MOD_CCK:
1102 * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short
1103 * @RX_RES_PHY_FLAGS_NARROW_BAND:
1104 * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received
1105 * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
1106 * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame
1107 * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble
1108 * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame
1109 */
1110enum iwl_rx_phy_flags {
1111	RX_RES_PHY_FLAGS_BAND_24	= BIT(0),
1112	RX_RES_PHY_FLAGS_MOD_CCK	= BIT(1),
1113	RX_RES_PHY_FLAGS_SHORT_PREAMBLE	= BIT(2),
1114	RX_RES_PHY_FLAGS_NARROW_BAND	= BIT(3),
1115	RX_RES_PHY_FLAGS_ANTENNA	= (0x7 << 4),
1116	RX_RES_PHY_FLAGS_ANTENNA_POS	= 4,
1117	RX_RES_PHY_FLAGS_AGG		= BIT(7),
1118	RX_RES_PHY_FLAGS_OFDM_HT	= BIT(8),
1119	RX_RES_PHY_FLAGS_OFDM_GF	= BIT(9),
1120	RX_RES_PHY_FLAGS_OFDM_VHT	= BIT(10),
1121};
1122
1123/**
1124 * enum iwl_mvm_rx_status - written by fw for each Rx packet
1125 * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine
1126 * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
1127 * @RX_MPDU_RES_STATUS_SRC_STA_FOUND:
1128 * @RX_MPDU_RES_STATUS_KEY_VALID:
1129 * @RX_MPDU_RES_STATUS_KEY_PARAM_OK:
1130 * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
1131 * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
1132 *	in the driver.
1133 * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
1134 * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR:  valid for alg = CCM_CMAC or
1135 *	alg = CCM only. Checks replay attack for 11w frames. Relevant only if
1136 *	%RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set.
1137 * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
1138 * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
1139 * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
1140 * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP
1141 * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC
1142 * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted
1143 * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm
1144 * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted
1145 * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP:
1146 * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP:
1147 * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT:
1148 * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame
1149 * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK:
1150 * @RX_MPDU_RES_STATUS_STA_ID_MSK:
1151 * @RX_MPDU_RES_STATUS_RRF_KILL:
1152 * @RX_MPDU_RES_STATUS_FILTERING_MSK:
1153 * @RX_MPDU_RES_STATUS2_FILTERING_MSK:
1154 */
1155enum iwl_mvm_rx_status {
1156	RX_MPDU_RES_STATUS_CRC_OK			= BIT(0),
1157	RX_MPDU_RES_STATUS_OVERRUN_OK			= BIT(1),
1158	RX_MPDU_RES_STATUS_SRC_STA_FOUND		= BIT(2),
1159	RX_MPDU_RES_STATUS_KEY_VALID			= BIT(3),
1160	RX_MPDU_RES_STATUS_KEY_PARAM_OK			= BIT(4),
1161	RX_MPDU_RES_STATUS_ICV_OK			= BIT(5),
1162	RX_MPDU_RES_STATUS_MIC_OK			= BIT(6),
1163	RX_MPDU_RES_STATUS_TTAK_OK			= BIT(7),
1164	RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR		= BIT(7),
1165	RX_MPDU_RES_STATUS_SEC_NO_ENC			= (0 << 8),
1166	RX_MPDU_RES_STATUS_SEC_WEP_ENC			= (1 << 8),
1167	RX_MPDU_RES_STATUS_SEC_CCM_ENC			= (2 << 8),
1168	RX_MPDU_RES_STATUS_SEC_TKIP_ENC			= (3 << 8),
1169	RX_MPDU_RES_STATUS_SEC_EXT_ENC			= (4 << 8),
1170	RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC		= (6 << 8),
1171	RX_MPDU_RES_STATUS_SEC_ENC_ERR			= (7 << 8),
1172	RX_MPDU_RES_STATUS_SEC_ENC_MSK			= (7 << 8),
1173	RX_MPDU_RES_STATUS_DEC_DONE			= BIT(11),
1174	RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP	= BIT(12),
1175	RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP		= BIT(13),
1176	RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT		= BIT(14),
1177	RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME		= BIT(15),
1178	RX_MPDU_RES_STATUS_HASH_INDEX_MSK		= (0x3F0000),
1179	RX_MPDU_RES_STATUS_STA_ID_MSK			= (0x1f000000),
1180	RX_MPDU_RES_STATUS_RRF_KILL			= BIT(29),
1181	RX_MPDU_RES_STATUS_FILTERING_MSK		= (0xc00000),
1182	RX_MPDU_RES_STATUS2_FILTERING_MSK		= (0xc0000000),
1183};
1184
1185/**
1186 * struct iwl_radio_version_notif - information on the radio version
1187 * ( RADIO_VERSION_NOTIFICATION = 0x68 )
1188 * @radio_flavor:
1189 * @radio_step:
1190 * @radio_dash:
1191 */
1192struct iwl_radio_version_notif {
1193	__le32 radio_flavor;
1194	__le32 radio_step;
1195	__le32 radio_dash;
1196} __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */
1197
1198enum iwl_card_state_flags {
1199	CARD_ENABLED		= 0x00,
1200	HW_CARD_DISABLED	= 0x01,
1201	SW_CARD_DISABLED	= 0x02,
1202	CT_KILL_CARD_DISABLED	= 0x04,
1203	HALT_CARD_DISABLED	= 0x08,
1204	CARD_DISABLED_MSK	= 0x0f,
1205	CARD_IS_RX_ON		= 0x10,
1206};
1207
1208/**
1209 * struct iwl_radio_version_notif - information on the radio version
1210 * ( CARD_STATE_NOTIFICATION = 0xa1 )
1211 * @flags: %iwl_card_state_flags
1212 */
1213struct iwl_card_state_notif {
1214	__le32 flags;
1215} __packed; /* CARD_STATE_NTFY_API_S_VER_1 */
1216
1217/**
1218 * struct iwl_missed_beacons_notif - information on missed beacons
1219 * ( MISSED_BEACONS_NOTIFICATION = 0xa2 )
1220 * @mac_id: interface ID
1221 * @consec_missed_beacons_since_last_rx: number of consecutive missed
1222 *	beacons since last RX.
1223 * @consec_missed_beacons: number of consecutive missed beacons
1224 * @num_expected_beacons:
1225 * @num_recvd_beacons:
1226 */
1227struct iwl_missed_beacons_notif {
1228	__le32 mac_id;
1229	__le32 consec_missed_beacons_since_last_rx;
1230	__le32 consec_missed_beacons;
1231	__le32 num_expected_beacons;
1232	__le32 num_recvd_beacons;
1233} __packed; /* MISSED_BEACON_NTFY_API_S_VER_3 */
1234
1235/**
1236 * struct iwl_mfuart_load_notif - mfuart image version & status
1237 * ( MFUART_LOAD_NOTIFICATION = 0xb1 )
1238 * @installed_ver: installed image version
1239 * @external_ver: external image version
1240 * @status: MFUART loading status
1241 * @duration: MFUART loading time
1242*/
1243struct iwl_mfuart_load_notif {
1244	__le32 installed_ver;
1245	__le32 external_ver;
1246	__le32 status;
1247	__le32 duration;
1248} __packed; /*MFU_LOADER_NTFY_API_S_VER_1*/
1249
1250/**
1251 * struct iwl_set_calib_default_cmd - set default value for calibration.
1252 * ( SET_CALIB_DEFAULT_CMD = 0x8e )
1253 * @calib_index: the calibration to set value for
1254 * @length: of data
1255 * @data: the value to set for the calibration result
1256 */
1257struct iwl_set_calib_default_cmd {
1258	__le16 calib_index;
1259	__le16 length;
1260	u8 data[0];
1261} __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */
1262
1263#define MAX_PORT_ID_NUM	2
1264#define MAX_MCAST_FILTERING_ADDRESSES 256
1265
1266/**
1267 * struct iwl_mcast_filter_cmd - configure multicast filter.
1268 * @filter_own: Set 1 to filter out multicast packets sent by station itself
1269 * @port_id:	Multicast MAC addresses array specifier. This is a strange way
1270 *		to identify network interface adopted in host-device IF.
1271 *		It is used by FW as index in array of addresses. This array has
1272 *		MAX_PORT_ID_NUM members.
1273 * @count:	Number of MAC addresses in the array
1274 * @pass_all:	Set 1 to pass all multicast packets.
1275 * @bssid:	current association BSSID.
1276 * @addr_list:	Place holder for array of MAC addresses.
1277 *		IMPORTANT: add padding if necessary to ensure DWORD alignment.
1278 */
1279struct iwl_mcast_filter_cmd {
1280	u8 filter_own;
1281	u8 port_id;
1282	u8 count;
1283	u8 pass_all;
1284	u8 bssid[6];
1285	u8 reserved[2];
1286	u8 addr_list[0];
1287} __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */
1288
1289#define MAX_BCAST_FILTERS 8
1290#define MAX_BCAST_FILTER_ATTRS 2
1291
1292/**
1293 * enum iwl_mvm_bcast_filter_attr_offset - written by fw for each Rx packet
1294 * @BCAST_FILTER_OFFSET_PAYLOAD_START: offset is from payload start.
1295 * @BCAST_FILTER_OFFSET_IP_END: offset is from ip header end (i.e.
1296 *	start of ip payload).
1297 */
1298enum iwl_mvm_bcast_filter_attr_offset {
1299	BCAST_FILTER_OFFSET_PAYLOAD_START = 0,
1300	BCAST_FILTER_OFFSET_IP_END = 1,
1301};
1302
1303/**
1304 * struct iwl_fw_bcast_filter_attr - broadcast filter attribute
1305 * @offset_type:	&enum iwl_mvm_bcast_filter_attr_offset.
1306 * @offset:	starting offset of this pattern.
1307 * @val:		value to match - big endian (MSB is the first
1308 *		byte to match from offset pos).
1309 * @mask:	mask to match (big endian).
1310 */
1311struct iwl_fw_bcast_filter_attr {
1312	u8 offset_type;
1313	u8 offset;
1314	__le16 reserved1;
1315	__be32 val;
1316	__be32 mask;
1317} __packed; /* BCAST_FILTER_ATT_S_VER_1 */
1318
1319/**
1320 * enum iwl_mvm_bcast_filter_frame_type - filter frame type
1321 * @BCAST_FILTER_FRAME_TYPE_ALL: consider all frames.
1322 * @BCAST_FILTER_FRAME_TYPE_IPV4: consider only ipv4 frames
1323 */
1324enum iwl_mvm_bcast_filter_frame_type {
1325	BCAST_FILTER_FRAME_TYPE_ALL = 0,
1326	BCAST_FILTER_FRAME_TYPE_IPV4 = 1,
1327};
1328
1329/**
1330 * struct iwl_fw_bcast_filter - broadcast filter
1331 * @discard: discard frame (1) or let it pass (0).
1332 * @frame_type: &enum iwl_mvm_bcast_filter_frame_type.
1333 * @num_attrs: number of valid attributes in this filter.
1334 * @attrs: attributes of this filter. a filter is considered matched
1335 *	only when all its attributes are matched (i.e. AND relationship)
1336 */
1337struct iwl_fw_bcast_filter {
1338	u8 discard;
1339	u8 frame_type;
1340	u8 num_attrs;
1341	u8 reserved1;
1342	struct iwl_fw_bcast_filter_attr attrs[MAX_BCAST_FILTER_ATTRS];
1343} __packed; /* BCAST_FILTER_S_VER_1 */
1344
1345/**
1346 * struct iwl_fw_bcast_mac - per-mac broadcast filtering configuration.
1347 * @default_discard: default action for this mac (discard (1) / pass (0)).
1348 * @attached_filters: bitmap of relevant filters for this mac.
1349 */
1350struct iwl_fw_bcast_mac {
1351	u8 default_discard;
1352	u8 reserved1;
1353	__le16 attached_filters;
1354} __packed; /* BCAST_MAC_CONTEXT_S_VER_1 */
1355
1356/**
1357 * struct iwl_bcast_filter_cmd - broadcast filtering configuration
1358 * @disable: enable (0) / disable (1)
1359 * @max_bcast_filters: max number of filters (MAX_BCAST_FILTERS)
1360 * @max_macs: max number of macs (NUM_MAC_INDEX_DRIVER)
1361 * @filters: broadcast filters
1362 * @macs: broadcast filtering configuration per-mac
1363 */
1364struct iwl_bcast_filter_cmd {
1365	u8 disable;
1366	u8 max_bcast_filters;
1367	u8 max_macs;
1368	u8 reserved1;
1369	struct iwl_fw_bcast_filter filters[MAX_BCAST_FILTERS];
1370	struct iwl_fw_bcast_mac macs[NUM_MAC_INDEX_DRIVER];
1371} __packed; /* BCAST_FILTERING_HCMD_API_S_VER_1 */
1372
1373/*
1374 * enum iwl_mvm_marker_id - maker ids
1375 *
1376 * The ids for different type of markers to insert into the usniffer logs
1377 */
1378enum iwl_mvm_marker_id {
1379	MARKER_ID_TX_FRAME_LATENCY = 1,
1380}; /* MARKER_ID_API_E_VER_1 */
1381
1382/**
1383 * struct iwl_mvm_marker - mark info into the usniffer logs
1384 *
1385 * (MARKER_CMD = 0xcb)
1386 *
1387 * Mark the UTC time stamp into the usniffer logs together with additional
1388 * metadata, so the usniffer output can be parsed.
1389 * In the command response the ucode will return the GP2 time.
1390 *
1391 * @dw_len: The amount of dwords following this byte including this byte.
1392 * @marker_id: A unique marker id (iwl_mvm_marker_id).
1393 * @reserved: reserved.
1394 * @timestamp: in milliseconds since 1970-01-01 00:00:00 UTC
1395 * @metadata: additional meta data that will be written to the unsiffer log
1396 */
1397struct iwl_mvm_marker {
1398	u8 dwLen;
1399	u8 markerId;
1400	__le16 reserved;
1401	__le64 timestamp;
1402	__le32 metadata[0];
1403} __packed; /* MARKER_API_S_VER_1 */
1404
1405/***********************************
1406 * Smart Fifo API
1407 ***********************************/
1408/* Smart Fifo state */
1409enum iwl_sf_state {
1410	SF_LONG_DELAY_ON = 0, /* should never be called by driver */
1411	SF_FULL_ON,
1412	SF_UNINIT,
1413	SF_INIT_OFF,
1414	SF_HW_NUM_STATES
1415};
1416
1417/* Smart Fifo possible scenario */
1418enum iwl_sf_scenario {
1419	SF_SCENARIO_SINGLE_UNICAST,
1420	SF_SCENARIO_AGG_UNICAST,
1421	SF_SCENARIO_MULTICAST,
1422	SF_SCENARIO_BA_RESP,
1423	SF_SCENARIO_TX_RESP,
1424	SF_NUM_SCENARIO
1425};
1426
1427#define SF_TRANSIENT_STATES_NUMBER 2	/* SF_LONG_DELAY_ON and SF_FULL_ON */
1428#define SF_NUM_TIMEOUT_TYPES 2		/* Aging timer and Idle timer */
1429
1430/* smart FIFO default values */
1431#define SF_W_MARK_SISO 6144
1432#define SF_W_MARK_MIMO2 8192
1433#define SF_W_MARK_MIMO3 6144
1434#define SF_W_MARK_LEGACY 4096
1435#define SF_W_MARK_SCAN 4096
1436
1437/* SF Scenarios timers for default configuration (aligned to 32 uSec) */
1438#define SF_SINGLE_UNICAST_IDLE_TIMER_DEF 160	/* 150 uSec  */
1439#define SF_SINGLE_UNICAST_AGING_TIMER_DEF 400	/* 0.4 mSec */
1440#define SF_AGG_UNICAST_IDLE_TIMER_DEF 160		/* 150 uSec */
1441#define SF_AGG_UNICAST_AGING_TIMER_DEF 400		/* 0.4 mSec */
1442#define SF_MCAST_IDLE_TIMER_DEF 160		/* 150 mSec */
1443#define SF_MCAST_AGING_TIMER_DEF 400		/* 0.4 mSec */
1444#define SF_BA_IDLE_TIMER_DEF 160			/* 150 uSec */
1445#define SF_BA_AGING_TIMER_DEF 400			/* 0.4 mSec */
1446#define SF_TX_RE_IDLE_TIMER_DEF 160			/* 150 uSec */
1447#define SF_TX_RE_AGING_TIMER_DEF 400		/* 0.4 mSec */
1448
1449/* SF Scenarios timers for BSS MAC configuration (aligned to 32 uSec) */
1450#define SF_SINGLE_UNICAST_IDLE_TIMER 320	/* 300 uSec  */
1451#define SF_SINGLE_UNICAST_AGING_TIMER 2016	/* 2 mSec */
1452#define SF_AGG_UNICAST_IDLE_TIMER 320		/* 300 uSec */
1453#define SF_AGG_UNICAST_AGING_TIMER 2016		/* 2 mSec */
1454#define SF_MCAST_IDLE_TIMER 2016		/* 2 mSec */
1455#define SF_MCAST_AGING_TIMER 10016		/* 10 mSec */
1456#define SF_BA_IDLE_TIMER 320			/* 300 uSec */
1457#define SF_BA_AGING_TIMER 2016			/* 2 mSec */
1458#define SF_TX_RE_IDLE_TIMER 320			/* 300 uSec */
1459#define SF_TX_RE_AGING_TIMER 2016		/* 2 mSec */
1460
1461#define SF_LONG_DELAY_AGING_TIMER 1000000	/* 1 Sec */
1462
1463#define SF_CFG_DUMMY_NOTIF_OFF	BIT(16)
1464
1465/**
1466 * Smart Fifo configuration command.
1467 * @state: smart fifo state, types listed in enum %iwl_sf_sate.
1468 * @watermark: Minimum allowed availabe free space in RXF for transient state.
1469 * @long_delay_timeouts: aging and idle timer values for each scenario
1470 * in long delay state.
1471 * @full_on_timeouts: timer values for each scenario in full on state.
1472 */
1473struct iwl_sf_cfg_cmd {
1474	__le32 state;
1475	__le32 watermark[SF_TRANSIENT_STATES_NUMBER];
1476	__le32 long_delay_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1477	__le32 full_on_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1478} __packed; /* SF_CFG_API_S_VER_2 */
1479
1480/***********************************
1481 * Location Aware Regulatory (LAR) API - MCC updates
1482 ***********************************/
1483
1484/**
1485 * struct iwl_mcc_update_cmd - Request the device to update geographic
1486 * regulatory profile according to the given MCC (Mobile Country Code).
1487 * The MCC is two letter-code, ascii upper case[A-Z] or '00' for world domain.
1488 * 'ZZ' MCC will be used to switch to NVM default profile; in this case, the
1489 * MCC in the cmd response will be the relevant MCC in the NVM.
1490 * @mcc: given mobile country code
1491 * @source_id: the source from where we got the MCC, see iwl_mcc_source
1492 * @reserved: reserved for alignment
1493 */
1494struct iwl_mcc_update_cmd {
1495	__le16 mcc;
1496	u8 source_id;
1497	u8 reserved;
1498} __packed; /* LAR_UPDATE_MCC_CMD_API_S */
1499
1500/**
1501 * iwl_mcc_update_resp - response to MCC_UPDATE_CMD.
1502 * Contains the new channel control profile map, if changed, and the new MCC
1503 * (mobile country code).
1504 * The new MCC may be different than what was requested in MCC_UPDATE_CMD.
1505 * @status: see &enum iwl_mcc_update_status
1506 * @mcc: the new applied MCC
1507 * @cap: capabilities for all channels which matches the MCC
1508 * @source_id: the MCC source, see iwl_mcc_source
1509 * @n_channels: number of channels in @channels_data (may be 14, 39, 50 or 51
1510 *		channels, depending on platform)
1511 * @channels: channel control data map, DWORD for each channel. Only the first
1512 *	16bits are used.
1513 */
1514struct iwl_mcc_update_resp {
1515	__le32 status;
1516	__le16 mcc;
1517	u8 cap;
1518	u8 source_id;
1519	__le32 n_channels;
1520	__le32 channels[0];
1521} __packed; /* LAR_UPDATE_MCC_CMD_RESP_S */
1522
1523/**
1524 * struct iwl_mcc_chub_notif - chub notifies of mcc change
1525 * (MCC_CHUB_UPDATE_CMD = 0xc9)
1526 * The Chub (Communication Hub, CommsHUB) is a HW component that connects to
1527 * the cellular and connectivity cores that gets updates of the mcc, and
1528 * notifies the ucode directly of any mcc change.
1529 * The ucode requests the driver to request the device to update geographic
1530 * regulatory  profile according to the given MCC (Mobile Country Code).
1531 * The MCC is two letter-code, ascii upper case[A-Z] or '00' for world domain.
1532 * 'ZZ' MCC will be used to switch to NVM default profile; in this case, the
1533 * MCC in the cmd response will be the relevant MCC in the NVM.
1534 * @mcc: given mobile country code
1535 * @source_id: identity of the change originator, see iwl_mcc_source
1536 * @reserved1: reserved for alignment
1537 */
1538struct iwl_mcc_chub_notif {
1539	u16 mcc;
1540	u8 source_id;
1541	u8 reserved1;
1542} __packed; /* LAR_MCC_NOTIFY_S */
1543
1544enum iwl_mcc_update_status {
1545	MCC_RESP_NEW_CHAN_PROFILE,
1546	MCC_RESP_SAME_CHAN_PROFILE,
1547	MCC_RESP_INVALID,
1548	MCC_RESP_NVM_DISABLED,
1549	MCC_RESP_ILLEGAL,
1550	MCC_RESP_LOW_PRIORITY,
1551};
1552
1553enum iwl_mcc_source {
1554	MCC_SOURCE_OLD_FW = 0,
1555	MCC_SOURCE_ME = 1,
1556	MCC_SOURCE_BIOS = 2,
1557	MCC_SOURCE_3G_LTE_HOST = 3,
1558	MCC_SOURCE_3G_LTE_DEVICE = 4,
1559	MCC_SOURCE_WIFI = 5,
1560	MCC_SOURCE_RESERVED = 6,
1561	MCC_SOURCE_DEFAULT = 7,
1562	MCC_SOURCE_UNINITIALIZED = 8,
1563	MCC_SOURCE_GET_CURRENT = 0x10
1564};
1565
1566/* DTS measurements */
1567
1568enum iwl_dts_measurement_flags {
1569	DTS_TRIGGER_CMD_FLAGS_TEMP	= BIT(0),
1570	DTS_TRIGGER_CMD_FLAGS_VOLT	= BIT(1),
1571};
1572
1573/**
1574 * iwl_dts_measurement_cmd - request DTS temperature and/or voltage measurements
1575 *
1576 * @flags: indicates which measurements we want as specified in &enum
1577 *	   iwl_dts_measurement_flags
1578 */
1579struct iwl_dts_measurement_cmd {
1580	__le32 flags;
1581} __packed; /* TEMPERATURE_MEASUREMENT_TRIGGER_CMD_S */
1582
1583/**
1584 * iwl_dts_measurement_notif - notification received with the measurements
1585 *
1586 * @temp: the measured temperature
1587 * @voltage: the measured voltage
1588 */
1589struct iwl_dts_measurement_notif {
1590	__le32 temp;
1591	__le32 voltage;
1592} __packed; /* TEMPERATURE_MEASUREMENT_TRIGGER_NTFY_S */
1593
1594/***********************************
1595 * TDLS API
1596 ***********************************/
1597
1598/* Type of TDLS request */
1599enum iwl_tdls_channel_switch_type {
1600	TDLS_SEND_CHAN_SW_REQ = 0,
1601	TDLS_SEND_CHAN_SW_RESP_AND_MOVE_CH,
1602	TDLS_MOVE_CH,
1603}; /* TDLS_STA_CHANNEL_SWITCH_CMD_TYPE_API_E_VER_1 */
1604
1605/**
1606 * Switch timing sub-element in a TDLS channel-switch command
1607 * @frame_timestamp: GP2 timestamp of channel-switch request/response packet
1608 *	received from peer
1609 * @max_offchan_duration: What amount of microseconds out of a DTIM is given
1610 *	to the TDLS off-channel communication. For instance if the DTIM is
1611 *	200TU and the TDLS peer is to be given 25% of the time, the value
1612 *	given will be 50TU, or 50 * 1024 if translated into microseconds.
1613 * @switch_time: switch time the peer sent in its channel switch timing IE
1614 * @switch_timout: switch timeout the peer sent in its channel switch timing IE
1615 */
1616struct iwl_tdls_channel_switch_timing {
1617	__le32 frame_timestamp; /* GP2 time of peer packet Rx */
1618	__le32 max_offchan_duration; /* given in micro-seconds */
1619	__le32 switch_time; /* given in micro-seconds */
1620	__le32 switch_timeout; /* given in micro-seconds */
1621} __packed; /* TDLS_STA_CHANNEL_SWITCH_TIMING_DATA_API_S_VER_1 */
1622
1623#define IWL_TDLS_CH_SW_FRAME_MAX_SIZE 200
1624
1625/**
1626 * TDLS channel switch frame template
1627 *
1628 * A template representing a TDLS channel-switch request or response frame
1629 *
1630 * @switch_time_offset: offset to the channel switch timing IE in the template
1631 * @tx_cmd: Tx parameters for the frame
1632 * @data: frame data
1633 */
1634struct iwl_tdls_channel_switch_frame {
1635	__le32 switch_time_offset;
1636	struct iwl_tx_cmd tx_cmd;
1637	u8 data[IWL_TDLS_CH_SW_FRAME_MAX_SIZE];
1638} __packed; /* TDLS_STA_CHANNEL_SWITCH_FRAME_API_S_VER_1 */
1639
1640/**
1641 * TDLS channel switch command
1642 *
1643 * The command is sent to initiate a channel switch and also in response to
1644 * incoming TDLS channel-switch request/response packets from remote peers.
1645 *
1646 * @switch_type: see &enum iwl_tdls_channel_switch_type
1647 * @peer_sta_id: station id of TDLS peer
1648 * @ci: channel we switch to
1649 * @timing: timing related data for command
1650 * @frame: channel-switch request/response template, depending to switch_type
1651 */
1652struct iwl_tdls_channel_switch_cmd {
1653	u8 switch_type;
1654	__le32 peer_sta_id;
1655	struct iwl_fw_channel_info ci;
1656	struct iwl_tdls_channel_switch_timing timing;
1657	struct iwl_tdls_channel_switch_frame frame;
1658} __packed; /* TDLS_STA_CHANNEL_SWITCH_CMD_API_S_VER_1 */
1659
1660/**
1661 * TDLS channel switch start notification
1662 *
1663 * @status: non-zero on success
1664 * @offchannel_duration: duration given in microseconds
1665 * @sta_id: peer currently performing the channel-switch with
1666 */
1667struct iwl_tdls_channel_switch_notif {
1668	__le32 status;
1669	__le32 offchannel_duration;
1670	__le32 sta_id;
1671} __packed; /* TDLS_STA_CHANNEL_SWITCH_NTFY_API_S_VER_1 */
1672
1673/**
1674 * TDLS station info
1675 *
1676 * @sta_id: station id of the TDLS peer
1677 * @tx_to_peer_tid: TID reserved vs. the peer for FW based Tx
1678 * @tx_to_peer_ssn: initial SSN the FW should use for Tx on its TID vs the peer
1679 * @is_initiator: 1 if the peer is the TDLS link initiator, 0 otherwise
1680 */
1681struct iwl_tdls_sta_info {
1682	u8 sta_id;
1683	u8 tx_to_peer_tid;
1684	__le16 tx_to_peer_ssn;
1685	__le32 is_initiator;
1686} __packed; /* TDLS_STA_INFO_VER_1 */
1687
1688/**
1689 * TDLS basic config command
1690 *
1691 * @id_and_color: MAC id and color being configured
1692 * @tdls_peer_count: amount of currently connected TDLS peers
1693 * @tx_to_ap_tid: TID reverved vs. the AP for FW based Tx
1694 * @tx_to_ap_ssn: initial SSN the FW should use for Tx on its TID vs. the AP
1695 * @sta_info: per-station info. Only the first tdls_peer_count entries are set
1696 * @pti_req_data_offset: offset of network-level data for the PTI template
1697 * @pti_req_tx_cmd: Tx parameters for PTI request template
1698 * @pti_req_template: PTI request template data
1699 */
1700struct iwl_tdls_config_cmd {
1701	__le32 id_and_color; /* mac id and color */
1702	u8 tdls_peer_count;
1703	u8 tx_to_ap_tid;
1704	__le16 tx_to_ap_ssn;
1705	struct iwl_tdls_sta_info sta_info[IWL_MVM_TDLS_STA_COUNT];
1706
1707	__le32 pti_req_data_offset;
1708	struct iwl_tx_cmd pti_req_tx_cmd;
1709	u8 pti_req_template[0];
1710} __packed; /* TDLS_CONFIG_CMD_API_S_VER_1 */
1711
1712/**
1713 * TDLS per-station config information from FW
1714 *
1715 * @sta_id: station id of the TDLS peer
1716 * @tx_to_peer_last_seq: last sequence number used by FW during FW-based Tx to
1717 *	the peer
1718 */
1719struct iwl_tdls_config_sta_info_res {
1720	__le16 sta_id;
1721	__le16 tx_to_peer_last_seq;
1722} __packed; /* TDLS_STA_INFO_RSP_VER_1 */
1723
1724/**
1725 * TDLS config information from FW
1726 *
1727 * @tx_to_ap_last_seq: last sequence number used by FW during FW-based Tx to AP
1728 * @sta_info: per-station TDLS config information
1729 */
1730struct iwl_tdls_config_res {
1731	__le32 tx_to_ap_last_seq;
1732	struct iwl_tdls_config_sta_info_res sta_info[IWL_MVM_TDLS_STA_COUNT];
1733} __packed; /* TDLS_CONFIG_RSP_API_S_VER_1 */
1734
1735#define TX_FIFO_MAX_NUM		8
1736#define RX_FIFO_MAX_NUM		2
1737
1738/**
1739 * Shared memory configuration information from the FW
1740 *
1741 * @shared_mem_addr: shared memory addr (pre 8000 HW set to 0x0 as MARBH is not
1742 *	accessible)
1743 * @shared_mem_size: shared memory size
1744 * @sample_buff_addr: internal sample (mon/adc) buff addr (pre 8000 HW set to
1745 *	0x0 as accessible only via DBGM RDAT)
1746 * @sample_buff_size: internal sample buff size
1747 * @txfifo_addr: start addr of TXF0 (excluding the context table 0.5KB), (pre
1748 *	8000 HW set to 0x0 as not accessible)
1749 * @txfifo_size: size of TXF0 ... TXF7
1750 * @rxfifo_size: RXF1, RXF2 sizes. If there is no RXF2, it'll have a value of 0
1751 * @page_buff_addr: used by UMAC and performance debug (page miss analysis),
1752 *	when paging is not supported this should be 0
1753 * @page_buff_size: size of %page_buff_addr
1754 */
1755struct iwl_shared_mem_cfg {
1756	__le32 shared_mem_addr;
1757	__le32 shared_mem_size;
1758	__le32 sample_buff_addr;
1759	__le32 sample_buff_size;
1760	__le32 txfifo_addr;
1761	__le32 txfifo_size[TX_FIFO_MAX_NUM];
1762	__le32 rxfifo_size[RX_FIFO_MAX_NUM];
1763	__le32 page_buff_addr;
1764	__le32 page_buff_size;
1765} __packed; /* SHARED_MEM_ALLOC_API_S_VER_1 */
1766
1767#endif /* __fw_api_h__ */
1768