1/*
2	Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3	<http://rt2x00.serialmonkey.com>
4
5	This program is free software; you can redistribute it and/or modify
6	it under the terms of the GNU General Public License as published by
7	the Free Software Foundation; either version 2 of the License, or
8	(at your option) any later version.
9
10	This program is distributed in the hope that it will be useful,
11	but WITHOUT ANY WARRANTY; without even the implied warranty of
12	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13	GNU General Public License for more details.
14
15	You should have received a copy of the GNU General Public License
16	along with this program; if not, see <http://www.gnu.org/licenses/>.
17 */
18
19/*
20	Module: rt2500usb
21	Abstract: rt2500usb device specific routines.
22	Supported chipsets: RT2570.
23 */
24
25#include <linux/delay.h>
26#include <linux/etherdevice.h>
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/slab.h>
30#include <linux/usb.h>
31
32#include "rt2x00.h"
33#include "rt2x00usb.h"
34#include "rt2500usb.h"
35
36/*
37 * Allow hardware encryption to be disabled.
38 */
39static bool modparam_nohwcrypt;
40module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
41MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
42
43/*
44 * Register access.
45 * All access to the CSR registers will go through the methods
46 * rt2500usb_register_read and rt2500usb_register_write.
47 * BBP and RF register require indirect register access,
48 * and use the CSR registers BBPCSR and RFCSR to achieve this.
49 * These indirect registers work with busy bits,
50 * and we will try maximal REGISTER_USB_BUSY_COUNT times to access
51 * the register while taking a REGISTER_BUSY_DELAY us delay
52 * between each attampt. When the busy bit is still set at that time,
53 * the access attempt is considered to have failed,
54 * and we will print an error.
55 * If the csr_mutex is already held then the _lock variants must
56 * be used instead.
57 */
58static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
59					   const unsigned int offset,
60					   u16 *value)
61{
62	__le16 reg;
63	rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
64				      USB_VENDOR_REQUEST_IN, offset,
65				      &reg, sizeof(reg));
66	*value = le16_to_cpu(reg);
67}
68
69static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
70						const unsigned int offset,
71						u16 *value)
72{
73	__le16 reg;
74	rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
75				       USB_VENDOR_REQUEST_IN, offset,
76				       &reg, sizeof(reg), REGISTER_TIMEOUT);
77	*value = le16_to_cpu(reg);
78}
79
80static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
81						const unsigned int offset,
82						void *value, const u16 length)
83{
84	rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
85				      USB_VENDOR_REQUEST_IN, offset,
86				      value, length);
87}
88
89static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
90					    const unsigned int offset,
91					    u16 value)
92{
93	__le16 reg = cpu_to_le16(value);
94	rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
95				      USB_VENDOR_REQUEST_OUT, offset,
96				      &reg, sizeof(reg));
97}
98
99static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
100						 const unsigned int offset,
101						 u16 value)
102{
103	__le16 reg = cpu_to_le16(value);
104	rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
105				       USB_VENDOR_REQUEST_OUT, offset,
106				       &reg, sizeof(reg), REGISTER_TIMEOUT);
107}
108
109static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
110						 const unsigned int offset,
111						 void *value, const u16 length)
112{
113	rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
114				      USB_VENDOR_REQUEST_OUT, offset,
115				      value, length);
116}
117
118static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
119				  const unsigned int offset,
120				  struct rt2x00_field16 field,
121				  u16 *reg)
122{
123	unsigned int i;
124
125	for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) {
126		rt2500usb_register_read_lock(rt2x00dev, offset, reg);
127		if (!rt2x00_get_field16(*reg, field))
128			return 1;
129		udelay(REGISTER_BUSY_DELAY);
130	}
131
132	rt2x00_err(rt2x00dev, "Indirect register access failed: offset=0x%.08x, value=0x%.08x\n",
133		   offset, *reg);
134	*reg = ~0;
135
136	return 0;
137}
138
139#define WAIT_FOR_BBP(__dev, __reg) \
140	rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
141#define WAIT_FOR_RF(__dev, __reg) \
142	rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
143
144static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
145				const unsigned int word, const u8 value)
146{
147	u16 reg;
148
149	mutex_lock(&rt2x00dev->csr_mutex);
150
151	/*
152	 * Wait until the BBP becomes available, afterwards we
153	 * can safely write the new data into the register.
154	 */
155	if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
156		reg = 0;
157		rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
158		rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
159		rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
160
161		rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
162	}
163
164	mutex_unlock(&rt2x00dev->csr_mutex);
165}
166
167static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
168			       const unsigned int word, u8 *value)
169{
170	u16 reg;
171
172	mutex_lock(&rt2x00dev->csr_mutex);
173
174	/*
175	 * Wait until the BBP becomes available, afterwards we
176	 * can safely write the read request into the register.
177	 * After the data has been written, we wait until hardware
178	 * returns the correct value, if at any time the register
179	 * doesn't become available in time, reg will be 0xffffffff
180	 * which means we return 0xff to the caller.
181	 */
182	if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
183		reg = 0;
184		rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
185		rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
186
187		rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
188
189		if (WAIT_FOR_BBP(rt2x00dev, &reg))
190			rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
191	}
192
193	*value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
194
195	mutex_unlock(&rt2x00dev->csr_mutex);
196}
197
198static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
199			       const unsigned int word, const u32 value)
200{
201	u16 reg;
202
203	mutex_lock(&rt2x00dev->csr_mutex);
204
205	/*
206	 * Wait until the RF becomes available, afterwards we
207	 * can safely write the new data into the register.
208	 */
209	if (WAIT_FOR_RF(rt2x00dev, &reg)) {
210		reg = 0;
211		rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
212		rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
213
214		reg = 0;
215		rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
216		rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
217		rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
218		rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
219
220		rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
221		rt2x00_rf_write(rt2x00dev, word, value);
222	}
223
224	mutex_unlock(&rt2x00dev->csr_mutex);
225}
226
227#ifdef CONFIG_RT2X00_LIB_DEBUGFS
228static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
229				     const unsigned int offset,
230				     u32 *value)
231{
232	rt2500usb_register_read(rt2x00dev, offset, (u16 *)value);
233}
234
235static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
236				      const unsigned int offset,
237				      u32 value)
238{
239	rt2500usb_register_write(rt2x00dev, offset, value);
240}
241
242static const struct rt2x00debug rt2500usb_rt2x00debug = {
243	.owner	= THIS_MODULE,
244	.csr	= {
245		.read		= _rt2500usb_register_read,
246		.write		= _rt2500usb_register_write,
247		.flags		= RT2X00DEBUGFS_OFFSET,
248		.word_base	= CSR_REG_BASE,
249		.word_size	= sizeof(u16),
250		.word_count	= CSR_REG_SIZE / sizeof(u16),
251	},
252	.eeprom	= {
253		.read		= rt2x00_eeprom_read,
254		.write		= rt2x00_eeprom_write,
255		.word_base	= EEPROM_BASE,
256		.word_size	= sizeof(u16),
257		.word_count	= EEPROM_SIZE / sizeof(u16),
258	},
259	.bbp	= {
260		.read		= rt2500usb_bbp_read,
261		.write		= rt2500usb_bbp_write,
262		.word_base	= BBP_BASE,
263		.word_size	= sizeof(u8),
264		.word_count	= BBP_SIZE / sizeof(u8),
265	},
266	.rf	= {
267		.read		= rt2x00_rf_read,
268		.write		= rt2500usb_rf_write,
269		.word_base	= RF_BASE,
270		.word_size	= sizeof(u32),
271		.word_count	= RF_SIZE / sizeof(u32),
272	},
273};
274#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
275
276static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
277{
278	u16 reg;
279
280	rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
281	return rt2x00_get_field16(reg, MAC_CSR19_VAL7);
282}
283
284#ifdef CONFIG_RT2X00_LIB_LEDS
285static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
286				     enum led_brightness brightness)
287{
288	struct rt2x00_led *led =
289	    container_of(led_cdev, struct rt2x00_led, led_dev);
290	unsigned int enabled = brightness != LED_OFF;
291	u16 reg;
292
293	rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, &reg);
294
295	if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
296		rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
297	else if (led->type == LED_TYPE_ACTIVITY)
298		rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
299
300	rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
301}
302
303static int rt2500usb_blink_set(struct led_classdev *led_cdev,
304			       unsigned long *delay_on,
305			       unsigned long *delay_off)
306{
307	struct rt2x00_led *led =
308	    container_of(led_cdev, struct rt2x00_led, led_dev);
309	u16 reg;
310
311	rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, &reg);
312	rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
313	rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
314	rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
315
316	return 0;
317}
318
319static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
320			       struct rt2x00_led *led,
321			       enum led_type type)
322{
323	led->rt2x00dev = rt2x00dev;
324	led->type = type;
325	led->led_dev.brightness_set = rt2500usb_brightness_set;
326	led->led_dev.blink_set = rt2500usb_blink_set;
327	led->flags = LED_INITIALIZED;
328}
329#endif /* CONFIG_RT2X00_LIB_LEDS */
330
331/*
332 * Configuration handlers.
333 */
334
335/*
336 * rt2500usb does not differentiate between shared and pairwise
337 * keys, so we should use the same function for both key types.
338 */
339static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
340				struct rt2x00lib_crypto *crypto,
341				struct ieee80211_key_conf *key)
342{
343	u32 mask;
344	u16 reg;
345	enum cipher curr_cipher;
346
347	if (crypto->cmd == SET_KEY) {
348		/*
349		 * Disallow to set WEP key other than with index 0,
350		 * it is known that not work at least on some hardware.
351		 * SW crypto will be used in that case.
352		 */
353		if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
354		     key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
355		    key->keyidx != 0)
356			return -EOPNOTSUPP;
357
358		/*
359		 * Pairwise key will always be entry 0, but this
360		 * could collide with a shared key on the same
361		 * position...
362		 */
363		mask = TXRX_CSR0_KEY_ID.bit_mask;
364
365		rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
366		curr_cipher = rt2x00_get_field16(reg, TXRX_CSR0_ALGORITHM);
367		reg &= mask;
368
369		if (reg && reg == mask)
370			return -ENOSPC;
371
372		reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
373
374		key->hw_key_idx += reg ? ffz(reg) : 0;
375		/*
376		 * Hardware requires that all keys use the same cipher
377		 * (e.g. TKIP-only, AES-only, but not TKIP+AES).
378		 * If this is not the first key, compare the cipher with the
379		 * first one and fall back to SW crypto if not the same.
380		 */
381		if (key->hw_key_idx > 0 && crypto->cipher != curr_cipher)
382			return -EOPNOTSUPP;
383
384		rt2500usb_register_multiwrite(rt2x00dev, KEY_ENTRY(key->hw_key_idx),
385					      crypto->key, sizeof(crypto->key));
386
387		/*
388		 * The driver does not support the IV/EIV generation
389		 * in hardware. However it demands the data to be provided
390		 * both separately as well as inside the frame.
391		 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
392		 * to ensure rt2x00lib will not strip the data from the
393		 * frame after the copy, now we must tell mac80211
394		 * to generate the IV/EIV data.
395		 */
396		key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
397		key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
398	}
399
400	/*
401	 * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
402	 * a particular key is valid.
403	 */
404	rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
405	rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, crypto->cipher);
406	rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
407
408	mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
409	if (crypto->cmd == SET_KEY)
410		mask |= 1 << key->hw_key_idx;
411	else if (crypto->cmd == DISABLE_KEY)
412		mask &= ~(1 << key->hw_key_idx);
413	rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, mask);
414	rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
415
416	return 0;
417}
418
419static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
420				    const unsigned int filter_flags)
421{
422	u16 reg;
423
424	/*
425	 * Start configuration steps.
426	 * Note that the version error will always be dropped
427	 * and broadcast frames will always be accepted since
428	 * there is no filter for it at this time.
429	 */
430	rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
431	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
432			   !(filter_flags & FIF_FCSFAIL));
433	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
434			   !(filter_flags & FIF_PLCPFAIL));
435	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
436			   !(filter_flags & FIF_CONTROL));
437	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
438			   !(filter_flags & FIF_PROMISC_IN_BSS));
439	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
440			   !(filter_flags & FIF_PROMISC_IN_BSS) &&
441			   !rt2x00dev->intf_ap_count);
442	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
443	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
444			   !(filter_flags & FIF_ALLMULTI));
445	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
446	rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
447}
448
449static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
450				  struct rt2x00_intf *intf,
451				  struct rt2x00intf_conf *conf,
452				  const unsigned int flags)
453{
454	unsigned int bcn_preload;
455	u16 reg;
456
457	if (flags & CONFIG_UPDATE_TYPE) {
458		/*
459		 * Enable beacon config
460		 */
461		bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
462		rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
463		rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
464		rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
465				   2 * (conf->type != NL80211_IFTYPE_STATION));
466		rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
467
468		/*
469		 * Enable synchronisation.
470		 */
471		rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
472		rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
473		rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
474
475		rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
476		rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
477		rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
478	}
479
480	if (flags & CONFIG_UPDATE_MAC)
481		rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
482					      (3 * sizeof(__le16)));
483
484	if (flags & CONFIG_UPDATE_BSSID)
485		rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
486					      (3 * sizeof(__le16)));
487}
488
489static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
490				 struct rt2x00lib_erp *erp,
491				 u32 changed)
492{
493	u16 reg;
494
495	if (changed & BSS_CHANGED_ERP_PREAMBLE) {
496		rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
497		rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
498				   !!erp->short_preamble);
499		rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
500	}
501
502	if (changed & BSS_CHANGED_BASIC_RATES)
503		rt2500usb_register_write(rt2x00dev, TXRX_CSR11,
504					 erp->basic_rates);
505
506	if (changed & BSS_CHANGED_BEACON_INT) {
507		rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
508		rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
509				   erp->beacon_int * 4);
510		rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
511	}
512
513	if (changed & BSS_CHANGED_ERP_SLOT) {
514		rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
515		rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
516		rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
517	}
518}
519
520static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
521				 struct antenna_setup *ant)
522{
523	u8 r2;
524	u8 r14;
525	u16 csr5;
526	u16 csr6;
527
528	/*
529	 * We should never come here because rt2x00lib is supposed
530	 * to catch this and send us the correct antenna explicitely.
531	 */
532	BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
533	       ant->tx == ANTENNA_SW_DIVERSITY);
534
535	rt2500usb_bbp_read(rt2x00dev, 2, &r2);
536	rt2500usb_bbp_read(rt2x00dev, 14, &r14);
537	rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
538	rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
539
540	/*
541	 * Configure the TX antenna.
542	 */
543	switch (ant->tx) {
544	case ANTENNA_HW_DIVERSITY:
545		rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
546		rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
547		rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
548		break;
549	case ANTENNA_A:
550		rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
551		rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
552		rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
553		break;
554	case ANTENNA_B:
555	default:
556		rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
557		rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
558		rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
559		break;
560	}
561
562	/*
563	 * Configure the RX antenna.
564	 */
565	switch (ant->rx) {
566	case ANTENNA_HW_DIVERSITY:
567		rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
568		break;
569	case ANTENNA_A:
570		rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
571		break;
572	case ANTENNA_B:
573	default:
574		rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
575		break;
576	}
577
578	/*
579	 * RT2525E and RT5222 need to flip TX I/Q
580	 */
581	if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) {
582		rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
583		rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
584		rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
585
586		/*
587		 * RT2525E does not need RX I/Q Flip.
588		 */
589		if (rt2x00_rf(rt2x00dev, RF2525E))
590			rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
591	} else {
592		rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
593		rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
594	}
595
596	rt2500usb_bbp_write(rt2x00dev, 2, r2);
597	rt2500usb_bbp_write(rt2x00dev, 14, r14);
598	rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
599	rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
600}
601
602static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
603				     struct rf_channel *rf, const int txpower)
604{
605	/*
606	 * Set TXpower.
607	 */
608	rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
609
610	/*
611	 * For RT2525E we should first set the channel to half band higher.
612	 */
613	if (rt2x00_rf(rt2x00dev, RF2525E)) {
614		static const u32 vals[] = {
615			0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
616			0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
617			0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
618			0x00000902, 0x00000906
619		};
620
621		rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
622		if (rf->rf4)
623			rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
624	}
625
626	rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
627	rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
628	rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
629	if (rf->rf4)
630		rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
631}
632
633static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
634				     const int txpower)
635{
636	u32 rf3;
637
638	rt2x00_rf_read(rt2x00dev, 3, &rf3);
639	rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
640	rt2500usb_rf_write(rt2x00dev, 3, rf3);
641}
642
643static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
644				struct rt2x00lib_conf *libconf)
645{
646	enum dev_state state =
647	    (libconf->conf->flags & IEEE80211_CONF_PS) ?
648		STATE_SLEEP : STATE_AWAKE;
649	u16 reg;
650
651	if (state == STATE_SLEEP) {
652		rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
653		rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON,
654				   rt2x00dev->beacon_int - 20);
655		rt2x00_set_field16(&reg, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
656				   libconf->conf->listen_interval - 1);
657
658		/* We must first disable autowake before it can be enabled */
659		rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
660		rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
661
662		rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 1);
663		rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
664	} else {
665		rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
666		rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
667		rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
668	}
669
670	rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
671}
672
673static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
674			     struct rt2x00lib_conf *libconf,
675			     const unsigned int flags)
676{
677	if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
678		rt2500usb_config_channel(rt2x00dev, &libconf->rf,
679					 libconf->conf->power_level);
680	if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
681	    !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
682		rt2500usb_config_txpower(rt2x00dev,
683					 libconf->conf->power_level);
684	if (flags & IEEE80211_CONF_CHANGE_PS)
685		rt2500usb_config_ps(rt2x00dev, libconf);
686}
687
688/*
689 * Link tuning
690 */
691static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
692				 struct link_qual *qual)
693{
694	u16 reg;
695
696	/*
697	 * Update FCS error count from register.
698	 */
699	rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
700	qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
701
702	/*
703	 * Update False CCA count from register.
704	 */
705	rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
706	qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
707}
708
709static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
710				  struct link_qual *qual)
711{
712	u16 eeprom;
713	u16 value;
714
715	rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
716	value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
717	rt2500usb_bbp_write(rt2x00dev, 24, value);
718
719	rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
720	value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
721	rt2500usb_bbp_write(rt2x00dev, 25, value);
722
723	rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
724	value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
725	rt2500usb_bbp_write(rt2x00dev, 61, value);
726
727	rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
728	value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
729	rt2500usb_bbp_write(rt2x00dev, 17, value);
730
731	qual->vgc_level = value;
732}
733
734/*
735 * Queue handlers.
736 */
737static void rt2500usb_start_queue(struct data_queue *queue)
738{
739	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
740	u16 reg;
741
742	switch (queue->qid) {
743	case QID_RX:
744		rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
745		rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 0);
746		rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
747		break;
748	case QID_BEACON:
749		rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
750		rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
751		rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
752		rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
753		rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
754		break;
755	default:
756		break;
757	}
758}
759
760static void rt2500usb_stop_queue(struct data_queue *queue)
761{
762	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
763	u16 reg;
764
765	switch (queue->qid) {
766	case QID_RX:
767		rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
768		rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
769		rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
770		break;
771	case QID_BEACON:
772		rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
773		rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
774		rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
775		rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
776		rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
777		break;
778	default:
779		break;
780	}
781}
782
783/*
784 * Initialization functions.
785 */
786static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
787{
788	u16 reg;
789
790	rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
791				    USB_MODE_TEST, REGISTER_TIMEOUT);
792	rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
793				    0x00f0, REGISTER_TIMEOUT);
794
795	rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
796	rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
797	rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
798
799	rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
800	rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
801
802	rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
803	rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
804	rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
805	rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
806	rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
807
808	rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
809	rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
810	rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
811	rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
812	rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
813
814	rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
815	rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
816	rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
817	rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
818	rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
819	rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
820
821	rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
822	rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
823	rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
824	rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
825	rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
826	rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
827
828	rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
829	rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
830	rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
831	rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
832	rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
833	rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
834
835	rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
836	rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
837	rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
838	rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
839	rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
840	rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
841
842	rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
843	rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
844	rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
845	rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
846	rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
847	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
848
849	rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
850	rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
851
852	if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
853		return -EBUSY;
854
855	rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
856	rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
857	rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
858	rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
859	rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
860
861	if (rt2x00_rev(rt2x00dev) >= RT2570_VERSION_C) {
862		rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
863		rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
864	} else {
865		reg = 0;
866		rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
867		rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
868	}
869	rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
870
871	rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
872	rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
873	rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
874	rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
875
876	rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
877	rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
878			   rt2x00dev->rx->data_size);
879	rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
880
881	rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
882	rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, CIPHER_NONE);
883	rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
884	rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0);
885	rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
886
887	rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
888	rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
889	rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
890
891	rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
892	rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
893	rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
894
895	rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
896	rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
897	rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
898
899	return 0;
900}
901
902static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
903{
904	unsigned int i;
905	u8 value;
906
907	for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) {
908		rt2500usb_bbp_read(rt2x00dev, 0, &value);
909		if ((value != 0xff) && (value != 0x00))
910			return 0;
911		udelay(REGISTER_BUSY_DELAY);
912	}
913
914	rt2x00_err(rt2x00dev, "BBP register access failed, aborting\n");
915	return -EACCES;
916}
917
918static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
919{
920	unsigned int i;
921	u16 eeprom;
922	u8 value;
923	u8 reg_id;
924
925	if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
926		return -EACCES;
927
928	rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
929	rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
930	rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
931	rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
932	rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
933	rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
934	rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
935	rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
936	rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
937	rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
938	rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
939	rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
940	rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
941	rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
942	rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
943	rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
944	rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
945	rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
946	rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
947	rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
948	rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
949	rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
950	rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
951	rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
952	rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
953	rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
954	rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
955	rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
956	rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
957	rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
958	rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
959
960	for (i = 0; i < EEPROM_BBP_SIZE; i++) {
961		rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
962
963		if (eeprom != 0xffff && eeprom != 0x0000) {
964			reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
965			value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
966			rt2500usb_bbp_write(rt2x00dev, reg_id, value);
967		}
968	}
969
970	return 0;
971}
972
973/*
974 * Device state switch handlers.
975 */
976static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
977{
978	/*
979	 * Initialize all registers.
980	 */
981	if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
982		     rt2500usb_init_bbp(rt2x00dev)))
983		return -EIO;
984
985	return 0;
986}
987
988static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
989{
990	rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
991	rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
992
993	/*
994	 * Disable synchronisation.
995	 */
996	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
997
998	rt2x00usb_disable_radio(rt2x00dev);
999}
1000
1001static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
1002			       enum dev_state state)
1003{
1004	u16 reg;
1005	u16 reg2;
1006	unsigned int i;
1007	char put_to_sleep;
1008	char bbp_state;
1009	char rf_state;
1010
1011	put_to_sleep = (state != STATE_AWAKE);
1012
1013	reg = 0;
1014	rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
1015	rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
1016	rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
1017	rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1018	rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
1019	rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1020
1021	/*
1022	 * Device is not guaranteed to be in the requested state yet.
1023	 * We must wait until the register indicates that the
1024	 * device has entered the correct state.
1025	 */
1026	for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) {
1027		rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
1028		bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
1029		rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
1030		if (bbp_state == state && rf_state == state)
1031			return 0;
1032		rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1033		msleep(30);
1034	}
1035
1036	return -EBUSY;
1037}
1038
1039static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1040				      enum dev_state state)
1041{
1042	int retval = 0;
1043
1044	switch (state) {
1045	case STATE_RADIO_ON:
1046		retval = rt2500usb_enable_radio(rt2x00dev);
1047		break;
1048	case STATE_RADIO_OFF:
1049		rt2500usb_disable_radio(rt2x00dev);
1050		break;
1051	case STATE_RADIO_IRQ_ON:
1052	case STATE_RADIO_IRQ_OFF:
1053		/* No support, but no error either */
1054		break;
1055	case STATE_DEEP_SLEEP:
1056	case STATE_SLEEP:
1057	case STATE_STANDBY:
1058	case STATE_AWAKE:
1059		retval = rt2500usb_set_state(rt2x00dev, state);
1060		break;
1061	default:
1062		retval = -ENOTSUPP;
1063		break;
1064	}
1065
1066	if (unlikely(retval))
1067		rt2x00_err(rt2x00dev, "Device failed to enter state %d (%d)\n",
1068			   state, retval);
1069
1070	return retval;
1071}
1072
1073/*
1074 * TX descriptor initialization
1075 */
1076static void rt2500usb_write_tx_desc(struct queue_entry *entry,
1077				    struct txentry_desc *txdesc)
1078{
1079	struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1080	__le32 *txd = (__le32 *) entry->skb->data;
1081	u32 word;
1082
1083	/*
1084	 * Start writing the descriptor words.
1085	 */
1086	rt2x00_desc_read(txd, 0, &word);
1087	rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
1088	rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1089			   test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
1090	rt2x00_set_field32(&word, TXD_W0_ACK,
1091			   test_bit(ENTRY_TXD_ACK, &txdesc->flags));
1092	rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1093			   test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
1094	rt2x00_set_field32(&word, TXD_W0_OFDM,
1095			   (txdesc->rate_mode == RATE_MODE_OFDM));
1096	rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1097			   test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
1098	rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->u.plcp.ifs);
1099	rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length);
1100	rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
1101	rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
1102	rt2x00_desc_write(txd, 0, word);
1103
1104	rt2x00_desc_read(txd, 1, &word);
1105	rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
1106	rt2x00_set_field32(&word, TXD_W1_AIFS, entry->queue->aifs);
1107	rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->queue->cw_min);
1108	rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->queue->cw_max);
1109	rt2x00_desc_write(txd, 1, word);
1110
1111	rt2x00_desc_read(txd, 2, &word);
1112	rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->u.plcp.signal);
1113	rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->u.plcp.service);
1114	rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW,
1115			   txdesc->u.plcp.length_low);
1116	rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH,
1117			   txdesc->u.plcp.length_high);
1118	rt2x00_desc_write(txd, 2, word);
1119
1120	if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
1121		_rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
1122		_rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
1123	}
1124
1125	/*
1126	 * Register descriptor details in skb frame descriptor.
1127	 */
1128	skbdesc->flags |= SKBDESC_DESC_IN_SKB;
1129	skbdesc->desc = txd;
1130	skbdesc->desc_len = TXD_DESC_SIZE;
1131}
1132
1133/*
1134 * TX data initialization
1135 */
1136static void rt2500usb_beacondone(struct urb *urb);
1137
1138static void rt2500usb_write_beacon(struct queue_entry *entry,
1139				   struct txentry_desc *txdesc)
1140{
1141	struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1142	struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
1143	struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1144	int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
1145	int length;
1146	u16 reg, reg0;
1147
1148	/*
1149	 * Disable beaconing while we are reloading the beacon data,
1150	 * otherwise we might be sending out invalid data.
1151	 */
1152	rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1153	rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
1154	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1155
1156	/*
1157	 * Add space for the descriptor in front of the skb.
1158	 */
1159	skb_push(entry->skb, TXD_DESC_SIZE);
1160	memset(entry->skb->data, 0, TXD_DESC_SIZE);
1161
1162	/*
1163	 * Write the TX descriptor for the beacon.
1164	 */
1165	rt2500usb_write_tx_desc(entry, txdesc);
1166
1167	/*
1168	 * Dump beacon to userspace through debugfs.
1169	 */
1170	rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb);
1171
1172	/*
1173	 * USB devices cannot blindly pass the skb->len as the
1174	 * length of the data to usb_fill_bulk_urb. Pass the skb
1175	 * to the driver to determine what the length should be.
1176	 */
1177	length = rt2x00dev->ops->lib->get_tx_data_len(entry);
1178
1179	usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
1180			  entry->skb->data, length, rt2500usb_beacondone,
1181			  entry);
1182
1183	/*
1184	 * Second we need to create the guardian byte.
1185	 * We only need a single byte, so lets recycle
1186	 * the 'flags' field we are not using for beacons.
1187	 */
1188	bcn_priv->guardian_data = 0;
1189	usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
1190			  &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
1191			  entry);
1192
1193	/*
1194	 * Send out the guardian byte.
1195	 */
1196	usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
1197
1198	/*
1199	 * Enable beaconing again.
1200	 */
1201	rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
1202	rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
1203	reg0 = reg;
1204	rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1205	/*
1206	 * Beacon generation will fail initially.
1207	 * To prevent this we need to change the TXRX_CSR19
1208	 * register several times (reg0 is the same as reg
1209	 * except for TXRX_CSR19_BEACON_GEN, which is 0 in reg0
1210	 * and 1 in reg).
1211	 */
1212	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1213	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
1214	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1215	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
1216	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1217}
1218
1219static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
1220{
1221	int length;
1222
1223	/*
1224	 * The length _must_ be a multiple of 2,
1225	 * but it must _not_ be a multiple of the USB packet size.
1226	 */
1227	length = roundup(entry->skb->len, 2);
1228	length += (2 * !(length % entry->queue->usb_maxpacket));
1229
1230	return length;
1231}
1232
1233/*
1234 * RX control handlers
1235 */
1236static void rt2500usb_fill_rxdone(struct queue_entry *entry,
1237				  struct rxdone_entry_desc *rxdesc)
1238{
1239	struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1240	struct queue_entry_priv_usb *entry_priv = entry->priv_data;
1241	struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1242	__le32 *rxd =
1243	    (__le32 *)(entry->skb->data +
1244		       (entry_priv->urb->actual_length -
1245			entry->queue->desc_size));
1246	u32 word0;
1247	u32 word1;
1248
1249	/*
1250	 * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
1251	 * frame data in rt2x00usb.
1252	 */
1253	memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
1254	rxd = (__le32 *)skbdesc->desc;
1255
1256	/*
1257	 * It is now safe to read the descriptor on all architectures.
1258	 */
1259	rt2x00_desc_read(rxd, 0, &word0);
1260	rt2x00_desc_read(rxd, 1, &word1);
1261
1262	if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1263		rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
1264	if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
1265		rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
1266
1267	rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
1268	if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
1269		rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
1270
1271	if (rxdesc->cipher != CIPHER_NONE) {
1272		_rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
1273		_rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
1274		rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
1275
1276		/* ICV is located at the end of frame */
1277
1278		rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
1279		if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
1280			rxdesc->flags |= RX_FLAG_DECRYPTED;
1281		else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
1282			rxdesc->flags |= RX_FLAG_MMIC_ERROR;
1283	}
1284
1285	/*
1286	 * Obtain the status about this packet.
1287	 * When frame was received with an OFDM bitrate,
1288	 * the signal is the PLCP value. If it was received with
1289	 * a CCK bitrate the signal is the rate in 100kbit/s.
1290	 */
1291	rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1292	rxdesc->rssi =
1293	    rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
1294	rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1295
1296	if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1297		rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
1298	else
1299		rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
1300	if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1301		rxdesc->dev_flags |= RXDONE_MY_BSS;
1302
1303	/*
1304	 * Adjust the skb memory window to the frame boundaries.
1305	 */
1306	skb_trim(entry->skb, rxdesc->size);
1307}
1308
1309/*
1310 * Interrupt functions.
1311 */
1312static void rt2500usb_beacondone(struct urb *urb)
1313{
1314	struct queue_entry *entry = (struct queue_entry *)urb->context;
1315	struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1316
1317	if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
1318		return;
1319
1320	/*
1321	 * Check if this was the guardian beacon,
1322	 * if that was the case we need to send the real beacon now.
1323	 * Otherwise we should free the sk_buffer, the device
1324	 * should be doing the rest of the work now.
1325	 */
1326	if (bcn_priv->guardian_urb == urb) {
1327		usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
1328	} else if (bcn_priv->urb == urb) {
1329		dev_kfree_skb(entry->skb);
1330		entry->skb = NULL;
1331	}
1332}
1333
1334/*
1335 * Device probe functions.
1336 */
1337static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1338{
1339	u16 word;
1340	u8 *mac;
1341	u8 bbp;
1342
1343	rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1344
1345	/*
1346	 * Start validation of the data that has been read.
1347	 */
1348	mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1349	if (!is_valid_ether_addr(mac)) {
1350		eth_random_addr(mac);
1351		rt2x00_eeprom_dbg(rt2x00dev, "MAC: %pM\n", mac);
1352	}
1353
1354	rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1355	if (word == 0xffff) {
1356		rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1357		rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1358				   ANTENNA_SW_DIVERSITY);
1359		rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1360				   ANTENNA_SW_DIVERSITY);
1361		rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1362				   LED_MODE_DEFAULT);
1363		rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1364		rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1365		rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1366		rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1367		rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word);
1368	}
1369
1370	rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1371	if (word == 0xffff) {
1372		rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1373		rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1374		rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1375		rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1376		rt2x00_eeprom_dbg(rt2x00dev, "NIC: 0x%04x\n", word);
1377	}
1378
1379	rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1380	if (word == 0xffff) {
1381		rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1382				   DEFAULT_RSSI_OFFSET);
1383		rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1384		rt2x00_eeprom_dbg(rt2x00dev, "Calibrate offset: 0x%04x\n",
1385				  word);
1386	}
1387
1388	rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1389	if (word == 0xffff) {
1390		rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1391		rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1392		rt2x00_eeprom_dbg(rt2x00dev, "BBPtune: 0x%04x\n", word);
1393	}
1394
1395	/*
1396	 * Switch lower vgc bound to current BBP R17 value,
1397	 * lower the value a bit for better quality.
1398	 */
1399	rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
1400	bbp -= 6;
1401
1402	rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1403	if (word == 0xffff) {
1404		rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
1405		rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1406		rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1407		rt2x00_eeprom_dbg(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1408	} else {
1409		rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1410		rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1411	}
1412
1413	rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1414	if (word == 0xffff) {
1415		rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1416		rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1417		rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1418		rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1419	}
1420
1421	rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1422	if (word == 0xffff) {
1423		rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1424		rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1425		rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1426		rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1427	}
1428
1429	rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1430	if (word == 0xffff) {
1431		rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1432		rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1433		rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1434		rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1435	}
1436
1437	rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1438	if (word == 0xffff) {
1439		rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1440		rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1441		rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1442		rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1443	}
1444
1445	return 0;
1446}
1447
1448static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1449{
1450	u16 reg;
1451	u16 value;
1452	u16 eeprom;
1453
1454	/*
1455	 * Read EEPROM word for configuration.
1456	 */
1457	rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1458
1459	/*
1460	 * Identify RF chipset.
1461	 */
1462	value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1463	rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1464	rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1465
1466	if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) {
1467		rt2x00_err(rt2x00dev, "Invalid RT chipset detected\n");
1468		return -ENODEV;
1469	}
1470
1471	if (!rt2x00_rf(rt2x00dev, RF2522) &&
1472	    !rt2x00_rf(rt2x00dev, RF2523) &&
1473	    !rt2x00_rf(rt2x00dev, RF2524) &&
1474	    !rt2x00_rf(rt2x00dev, RF2525) &&
1475	    !rt2x00_rf(rt2x00dev, RF2525E) &&
1476	    !rt2x00_rf(rt2x00dev, RF5222)) {
1477		rt2x00_err(rt2x00dev, "Invalid RF chipset detected\n");
1478		return -ENODEV;
1479	}
1480
1481	/*
1482	 * Identify default antenna configuration.
1483	 */
1484	rt2x00dev->default_ant.tx =
1485	    rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1486	rt2x00dev->default_ant.rx =
1487	    rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1488
1489	/*
1490	 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1491	 * I am not 100% sure about this, but the legacy drivers do not
1492	 * indicate antenna swapping in software is required when
1493	 * diversity is enabled.
1494	 */
1495	if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1496		rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1497	if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1498		rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1499
1500	/*
1501	 * Store led mode, for correct led behaviour.
1502	 */
1503#ifdef CONFIG_RT2X00_LIB_LEDS
1504	value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1505
1506	rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
1507	if (value == LED_MODE_TXRX_ACTIVITY ||
1508	    value == LED_MODE_DEFAULT ||
1509	    value == LED_MODE_ASUS)
1510		rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
1511				   LED_TYPE_ACTIVITY);
1512#endif /* CONFIG_RT2X00_LIB_LEDS */
1513
1514	/*
1515	 * Detect if this device has an hardware controlled radio.
1516	 */
1517	if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
1518		__set_bit(CAPABILITY_HW_BUTTON, &rt2x00dev->cap_flags);
1519
1520	/*
1521	 * Read the RSSI <-> dBm offset information.
1522	 */
1523	rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1524	rt2x00dev->rssi_offset =
1525	    rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1526
1527	return 0;
1528}
1529
1530/*
1531 * RF value list for RF2522
1532 * Supports: 2.4 GHz
1533 */
1534static const struct rf_channel rf_vals_bg_2522[] = {
1535	{ 1,  0x00002050, 0x000c1fda, 0x00000101, 0 },
1536	{ 2,  0x00002050, 0x000c1fee, 0x00000101, 0 },
1537	{ 3,  0x00002050, 0x000c2002, 0x00000101, 0 },
1538	{ 4,  0x00002050, 0x000c2016, 0x00000101, 0 },
1539	{ 5,  0x00002050, 0x000c202a, 0x00000101, 0 },
1540	{ 6,  0x00002050, 0x000c203e, 0x00000101, 0 },
1541	{ 7,  0x00002050, 0x000c2052, 0x00000101, 0 },
1542	{ 8,  0x00002050, 0x000c2066, 0x00000101, 0 },
1543	{ 9,  0x00002050, 0x000c207a, 0x00000101, 0 },
1544	{ 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1545	{ 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1546	{ 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1547	{ 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1548	{ 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1549};
1550
1551/*
1552 * RF value list for RF2523
1553 * Supports: 2.4 GHz
1554 */
1555static const struct rf_channel rf_vals_bg_2523[] = {
1556	{ 1,  0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1557	{ 2,  0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1558	{ 3,  0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1559	{ 4,  0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1560	{ 5,  0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1561	{ 6,  0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1562	{ 7,  0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1563	{ 8,  0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1564	{ 9,  0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1565	{ 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1566	{ 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1567	{ 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1568	{ 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1569	{ 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1570};
1571
1572/*
1573 * RF value list for RF2524
1574 * Supports: 2.4 GHz
1575 */
1576static const struct rf_channel rf_vals_bg_2524[] = {
1577	{ 1,  0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1578	{ 2,  0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1579	{ 3,  0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1580	{ 4,  0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1581	{ 5,  0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1582	{ 6,  0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1583	{ 7,  0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1584	{ 8,  0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1585	{ 9,  0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1586	{ 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1587	{ 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1588	{ 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1589	{ 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1590	{ 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1591};
1592
1593/*
1594 * RF value list for RF2525
1595 * Supports: 2.4 GHz
1596 */
1597static const struct rf_channel rf_vals_bg_2525[] = {
1598	{ 1,  0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1599	{ 2,  0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1600	{ 3,  0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1601	{ 4,  0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1602	{ 5,  0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1603	{ 6,  0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1604	{ 7,  0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1605	{ 8,  0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1606	{ 9,  0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1607	{ 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1608	{ 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1609	{ 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1610	{ 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1611	{ 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1612};
1613
1614/*
1615 * RF value list for RF2525e
1616 * Supports: 2.4 GHz
1617 */
1618static const struct rf_channel rf_vals_bg_2525e[] = {
1619	{ 1,  0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1620	{ 2,  0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1621	{ 3,  0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1622	{ 4,  0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1623	{ 5,  0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1624	{ 6,  0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1625	{ 7,  0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1626	{ 8,  0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1627	{ 9,  0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1628	{ 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1629	{ 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1630	{ 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1631	{ 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1632	{ 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1633};
1634
1635/*
1636 * RF value list for RF5222
1637 * Supports: 2.4 GHz & 5.2 GHz
1638 */
1639static const struct rf_channel rf_vals_5222[] = {
1640	{ 1,  0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1641	{ 2,  0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1642	{ 3,  0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1643	{ 4,  0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1644	{ 5,  0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1645	{ 6,  0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1646	{ 7,  0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1647	{ 8,  0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1648	{ 9,  0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1649	{ 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1650	{ 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1651	{ 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1652	{ 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1653	{ 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1654
1655	/* 802.11 UNI / HyperLan 2 */
1656	{ 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1657	{ 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1658	{ 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1659	{ 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1660	{ 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1661	{ 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1662	{ 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1663	{ 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1664
1665	/* 802.11 HyperLan 2 */
1666	{ 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1667	{ 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1668	{ 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1669	{ 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1670	{ 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1671	{ 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1672	{ 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1673	{ 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1674	{ 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1675	{ 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1676
1677	/* 802.11 UNII */
1678	{ 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1679	{ 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1680	{ 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1681	{ 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1682	{ 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1683};
1684
1685static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1686{
1687	struct hw_mode_spec *spec = &rt2x00dev->spec;
1688	struct channel_info *info;
1689	char *tx_power;
1690	unsigned int i;
1691
1692	/*
1693	 * Initialize all hw fields.
1694	 *
1695	 * Don't set IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING unless we are
1696	 * capable of sending the buffered frames out after the DTIM
1697	 * transmission using rt2x00lib_beacondone. This will send out
1698	 * multicast and broadcast traffic immediately instead of buffering it
1699	 * infinitly and thus dropping it after some time.
1700	 */
1701	rt2x00dev->hw->flags =
1702	    IEEE80211_HW_RX_INCLUDES_FCS |
1703	    IEEE80211_HW_SIGNAL_DBM |
1704	    IEEE80211_HW_SUPPORTS_PS |
1705	    IEEE80211_HW_PS_NULLFUNC_STACK;
1706
1707	/*
1708	 * Disable powersaving as default.
1709	 */
1710	rt2x00dev->hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
1711
1712	SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
1713	SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1714				rt2x00_eeprom_addr(rt2x00dev,
1715						   EEPROM_MAC_ADDR_0));
1716
1717	/*
1718	 * Initialize hw_mode information.
1719	 */
1720	spec->supported_bands = SUPPORT_BAND_2GHZ;
1721	spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
1722
1723	if (rt2x00_rf(rt2x00dev, RF2522)) {
1724		spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1725		spec->channels = rf_vals_bg_2522;
1726	} else if (rt2x00_rf(rt2x00dev, RF2523)) {
1727		spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1728		spec->channels = rf_vals_bg_2523;
1729	} else if (rt2x00_rf(rt2x00dev, RF2524)) {
1730		spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1731		spec->channels = rf_vals_bg_2524;
1732	} else if (rt2x00_rf(rt2x00dev, RF2525)) {
1733		spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1734		spec->channels = rf_vals_bg_2525;
1735	} else if (rt2x00_rf(rt2x00dev, RF2525E)) {
1736		spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1737		spec->channels = rf_vals_bg_2525e;
1738	} else if (rt2x00_rf(rt2x00dev, RF5222)) {
1739		spec->supported_bands |= SUPPORT_BAND_5GHZ;
1740		spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1741		spec->channels = rf_vals_5222;
1742	}
1743
1744	/*
1745	 * Create channel information array
1746	 */
1747	info = kcalloc(spec->num_channels, sizeof(*info), GFP_KERNEL);
1748	if (!info)
1749		return -ENOMEM;
1750
1751	spec->channels_info = info;
1752
1753	tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1754	for (i = 0; i < 14; i++) {
1755		info[i].max_power = MAX_TXPOWER;
1756		info[i].default_power1 = TXPOWER_FROM_DEV(tx_power[i]);
1757	}
1758
1759	if (spec->num_channels > 14) {
1760		for (i = 14; i < spec->num_channels; i++) {
1761			info[i].max_power = MAX_TXPOWER;
1762			info[i].default_power1 = DEFAULT_TXPOWER;
1763		}
1764	}
1765
1766	return 0;
1767}
1768
1769static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1770{
1771	int retval;
1772	u16 reg;
1773
1774	/*
1775	 * Allocate eeprom data.
1776	 */
1777	retval = rt2500usb_validate_eeprom(rt2x00dev);
1778	if (retval)
1779		return retval;
1780
1781	retval = rt2500usb_init_eeprom(rt2x00dev);
1782	if (retval)
1783		return retval;
1784
1785	/*
1786	 * Enable rfkill polling by setting GPIO direction of the
1787	 * rfkill switch GPIO pin correctly.
1788	 */
1789	rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
1790	rt2x00_set_field16(&reg, MAC_CSR19_DIR0, 0);
1791	rt2500usb_register_write(rt2x00dev, MAC_CSR19, reg);
1792
1793	/*
1794	 * Initialize hw specifications.
1795	 */
1796	retval = rt2500usb_probe_hw_mode(rt2x00dev);
1797	if (retval)
1798		return retval;
1799
1800	/*
1801	 * This device requires the atim queue
1802	 */
1803	__set_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags);
1804	__set_bit(REQUIRE_BEACON_GUARD, &rt2x00dev->cap_flags);
1805	if (!modparam_nohwcrypt) {
1806		__set_bit(CAPABILITY_HW_CRYPTO, &rt2x00dev->cap_flags);
1807		__set_bit(REQUIRE_COPY_IV, &rt2x00dev->cap_flags);
1808	}
1809	__set_bit(REQUIRE_SW_SEQNO, &rt2x00dev->cap_flags);
1810	__set_bit(REQUIRE_PS_AUTOWAKE, &rt2x00dev->cap_flags);
1811
1812	/*
1813	 * Set the rssi offset.
1814	 */
1815	rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1816
1817	return 0;
1818}
1819
1820static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1821	.tx			= rt2x00mac_tx,
1822	.start			= rt2x00mac_start,
1823	.stop			= rt2x00mac_stop,
1824	.add_interface		= rt2x00mac_add_interface,
1825	.remove_interface	= rt2x00mac_remove_interface,
1826	.config			= rt2x00mac_config,
1827	.configure_filter	= rt2x00mac_configure_filter,
1828	.set_tim		= rt2x00mac_set_tim,
1829	.set_key		= rt2x00mac_set_key,
1830	.sw_scan_start		= rt2x00mac_sw_scan_start,
1831	.sw_scan_complete	= rt2x00mac_sw_scan_complete,
1832	.get_stats		= rt2x00mac_get_stats,
1833	.bss_info_changed	= rt2x00mac_bss_info_changed,
1834	.conf_tx		= rt2x00mac_conf_tx,
1835	.rfkill_poll		= rt2x00mac_rfkill_poll,
1836	.flush			= rt2x00mac_flush,
1837	.set_antenna		= rt2x00mac_set_antenna,
1838	.get_antenna		= rt2x00mac_get_antenna,
1839	.get_ringparam		= rt2x00mac_get_ringparam,
1840	.tx_frames_pending	= rt2x00mac_tx_frames_pending,
1841};
1842
1843static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1844	.probe_hw		= rt2500usb_probe_hw,
1845	.initialize		= rt2x00usb_initialize,
1846	.uninitialize		= rt2x00usb_uninitialize,
1847	.clear_entry		= rt2x00usb_clear_entry,
1848	.set_device_state	= rt2500usb_set_device_state,
1849	.rfkill_poll		= rt2500usb_rfkill_poll,
1850	.link_stats		= rt2500usb_link_stats,
1851	.reset_tuner		= rt2500usb_reset_tuner,
1852	.watchdog		= rt2x00usb_watchdog,
1853	.start_queue		= rt2500usb_start_queue,
1854	.kick_queue		= rt2x00usb_kick_queue,
1855	.stop_queue		= rt2500usb_stop_queue,
1856	.flush_queue		= rt2x00usb_flush_queue,
1857	.write_tx_desc		= rt2500usb_write_tx_desc,
1858	.write_beacon		= rt2500usb_write_beacon,
1859	.get_tx_data_len	= rt2500usb_get_tx_data_len,
1860	.fill_rxdone		= rt2500usb_fill_rxdone,
1861	.config_shared_key	= rt2500usb_config_key,
1862	.config_pairwise_key	= rt2500usb_config_key,
1863	.config_filter		= rt2500usb_config_filter,
1864	.config_intf		= rt2500usb_config_intf,
1865	.config_erp		= rt2500usb_config_erp,
1866	.config_ant		= rt2500usb_config_ant,
1867	.config			= rt2500usb_config,
1868};
1869
1870static void rt2500usb_queue_init(struct data_queue *queue)
1871{
1872	switch (queue->qid) {
1873	case QID_RX:
1874		queue->limit = 32;
1875		queue->data_size = DATA_FRAME_SIZE;
1876		queue->desc_size = RXD_DESC_SIZE;
1877		queue->priv_size = sizeof(struct queue_entry_priv_usb);
1878		break;
1879
1880	case QID_AC_VO:
1881	case QID_AC_VI:
1882	case QID_AC_BE:
1883	case QID_AC_BK:
1884		queue->limit = 32;
1885		queue->data_size = DATA_FRAME_SIZE;
1886		queue->desc_size = TXD_DESC_SIZE;
1887		queue->priv_size = sizeof(struct queue_entry_priv_usb);
1888		break;
1889
1890	case QID_BEACON:
1891		queue->limit = 1;
1892		queue->data_size = MGMT_FRAME_SIZE;
1893		queue->desc_size = TXD_DESC_SIZE;
1894		queue->priv_size = sizeof(struct queue_entry_priv_usb_bcn);
1895		break;
1896
1897	case QID_ATIM:
1898		queue->limit = 8;
1899		queue->data_size = DATA_FRAME_SIZE;
1900		queue->desc_size = TXD_DESC_SIZE;
1901		queue->priv_size = sizeof(struct queue_entry_priv_usb);
1902		break;
1903
1904	default:
1905		BUG();
1906		break;
1907	}
1908}
1909
1910static const struct rt2x00_ops rt2500usb_ops = {
1911	.name			= KBUILD_MODNAME,
1912	.max_ap_intf		= 1,
1913	.eeprom_size		= EEPROM_SIZE,
1914	.rf_size		= RF_SIZE,
1915	.tx_queues		= NUM_TX_QUEUES,
1916	.queue_init		= rt2500usb_queue_init,
1917	.lib			= &rt2500usb_rt2x00_ops,
1918	.hw			= &rt2500usb_mac80211_ops,
1919#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1920	.debugfs		= &rt2500usb_rt2x00debug,
1921#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1922};
1923
1924/*
1925 * rt2500usb module information.
1926 */
1927static struct usb_device_id rt2500usb_device_table[] = {
1928	/* ASUS */
1929	{ USB_DEVICE(0x0b05, 0x1706) },
1930	{ USB_DEVICE(0x0b05, 0x1707) },
1931	/* Belkin */
1932	{ USB_DEVICE(0x050d, 0x7050) },	/* FCC ID: K7SF5D7050A ver. 2.x */
1933	{ USB_DEVICE(0x050d, 0x7051) },
1934	/* Cisco Systems */
1935	{ USB_DEVICE(0x13b1, 0x000d) },
1936	{ USB_DEVICE(0x13b1, 0x0011) },
1937	{ USB_DEVICE(0x13b1, 0x001a) },
1938	/* Conceptronic */
1939	{ USB_DEVICE(0x14b2, 0x3c02) },
1940	/* D-LINK */
1941	{ USB_DEVICE(0x2001, 0x3c00) },
1942	/* Gigabyte */
1943	{ USB_DEVICE(0x1044, 0x8001) },
1944	{ USB_DEVICE(0x1044, 0x8007) },
1945	/* Hercules */
1946	{ USB_DEVICE(0x06f8, 0xe000) },
1947	/* Melco */
1948	{ USB_DEVICE(0x0411, 0x005e) },
1949	{ USB_DEVICE(0x0411, 0x0066) },
1950	{ USB_DEVICE(0x0411, 0x0067) },
1951	{ USB_DEVICE(0x0411, 0x008b) },
1952	{ USB_DEVICE(0x0411, 0x0097) },
1953	/* MSI */
1954	{ USB_DEVICE(0x0db0, 0x6861) },
1955	{ USB_DEVICE(0x0db0, 0x6865) },
1956	{ USB_DEVICE(0x0db0, 0x6869) },
1957	/* Ralink */
1958	{ USB_DEVICE(0x148f, 0x1706) },
1959	{ USB_DEVICE(0x148f, 0x2570) },
1960	{ USB_DEVICE(0x148f, 0x9020) },
1961	/* Sagem */
1962	{ USB_DEVICE(0x079b, 0x004b) },
1963	/* Siemens */
1964	{ USB_DEVICE(0x0681, 0x3c06) },
1965	/* SMC */
1966	{ USB_DEVICE(0x0707, 0xee13) },
1967	/* Spairon */
1968	{ USB_DEVICE(0x114b, 0x0110) },
1969	/* SURECOM */
1970	{ USB_DEVICE(0x0769, 0x11f3) },
1971	/* Trust */
1972	{ USB_DEVICE(0x0eb0, 0x9020) },
1973	/* VTech */
1974	{ USB_DEVICE(0x0f88, 0x3012) },
1975	/* Zinwell */
1976	{ USB_DEVICE(0x5a57, 0x0260) },
1977	{ 0, }
1978};
1979
1980MODULE_AUTHOR(DRV_PROJECT);
1981MODULE_VERSION(DRV_VERSION);
1982MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1983MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1984MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1985MODULE_LICENSE("GPL");
1986
1987static int rt2500usb_probe(struct usb_interface *usb_intf,
1988			   const struct usb_device_id *id)
1989{
1990	return rt2x00usb_probe(usb_intf, &rt2500usb_ops);
1991}
1992
1993static struct usb_driver rt2500usb_driver = {
1994	.name		= KBUILD_MODNAME,
1995	.id_table	= rt2500usb_device_table,
1996	.probe		= rt2500usb_probe,
1997	.disconnect	= rt2x00usb_disconnect,
1998	.suspend	= rt2x00usb_suspend,
1999	.resume		= rt2x00usb_resume,
2000	.reset_resume	= rt2x00usb_resume,
2001	.disable_hub_initiated_lpm = 1,
2002};
2003
2004module_usb_driver(rt2500usb_driver);
2005