1/****************************************************************************** 2 * 3 * Copyright(c) 2009-2013 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * The full GNU General Public License is included in this distribution in the 15 * file called LICENSE. 16 * 17 * Contact Information: 18 * wlanfae <wlanfae@realtek.com> 19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 20 * Hsinchu 300, Taiwan. 21 * 22 * Larry Finger <Larry.Finger@lwfinger.net> 23 * 24 *****************************************************************************/ 25 26#include "../wifi.h" 27#include "../pci.h" 28#include "../base.h" 29#include "../stats.h" 30#include "reg.h" 31#include "def.h" 32#include "phy.h" 33#include "trx.h" 34#include "led.h" 35#include "dm.h" 36#include "phy.h" 37 38static u8 _rtl88ee_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue) 39{ 40 __le16 fc = rtl_get_fc(skb); 41 42 if (unlikely(ieee80211_is_beacon(fc))) 43 return QSLT_BEACON; 44 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc)) 45 return QSLT_MGNT; 46 47 return skb->priority; 48} 49 50static void _rtl88ee_query_rxphystatus(struct ieee80211_hw *hw, 51 struct rtl_stats *pstatus, u8 *pdesc, 52 struct rx_fwinfo_88e *p_drvinfo, 53 bool bpacket_match_bssid, 54 bool bpacket_toself, bool packet_beacon) 55{ 56 struct rtl_priv *rtlpriv = rtl_priv(hw); 57 struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv); 58 struct phy_sts_cck_8192s_t *cck_buf; 59 struct phy_status_rpt *phystrpt = 60 (struct phy_status_rpt *)p_drvinfo; 61 struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw)); 62 char rx_pwr_all = 0, rx_pwr[4]; 63 u8 rf_rx_num = 0, evm, pwdb_all; 64 u8 i, max_spatial_stream; 65 u32 rssi, total_rssi = 0; 66 bool is_cck = pstatus->is_cck; 67 u8 lan_idx, vga_idx; 68 69 /* Record it for next packet processing */ 70 pstatus->packet_matchbssid = bpacket_match_bssid; 71 pstatus->packet_toself = bpacket_toself; 72 pstatus->packet_beacon = packet_beacon; 73 pstatus->rx_mimo_signalquality[0] = -1; 74 pstatus->rx_mimo_signalquality[1] = -1; 75 76 if (is_cck) { 77 u8 cck_highpwr; 78 u8 cck_agc_rpt; 79 /* CCK Driver info Structure is not the same as OFDM packet. */ 80 cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo; 81 cck_agc_rpt = cck_buf->cck_agc_rpt; 82 83 /* (1)Hardware does not provide RSSI for CCK 84 * (2)PWDB, Average PWDB cacluated by 85 * hardware (for rate adaptive) 86 */ 87 if (ppsc->rfpwr_state == ERFON) 88 cck_highpwr = 89 (u8)rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, 90 BIT(9)); 91 else 92 cck_highpwr = false; 93 94 lan_idx = ((cck_agc_rpt & 0xE0) >> 5); 95 vga_idx = (cck_agc_rpt & 0x1f); 96 switch (lan_idx) { 97 case 7: 98 if (vga_idx <= 27) 99 /*VGA_idx = 27~2*/ 100 rx_pwr_all = -100 + 2*(27-vga_idx); 101 else 102 rx_pwr_all = -100; 103 break; 104 case 6: 105 /*VGA_idx = 2~0*/ 106 rx_pwr_all = -48 + 2*(2-vga_idx); 107 break; 108 case 5: 109 /*VGA_idx = 7~5*/ 110 rx_pwr_all = -42 + 2*(7-vga_idx); 111 break; 112 case 4: 113 /*VGA_idx = 7~4*/ 114 rx_pwr_all = -36 + 2*(7-vga_idx); 115 break; 116 case 3: 117 /*VGA_idx = 7~0*/ 118 rx_pwr_all = -24 + 2*(7-vga_idx); 119 break; 120 case 2: 121 if (cck_highpwr) 122 /*VGA_idx = 5~0*/ 123 rx_pwr_all = -12 + 2*(5-vga_idx); 124 else 125 rx_pwr_all = -6 + 2*(5-vga_idx); 126 break; 127 case 1: 128 rx_pwr_all = 8-2*vga_idx; 129 break; 130 case 0: 131 rx_pwr_all = 14-2*vga_idx; 132 break; 133 default: 134 break; 135 } 136 rx_pwr_all += 6; 137 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all); 138 /* CCK gain is smaller than OFDM/MCS gain, */ 139 /* so we add gain diff by experiences, the val is 6 */ 140 pwdb_all += 6; 141 if (pwdb_all > 100) 142 pwdb_all = 100; 143 /* modify the offset to make the same 144 * gain index with OFDM. 145 */ 146 if (pwdb_all > 34 && pwdb_all <= 42) 147 pwdb_all -= 2; 148 else if (pwdb_all > 26 && pwdb_all <= 34) 149 pwdb_all -= 6; 150 else if (pwdb_all > 14 && pwdb_all <= 26) 151 pwdb_all -= 8; 152 else if (pwdb_all > 4 && pwdb_all <= 14) 153 pwdb_all -= 4; 154 if (!cck_highpwr) { 155 if (pwdb_all >= 80) 156 pwdb_all = ((pwdb_all-80)<<1) + 157 ((pwdb_all-80)>>1) + 80; 158 else if ((pwdb_all <= 78) && (pwdb_all >= 20)) 159 pwdb_all += 3; 160 if (pwdb_all > 100) 161 pwdb_all = 100; 162 } 163 164 pstatus->rx_pwdb_all = pwdb_all; 165 pstatus->recvsignalpower = rx_pwr_all; 166 167 /* (3) Get Signal Quality (EVM) */ 168 if (bpacket_match_bssid) { 169 u8 sq; 170 171 if (pstatus->rx_pwdb_all > 40) 172 sq = 100; 173 else { 174 sq = cck_buf->sq_rpt; 175 if (sq > 64) 176 sq = 0; 177 else if (sq < 20) 178 sq = 100; 179 else 180 sq = ((64 - sq) * 100) / 44; 181 } 182 183 pstatus->signalquality = sq; 184 pstatus->rx_mimo_signalquality[0] = sq; 185 pstatus->rx_mimo_signalquality[1] = -1; 186 } 187 } else { 188 rtlpriv->dm.rfpath_rxenable[0] = 189 rtlpriv->dm.rfpath_rxenable[1] = true; 190 191 /* (1)Get RSSI for HT rate */ 192 for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) { 193 /* we will judge RF RX path now. */ 194 if (rtlpriv->dm.rfpath_rxenable[i]) 195 rf_rx_num++; 196 197 rx_pwr[i] = ((p_drvinfo->gain_trsw[i] & 198 0x3f) * 2) - 110; 199 200 /* Translate DBM to percentage. */ 201 rssi = rtl_query_rxpwrpercentage(rx_pwr[i]); 202 total_rssi += rssi; 203 204 /* Get Rx snr value in DB */ 205 rtlpriv->stats.rx_snr_db[i] = 206 (long)(p_drvinfo->rxsnr[i] / 2); 207 208 /* Record Signal Strength for next packet */ 209 if (bpacket_match_bssid) 210 pstatus->rx_mimo_signalstrength[i] = (u8)rssi; 211 } 212 213 /* (2)PWDB, Average PWDB cacluated by 214 * hardware (for rate adaptive) 215 */ 216 rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110; 217 218 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all); 219 pstatus->rx_pwdb_all = pwdb_all; 220 pstatus->rxpower = rx_pwr_all; 221 pstatus->recvsignalpower = rx_pwr_all; 222 223 /* (3)EVM of HT rate */ 224 if (pstatus->is_ht && pstatus->rate >= DESC92C_RATEMCS8 && 225 pstatus->rate <= DESC92C_RATEMCS15) 226 max_spatial_stream = 2; 227 else 228 max_spatial_stream = 1; 229 230 for (i = 0; i < max_spatial_stream; i++) { 231 evm = rtl_evm_db_to_percentage(p_drvinfo->rxevm[i]); 232 233 if (bpacket_match_bssid) { 234 /* Fill value in RFD, Get the first 235 * spatial stream onlyi 236 */ 237 if (i == 0) 238 pstatus->signalquality = 239 (u8)(evm & 0xff); 240 pstatus->rx_mimo_signalquality[i] = 241 (u8)(evm & 0xff); 242 } 243 } 244 } 245 246 /* UI BSS List signal strength(in percentage), 247 * make it good looking, from 0~100. 248 */ 249 if (is_cck) 250 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw, 251 pwdb_all)); 252 else if (rf_rx_num != 0) 253 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw, 254 total_rssi /= rf_rx_num)); 255 /*HW antenna diversity*/ 256 rtldm->fat_table.antsel_rx_keep_0 = phystrpt->ant_sel; 257 rtldm->fat_table.antsel_rx_keep_1 = phystrpt->ant_sel_b; 258 rtldm->fat_table.antsel_rx_keep_2 = phystrpt->antsel_rx_keep_2; 259} 260 261static void _rtl88ee_smart_antenna(struct ieee80211_hw *hw, 262 struct rtl_stats *pstatus) 263{ 264 struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw)); 265 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); 266 u8 antsel_tr_mux; 267 struct fast_ant_training *pfat_table = &rtldm->fat_table; 268 269 if (rtlefuse->antenna_div_type == CG_TRX_SMART_ANTDIV) { 270 if (pfat_table->fat_state == FAT_TRAINING_STATE) { 271 if (pstatus->packet_toself) { 272 antsel_tr_mux = 273 (pfat_table->antsel_rx_keep_2 << 2) | 274 (pfat_table->antsel_rx_keep_1 << 1) | 275 pfat_table->antsel_rx_keep_0; 276 pfat_table->ant_sum[antsel_tr_mux] += 277 pstatus->rx_pwdb_all; 278 pfat_table->ant_cnt[antsel_tr_mux]++; 279 } 280 } 281 } else if ((rtlefuse->antenna_div_type == CG_TRX_HW_ANTDIV) || 282 (rtlefuse->antenna_div_type == CGCS_RX_HW_ANTDIV)) { 283 if (pstatus->packet_toself || pstatus->packet_matchbssid) { 284 antsel_tr_mux = (pfat_table->antsel_rx_keep_2 << 2) | 285 (pfat_table->antsel_rx_keep_1 << 1) | 286 pfat_table->antsel_rx_keep_0; 287 rtl88e_dm_ant_sel_statistics(hw, antsel_tr_mux, 0, 288 pstatus->rx_pwdb_all); 289 } 290 291 } 292} 293 294static void _rtl88ee_translate_rx_signal_stuff(struct ieee80211_hw *hw, 295 struct sk_buff *skb, 296 struct rtl_stats *pstatus, 297 u8 *pdesc, 298 struct rx_fwinfo_88e *p_drvinfo) 299{ 300 struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); 301 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); 302 struct ieee80211_hdr *hdr; 303 u8 *tmp_buf; 304 u8 *praddr; 305 u8 *psaddr; 306 __le16 fc; 307 bool packet_matchbssid, packet_toself, packet_beacon; 308 309 tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift; 310 311 hdr = (struct ieee80211_hdr *)tmp_buf; 312 fc = hdr->frame_control; 313 praddr = hdr->addr1; 314 psaddr = ieee80211_get_SA(hdr); 315 memcpy(pstatus->psaddr, psaddr, ETH_ALEN); 316 317 packet_matchbssid = ((!ieee80211_is_ctl(fc)) && 318 (ether_addr_equal(mac->bssid, ieee80211_has_tods(fc) ? 319 hdr->addr1 : ieee80211_has_fromds(fc) ? 320 hdr->addr2 : hdr->addr3)) && 321 (!pstatus->hwerror) && 322 (!pstatus->crc) && (!pstatus->icv)); 323 324 packet_toself = packet_matchbssid && 325 (ether_addr_equal(praddr, rtlefuse->dev_addr)); 326 327 if (ieee80211_is_beacon(hdr->frame_control)) 328 packet_beacon = true; 329 else 330 packet_beacon = false; 331 332 _rtl88ee_query_rxphystatus(hw, pstatus, pdesc, p_drvinfo, 333 packet_matchbssid, packet_toself, 334 packet_beacon); 335 _rtl88ee_smart_antenna(hw, pstatus); 336 rtl_process_phyinfo(hw, tmp_buf, pstatus); 337} 338 339static void _rtl88ee_insert_emcontent(struct rtl_tcb_desc *ptcb_desc, 340 u8 *virtualaddress) 341{ 342 u32 dwtmp = 0; 343 memset(virtualaddress, 0, 8); 344 345 SET_EARLYMODE_PKTNUM(virtualaddress, ptcb_desc->empkt_num); 346 if (ptcb_desc->empkt_num == 1) { 347 dwtmp = ptcb_desc->empkt_len[0]; 348 } else { 349 dwtmp = ptcb_desc->empkt_len[0]; 350 dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4; 351 dwtmp += ptcb_desc->empkt_len[1]; 352 } 353 SET_EARLYMODE_LEN0(virtualaddress, dwtmp); 354 355 if (ptcb_desc->empkt_num <= 3) { 356 dwtmp = ptcb_desc->empkt_len[2]; 357 } else { 358 dwtmp = ptcb_desc->empkt_len[2]; 359 dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4; 360 dwtmp += ptcb_desc->empkt_len[3]; 361 } 362 SET_EARLYMODE_LEN1(virtualaddress, dwtmp); 363 if (ptcb_desc->empkt_num <= 5) { 364 dwtmp = ptcb_desc->empkt_len[4]; 365 } else { 366 dwtmp = ptcb_desc->empkt_len[4]; 367 dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4; 368 dwtmp += ptcb_desc->empkt_len[5]; 369 } 370 SET_EARLYMODE_LEN2_1(virtualaddress, dwtmp & 0xF); 371 SET_EARLYMODE_LEN2_2(virtualaddress, dwtmp >> 4); 372 if (ptcb_desc->empkt_num <= 7) { 373 dwtmp = ptcb_desc->empkt_len[6]; 374 } else { 375 dwtmp = ptcb_desc->empkt_len[6]; 376 dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4; 377 dwtmp += ptcb_desc->empkt_len[7]; 378 } 379 SET_EARLYMODE_LEN3(virtualaddress, dwtmp); 380 if (ptcb_desc->empkt_num <= 9) { 381 dwtmp = ptcb_desc->empkt_len[8]; 382 } else { 383 dwtmp = ptcb_desc->empkt_len[8]; 384 dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4; 385 dwtmp += ptcb_desc->empkt_len[9]; 386 } 387 SET_EARLYMODE_LEN4(virtualaddress, dwtmp); 388} 389 390bool rtl88ee_rx_query_desc(struct ieee80211_hw *hw, 391 struct rtl_stats *status, 392 struct ieee80211_rx_status *rx_status, 393 u8 *pdesc, struct sk_buff *skb) 394{ 395 struct rtl_priv *rtlpriv = rtl_priv(hw); 396 struct rx_fwinfo_88e *p_drvinfo; 397 struct ieee80211_hdr *hdr; 398 399 u32 phystatus = GET_RX_DESC_PHYST(pdesc); 400 status->packet_report_type = (u8)GET_RX_STATUS_DESC_RPT_SEL(pdesc); 401 if (status->packet_report_type == TX_REPORT2) 402 status->length = (u16)GET_RX_RPT2_DESC_PKT_LEN(pdesc); 403 else 404 status->length = (u16)GET_RX_DESC_PKT_LEN(pdesc); 405 status->rx_drvinfo_size = (u8)GET_RX_DESC_DRV_INFO_SIZE(pdesc) * 406 RX_DRV_INFO_SIZE_UNIT; 407 status->rx_bufshift = (u8)(GET_RX_DESC_SHIFT(pdesc) & 0x03); 408 status->icv = (u16)GET_RX_DESC_ICV(pdesc); 409 status->crc = (u16)GET_RX_DESC_CRC32(pdesc); 410 status->hwerror = (status->crc | status->icv); 411 status->decrypted = !GET_RX_DESC_SWDEC(pdesc); 412 status->rate = (u8)GET_RX_DESC_RXMCS(pdesc); 413 status->shortpreamble = (u16)GET_RX_DESC_SPLCP(pdesc); 414 status->isampdu = (bool) (GET_RX_DESC_PAGGR(pdesc) == 1); 415 status->isfirst_ampdu = (bool)((GET_RX_DESC_PAGGR(pdesc) == 1) && 416 (GET_RX_DESC_FAGGR(pdesc) == 1)); 417 if (status->packet_report_type == NORMAL_RX) 418 status->timestamp_low = GET_RX_DESC_TSFL(pdesc); 419 status->rx_is40Mhzpacket = (bool) GET_RX_DESC_BW(pdesc); 420 status->is_ht = (bool)GET_RX_DESC_RXHT(pdesc); 421 422 status->is_cck = RTL8188_RX_HAL_IS_CCK_RATE(status->rate); 423 424 status->macid = GET_RX_DESC_MACID(pdesc); 425 if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc)) 426 status->wake_match = BIT(2); 427 else if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc)) 428 status->wake_match = BIT(1); 429 else if (GET_RX_STATUS_DESC_UNICAST_MATCH(pdesc)) 430 status->wake_match = BIT(0); 431 else 432 status->wake_match = 0; 433 if (status->wake_match) 434 RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD, 435 "GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n", 436 status->wake_match); 437 rx_status->freq = hw->conf.chandef.chan->center_freq; 438 rx_status->band = hw->conf.chandef.chan->band; 439 440 hdr = (struct ieee80211_hdr *)(skb->data + status->rx_drvinfo_size 441 + status->rx_bufshift); 442 443 if (status->crc) 444 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC; 445 446 if (status->rx_is40Mhzpacket) 447 rx_status->flag |= RX_FLAG_40MHZ; 448 449 if (status->is_ht) 450 rx_status->flag |= RX_FLAG_HT; 451 452 rx_status->flag |= RX_FLAG_MACTIME_START; 453 454 /* hw will set status->decrypted true, if it finds the 455 * frame is open data frame or mgmt frame. 456 * So hw will not decryption robust managment frame 457 * for IEEE80211w but still set status->decrypted 458 * true, so here we should set it back to undecrypted 459 * for IEEE80211w frame, and mac80211 sw will help 460 * to decrypt it 461 */ 462 if (status->decrypted) { 463 if ((!_ieee80211_is_robust_mgmt_frame(hdr)) && 464 (ieee80211_has_protected(hdr->frame_control))) 465 rx_status->flag |= RX_FLAG_DECRYPTED; 466 else 467 rx_status->flag &= ~RX_FLAG_DECRYPTED; 468 } 469 470 /* rate_idx: index of data rate into band's 471 * supported rates or MCS index if HT rates 472 * are use (RX_FLAG_HT) 473 * Notice: this is diff with windows define 474 */ 475 rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht, 476 false, status->rate); 477 478 rx_status->mactime = status->timestamp_low; 479 if (phystatus == true) { 480 p_drvinfo = (struct rx_fwinfo_88e *)(skb->data + 481 status->rx_bufshift); 482 483 _rtl88ee_translate_rx_signal_stuff(hw, 484 skb, status, pdesc, 485 p_drvinfo); 486 } 487 rx_status->signal = status->recvsignalpower + 10; 488 if (status->packet_report_type == TX_REPORT2) { 489 status->macid_valid_entry[0] = 490 GET_RX_RPT2_DESC_MACID_VALID_1(pdesc); 491 status->macid_valid_entry[1] = 492 GET_RX_RPT2_DESC_MACID_VALID_2(pdesc); 493 } 494 return true; 495} 496 497void rtl88ee_tx_fill_desc(struct ieee80211_hw *hw, 498 struct ieee80211_hdr *hdr, u8 *pdesc_tx, 499 u8 *txbd, struct ieee80211_tx_info *info, 500 struct ieee80211_sta *sta, 501 struct sk_buff *skb, 502 u8 hw_queue, struct rtl_tcb_desc *ptcb_desc) 503 504{ 505 struct rtl_priv *rtlpriv = rtl_priv(hw); 506 struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); 507 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 508 struct rtl_hal *rtlhal = rtl_hal(rtlpriv); 509 u8 *pdesc = (u8 *)pdesc_tx; 510 u16 seq_number; 511 __le16 fc = hdr->frame_control; 512 unsigned int buf_len = 0; 513 unsigned int skb_len = skb->len; 514 u8 fw_qsel = _rtl88ee_map_hwqueue_to_fwqueue(skb, hw_queue); 515 bool firstseg = ((hdr->seq_ctrl & 516 cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0); 517 bool lastseg = ((hdr->frame_control & 518 cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0); 519 dma_addr_t mapping; 520 u8 bw_40 = 0; 521 u8 short_gi = 0; 522 523 if (mac->opmode == NL80211_IFTYPE_STATION) { 524 bw_40 = mac->bw_40; 525 } else if (mac->opmode == NL80211_IFTYPE_AP || 526 mac->opmode == NL80211_IFTYPE_ADHOC) { 527 if (sta) 528 bw_40 = sta->ht_cap.cap & 529 IEEE80211_HT_CAP_SUP_WIDTH_20_40; 530 } 531 seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4; 532 rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc); 533 /* reserve 8 byte for AMPDU early mode */ 534 if (rtlhal->earlymode_enable) { 535 skb_push(skb, EM_HDR_LEN); 536 memset(skb->data, 0, EM_HDR_LEN); 537 } 538 buf_len = skb->len; 539 mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len, 540 PCI_DMA_TODEVICE); 541 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) { 542 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, 543 "DMA mapping error"); 544 return; 545 } 546 CLEAR_PCI_TX_DESC_CONTENT(pdesc, sizeof(struct tx_desc_88e)); 547 if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) { 548 firstseg = true; 549 lastseg = true; 550 } 551 if (firstseg) { 552 if (rtlhal->earlymode_enable) { 553 SET_TX_DESC_PKT_OFFSET(pdesc, 1); 554 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN + 555 EM_HDR_LEN); 556 if (ptcb_desc->empkt_num) { 557 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, 558 "Insert 8 byte.pTcb->EMPktNum:%d\n", 559 ptcb_desc->empkt_num); 560 _rtl88ee_insert_emcontent(ptcb_desc, 561 (u8 *)(skb->data)); 562 } 563 } else { 564 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN); 565 } 566 567 ptcb_desc->use_driver_rate = true; 568 SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate); 569 if (ptcb_desc->hw_rate > DESC92C_RATEMCS0) 570 short_gi = (ptcb_desc->use_shortgi) ? 1 : 0; 571 else 572 short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0; 573 574 SET_TX_DESC_DATA_SHORTGI(pdesc, short_gi); 575 576 if (info->flags & IEEE80211_TX_CTL_AMPDU) { 577 SET_TX_DESC_AGG_ENABLE(pdesc, 1); 578 SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x14); 579 } 580 SET_TX_DESC_SEQ(pdesc, seq_number); 581 SET_TX_DESC_RTS_ENABLE(pdesc, ((ptcb_desc->rts_enable && 582 !ptcb_desc->cts_enable) ? 1 : 0)); 583 SET_TX_DESC_HW_RTS_ENABLE(pdesc, 0); 584 SET_TX_DESC_CTS2SELF(pdesc, ((ptcb_desc->cts_enable) ? 1 : 0)); 585 SET_TX_DESC_RTS_STBC(pdesc, ((ptcb_desc->rts_stbc) ? 1 : 0)); 586 587 SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate); 588 SET_TX_DESC_RTS_BW(pdesc, 0); 589 SET_TX_DESC_RTS_SC(pdesc, ptcb_desc->rts_sc); 590 SET_TX_DESC_RTS_SHORT(pdesc, 591 ((ptcb_desc->rts_rate <= DESC92C_RATE54M) ? 592 (ptcb_desc->rts_use_shortpreamble ? 1 : 0) : 593 (ptcb_desc->rts_use_shortgi ? 1 : 0))); 594 595 if (ptcb_desc->tx_enable_sw_calc_duration) 596 SET_TX_DESC_NAV_USE_HDR(pdesc, 1); 597 598 if (bw_40) { 599 if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) { 600 SET_TX_DESC_DATA_BW(pdesc, 1); 601 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 3); 602 } else { 603 SET_TX_DESC_DATA_BW(pdesc, 0); 604 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 605 mac->cur_40_prime_sc); 606 } 607 } else { 608 SET_TX_DESC_DATA_BW(pdesc, 0); 609 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0); 610 } 611 612 SET_TX_DESC_LINIP(pdesc, 0); 613 SET_TX_DESC_PKT_SIZE(pdesc, (u16)skb_len); 614 if (sta) { 615 u8 ampdu_density = sta->ht_cap.ampdu_density; 616 SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density); 617 } 618 if (info->control.hw_key) { 619 struct ieee80211_key_conf *keyconf; 620 621 keyconf = info->control.hw_key; 622 switch (keyconf->cipher) { 623 case WLAN_CIPHER_SUITE_WEP40: 624 case WLAN_CIPHER_SUITE_WEP104: 625 case WLAN_CIPHER_SUITE_TKIP: 626 SET_TX_DESC_SEC_TYPE(pdesc, 0x1); 627 break; 628 case WLAN_CIPHER_SUITE_CCMP: 629 SET_TX_DESC_SEC_TYPE(pdesc, 0x3); 630 break; 631 default: 632 SET_TX_DESC_SEC_TYPE(pdesc, 0x0); 633 break; 634 635 } 636 } 637 638 SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel); 639 SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F); 640 SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF); 641 SET_TX_DESC_DISABLE_FB(pdesc, ptcb_desc->disable_ratefallback ? 642 1 : 0); 643 SET_TX_DESC_USE_RATE(pdesc, ptcb_desc->use_driver_rate ? 1 : 0); 644 645 /*SET_TX_DESC_PWR_STATUS(pdesc, pwr_status);*/ 646 /* Set TxRate and RTSRate in TxDesc */ 647 /* This prevent Tx initial rate of new-coming packets */ 648 /* from being overwritten by retried packet rate.*/ 649 if (!ptcb_desc->use_driver_rate) { 650 /*SET_TX_DESC_RTS_RATE(pdesc, 0x08); */ 651 /* SET_TX_DESC_TX_RATE(pdesc, 0x0b); */ 652 } 653 if (ieee80211_is_data_qos(fc)) { 654 if (mac->rdg_en) { 655 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, 656 "Enable RDG function.\n"); 657 SET_TX_DESC_RDG_ENABLE(pdesc, 1); 658 SET_TX_DESC_HTC(pdesc, 1); 659 } 660 } 661 } 662 663 SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0)); 664 SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0)); 665 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)buf_len); 666 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping); 667 if (rtlpriv->dm.useramask) { 668 SET_TX_DESC_RATE_ID(pdesc, ptcb_desc->ratr_index); 669 SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id); 670 } else { 671 SET_TX_DESC_RATE_ID(pdesc, 0xC + ptcb_desc->ratr_index); 672 SET_TX_DESC_MACID(pdesc, ptcb_desc->ratr_index); 673 } 674 if (ieee80211_is_data_qos(fc)) 675 SET_TX_DESC_QOS(pdesc, 1); 676 677 if (!ieee80211_is_data_qos(fc)) 678 SET_TX_DESC_HWSEQ_EN(pdesc, 1); 679 SET_TX_DESC_MORE_FRAG(pdesc, (lastseg ? 0 : 1)); 680 if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) || 681 is_broadcast_ether_addr(ieee80211_get_DA(hdr))) { 682 SET_TX_DESC_BMC(pdesc, 1); 683 } 684 685 rtl88e_dm_set_tx_ant_by_tx_info(hw, pdesc, ptcb_desc->mac_id); 686 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n"); 687} 688 689void rtl88ee_tx_fill_cmddesc(struct ieee80211_hw *hw, 690 u8 *pdesc, bool firstseg, 691 bool lastseg, struct sk_buff *skb) 692{ 693 struct rtl_priv *rtlpriv = rtl_priv(hw); 694 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 695 u8 fw_queue = QSLT_BEACON; 696 697 dma_addr_t mapping = pci_map_single(rtlpci->pdev, 698 skb->data, skb->len, 699 PCI_DMA_TODEVICE); 700 701 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data); 702 __le16 fc = hdr->frame_control; 703 704 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) { 705 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, 706 "DMA mapping error"); 707 return; 708 } 709 CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE); 710 711 if (firstseg) 712 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN); 713 714 SET_TX_DESC_TX_RATE(pdesc, DESC92C_RATE1M); 715 716 SET_TX_DESC_SEQ(pdesc, 0); 717 718 SET_TX_DESC_LINIP(pdesc, 0); 719 720 SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue); 721 722 SET_TX_DESC_FIRST_SEG(pdesc, 1); 723 SET_TX_DESC_LAST_SEG(pdesc, 1); 724 725 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len)); 726 727 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping); 728 729 SET_TX_DESC_RATE_ID(pdesc, 7); 730 SET_TX_DESC_MACID(pdesc, 0); 731 732 SET_TX_DESC_OWN(pdesc, 1); 733 734 SET_TX_DESC_PKT_SIZE(pdesc, (u16)(skb->len)); 735 736 SET_TX_DESC_FIRST_SEG(pdesc, 1); 737 SET_TX_DESC_LAST_SEG(pdesc, 1); 738 739 SET_TX_DESC_OFFSET(pdesc, 0x20); 740 741 SET_TX_DESC_USE_RATE(pdesc, 1); 742 743 if (!ieee80211_is_data_qos(fc)) 744 SET_TX_DESC_HWSEQ_EN(pdesc, 1); 745 746 RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD, 747 "H2C Tx Cmd Content\n", 748 pdesc, TX_DESC_SIZE); 749} 750 751void rtl88ee_set_desc(struct ieee80211_hw *hw, u8 *pdesc, 752 bool istx, u8 desc_name, u8 *val) 753{ 754 if (istx == true) { 755 switch (desc_name) { 756 case HW_DESC_OWN: 757 SET_TX_DESC_OWN(pdesc, 1); 758 break; 759 case HW_DESC_TX_NEXTDESC_ADDR: 760 SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *)val); 761 break; 762 default: 763 RT_ASSERT(false, "ERR txdesc :%d not process\n", 764 desc_name); 765 break; 766 } 767 } else { 768 switch (desc_name) { 769 case HW_DESC_RXOWN: 770 SET_RX_DESC_OWN(pdesc, 1); 771 break; 772 case HW_DESC_RXBUFF_ADDR: 773 SET_RX_DESC_BUFF_ADDR(pdesc, *(u32 *)val); 774 break; 775 case HW_DESC_RXPKT_LEN: 776 SET_RX_DESC_PKT_LEN(pdesc, *(u32 *)val); 777 break; 778 case HW_DESC_RXERO: 779 SET_RX_DESC_EOR(pdesc, 1); 780 break; 781 default: 782 RT_ASSERT(false, "ERR rxdesc :%d not process\n", 783 desc_name); 784 break; 785 } 786 } 787} 788 789u32 rtl88ee_get_desc(u8 *pdesc, bool istx, u8 desc_name) 790{ 791 u32 ret = 0; 792 793 if (istx == true) { 794 switch (desc_name) { 795 case HW_DESC_OWN: 796 ret = GET_TX_DESC_OWN(pdesc); 797 break; 798 case HW_DESC_TXBUFF_ADDR: 799 ret = GET_TX_DESC_TX_BUFFER_ADDRESS(pdesc); 800 break; 801 default: 802 RT_ASSERT(false, "ERR txdesc :%d not process\n", 803 desc_name); 804 break; 805 } 806 } else { 807 switch (desc_name) { 808 case HW_DESC_OWN: 809 ret = GET_RX_DESC_OWN(pdesc); 810 break; 811 case HW_DESC_RXPKT_LEN: 812 ret = GET_RX_DESC_PKT_LEN(pdesc); 813 break; 814 case HW_DESC_RXBUFF_ADDR: 815 ret = GET_RX_DESC_BUFF_ADDR(pdesc); 816 break; 817 default: 818 RT_ASSERT(false, "ERR rxdesc :%d not process\n", 819 desc_name); 820 break; 821 } 822 } 823 return ret; 824} 825 826bool rtl88ee_is_tx_desc_closed(struct ieee80211_hw *hw, u8 hw_queue, u16 index) 827{ 828 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 829 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue]; 830 u8 *entry = (u8 *)(&ring->desc[ring->idx]); 831 u8 own = (u8)rtl88ee_get_desc(entry, true, HW_DESC_OWN); 832 833 /*beacon packet will only use the first 834 *descriptor defautly,and the own may not 835 *be cleared by the hardware 836 */ 837 if (own) 838 return false; 839 return true; 840} 841 842void rtl88ee_tx_polling(struct ieee80211_hw *hw, u8 hw_queue) 843{ 844 struct rtl_priv *rtlpriv = rtl_priv(hw); 845 if (hw_queue == BEACON_QUEUE) { 846 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4)); 847 } else { 848 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, 849 BIT(0) << (hw_queue)); 850 } 851} 852 853u32 rtl88ee_rx_command_packet(struct ieee80211_hw *hw, 854 struct rtl_stats status, 855 struct sk_buff *skb) 856{ 857 return 0; 858} 859