1/* 2 * This file is part of wlcore 3 * 4 * Copyright (C) 2011 Texas Instruments Inc. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * version 2 as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but 11 * WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 * General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 18 * 02110-1301 USA 19 * 20 */ 21 22#ifndef __WLCORE_H__ 23#define __WLCORE_H__ 24 25#include <linux/platform_device.h> 26 27#include "wlcore_i.h" 28#include "event.h" 29#include "boot.h" 30 31/* The maximum number of Tx descriptors in all chip families */ 32#define WLCORE_MAX_TX_DESCRIPTORS 32 33 34/* 35 * We always allocate this number of mac addresses. If we don't 36 * have enough allocated addresses, the LAA bit is used 37 */ 38#define WLCORE_NUM_MAC_ADDRESSES 3 39 40/* wl12xx/wl18xx maximum transmission power (in dBm) */ 41#define WLCORE_MAX_TXPWR 25 42 43/* forward declaration */ 44struct wl1271_tx_hw_descr; 45enum wl_rx_buf_align; 46struct wl1271_rx_descriptor; 47 48struct wlcore_ops { 49 int (*setup)(struct wl1271 *wl); 50 int (*identify_chip)(struct wl1271 *wl); 51 int (*identify_fw)(struct wl1271 *wl); 52 int (*boot)(struct wl1271 *wl); 53 int (*plt_init)(struct wl1271 *wl); 54 int (*trigger_cmd)(struct wl1271 *wl, int cmd_box_addr, 55 void *buf, size_t len); 56 int (*ack_event)(struct wl1271 *wl); 57 int (*wait_for_event)(struct wl1271 *wl, enum wlcore_wait_event event, 58 bool *timeout); 59 int (*process_mailbox_events)(struct wl1271 *wl); 60 u32 (*calc_tx_blocks)(struct wl1271 *wl, u32 len, u32 spare_blks); 61 void (*set_tx_desc_blocks)(struct wl1271 *wl, 62 struct wl1271_tx_hw_descr *desc, 63 u32 blks, u32 spare_blks); 64 void (*set_tx_desc_data_len)(struct wl1271 *wl, 65 struct wl1271_tx_hw_descr *desc, 66 struct sk_buff *skb); 67 enum wl_rx_buf_align (*get_rx_buf_align)(struct wl1271 *wl, 68 u32 rx_desc); 69 int (*prepare_read)(struct wl1271 *wl, u32 rx_desc, u32 len); 70 u32 (*get_rx_packet_len)(struct wl1271 *wl, void *rx_data, 71 u32 data_len); 72 int (*tx_delayed_compl)(struct wl1271 *wl); 73 void (*tx_immediate_compl)(struct wl1271 *wl); 74 int (*hw_init)(struct wl1271 *wl); 75 int (*init_vif)(struct wl1271 *wl, struct wl12xx_vif *wlvif); 76 void (*convert_fw_status)(struct wl1271 *wl, void *raw_fw_status, 77 struct wl_fw_status *fw_status); 78 u32 (*sta_get_ap_rate_mask)(struct wl1271 *wl, 79 struct wl12xx_vif *wlvif); 80 int (*get_pg_ver)(struct wl1271 *wl, s8 *ver); 81 int (*get_mac)(struct wl1271 *wl); 82 void (*set_tx_desc_csum)(struct wl1271 *wl, 83 struct wl1271_tx_hw_descr *desc, 84 struct sk_buff *skb); 85 void (*set_rx_csum)(struct wl1271 *wl, 86 struct wl1271_rx_descriptor *desc, 87 struct sk_buff *skb); 88 u32 (*ap_get_mimo_wide_rate_mask)(struct wl1271 *wl, 89 struct wl12xx_vif *wlvif); 90 int (*debugfs_init)(struct wl1271 *wl, struct dentry *rootdir); 91 int (*handle_static_data)(struct wl1271 *wl, 92 struct wl1271_static_data *static_data); 93 int (*scan_start)(struct wl1271 *wl, struct wl12xx_vif *wlvif, 94 struct cfg80211_scan_request *req); 95 int (*scan_stop)(struct wl1271 *wl, struct wl12xx_vif *wlvif); 96 int (*sched_scan_start)(struct wl1271 *wl, struct wl12xx_vif *wlvif, 97 struct cfg80211_sched_scan_request *req, 98 struct ieee80211_scan_ies *ies); 99 void (*sched_scan_stop)(struct wl1271 *wl, struct wl12xx_vif *wlvif); 100 int (*get_spare_blocks)(struct wl1271 *wl, bool is_gem); 101 int (*set_key)(struct wl1271 *wl, enum set_key_cmd cmd, 102 struct ieee80211_vif *vif, 103 struct ieee80211_sta *sta, 104 struct ieee80211_key_conf *key_conf); 105 int (*channel_switch)(struct wl1271 *wl, 106 struct wl12xx_vif *wlvif, 107 struct ieee80211_channel_switch *ch_switch); 108 u32 (*pre_pkt_send)(struct wl1271 *wl, u32 buf_offset, u32 last_len); 109 void (*sta_rc_update)(struct wl1271 *wl, struct wl12xx_vif *wlvif); 110 int (*set_peer_cap)(struct wl1271 *wl, 111 struct ieee80211_sta_ht_cap *ht_cap, 112 bool allow_ht_operation, 113 u32 rate_set, u8 hlid); 114 u32 (*convert_hwaddr)(struct wl1271 *wl, u32 hwaddr); 115 bool (*lnk_high_prio)(struct wl1271 *wl, u8 hlid, 116 struct wl1271_link *lnk); 117 bool (*lnk_low_prio)(struct wl1271 *wl, u8 hlid, 118 struct wl1271_link *lnk); 119 int (*interrupt_notify)(struct wl1271 *wl, bool action); 120 int (*rx_ba_filter)(struct wl1271 *wl, bool action); 121 int (*ap_sleep)(struct wl1271 *wl); 122 int (*smart_config_start)(struct wl1271 *wl, u32 group_bitmap); 123 int (*smart_config_stop)(struct wl1271 *wl); 124 int (*smart_config_set_group_key)(struct wl1271 *wl, u16 group_id, 125 u8 key_len, u8 *key); 126 int (*set_cac)(struct wl1271 *wl, struct wl12xx_vif *wlvif, 127 bool start); 128 int (*dfs_master_restart)(struct wl1271 *wl, struct wl12xx_vif *wlvif); 129}; 130 131enum wlcore_partitions { 132 PART_DOWN, 133 PART_WORK, 134 PART_BOOT, 135 PART_DRPW, 136 PART_TOP_PRCM_ELP_SOC, 137 PART_PHY_INIT, 138 139 PART_TABLE_LEN, 140}; 141 142struct wlcore_partition { 143 u32 size; 144 u32 start; 145}; 146 147struct wlcore_partition_set { 148 struct wlcore_partition mem; 149 struct wlcore_partition reg; 150 struct wlcore_partition mem2; 151 struct wlcore_partition mem3; 152}; 153 154enum wlcore_registers { 155 /* register addresses, used with partition translation */ 156 REG_ECPU_CONTROL, 157 REG_INTERRUPT_NO_CLEAR, 158 REG_INTERRUPT_ACK, 159 REG_COMMAND_MAILBOX_PTR, 160 REG_EVENT_MAILBOX_PTR, 161 REG_INTERRUPT_TRIG, 162 REG_INTERRUPT_MASK, 163 REG_PC_ON_RECOVERY, 164 REG_CHIP_ID_B, 165 REG_CMD_MBOX_ADDRESS, 166 167 /* data access memory addresses, used with partition translation */ 168 REG_SLV_MEM_DATA, 169 REG_SLV_REG_DATA, 170 171 /* raw data access memory addresses */ 172 REG_RAW_FW_STATUS_ADDR, 173 174 REG_TABLE_LEN, 175}; 176 177struct wl1271_stats { 178 void *fw_stats; 179 unsigned long fw_stats_update; 180 size_t fw_stats_len; 181 182 unsigned int retry_count; 183 unsigned int excessive_retries; 184}; 185 186struct wl1271 { 187 bool initialized; 188 struct ieee80211_hw *hw; 189 bool mac80211_registered; 190 191 struct device *dev; 192 struct platform_device *pdev; 193 194 void *if_priv; 195 196 struct wl1271_if_operations *if_ops; 197 198 int irq; 199 200 int irq_flags; 201 202 spinlock_t wl_lock; 203 204 enum wlcore_state state; 205 enum wl12xx_fw_type fw_type; 206 bool plt; 207 enum plt_mode plt_mode; 208 u8 fem_manuf; 209 u8 last_vif_count; 210 struct mutex mutex; 211 212 unsigned long flags; 213 214 struct wlcore_partition_set curr_part; 215 216 struct wl1271_chip chip; 217 218 int cmd_box_addr; 219 220 u8 *fw; 221 size_t fw_len; 222 void *nvs; 223 size_t nvs_len; 224 225 s8 hw_pg_ver; 226 227 /* address read from the fuse ROM */ 228 u32 fuse_oui_addr; 229 u32 fuse_nic_addr; 230 231 /* we have up to 2 MAC addresses */ 232 struct mac_address addresses[WLCORE_NUM_MAC_ADDRESSES]; 233 int channel; 234 u8 system_hlid; 235 236 unsigned long links_map[BITS_TO_LONGS(WLCORE_MAX_LINKS)]; 237 unsigned long roles_map[BITS_TO_LONGS(WL12XX_MAX_ROLES)]; 238 unsigned long roc_map[BITS_TO_LONGS(WL12XX_MAX_ROLES)]; 239 unsigned long rate_policies_map[ 240 BITS_TO_LONGS(WL12XX_MAX_RATE_POLICIES)]; 241 unsigned long klv_templates_map[ 242 BITS_TO_LONGS(WLCORE_MAX_KLV_TEMPLATES)]; 243 244 u8 session_ids[WLCORE_MAX_LINKS]; 245 246 struct list_head wlvif_list; 247 248 u8 sta_count; 249 u8 ap_count; 250 251 struct wl1271_acx_mem_map *target_mem_map; 252 253 /* Accounting for allocated / available TX blocks on HW */ 254 u32 tx_blocks_freed; 255 u32 tx_blocks_available; 256 u32 tx_allocated_blocks; 257 u32 tx_results_count; 258 259 /* Accounting for allocated / available Tx packets in HW */ 260 u32 tx_pkts_freed[NUM_TX_QUEUES]; 261 u32 tx_allocated_pkts[NUM_TX_QUEUES]; 262 263 /* Transmitted TX packets counter for chipset interface */ 264 u32 tx_packets_count; 265 266 /* Time-offset between host and chipset clocks */ 267 s64 time_offset; 268 269 /* Frames scheduled for transmission, not handled yet */ 270 int tx_queue_count[NUM_TX_QUEUES]; 271 unsigned long queue_stop_reasons[ 272 NUM_TX_QUEUES * WLCORE_NUM_MAC_ADDRESSES]; 273 274 /* Frames received, not handled yet by mac80211 */ 275 struct sk_buff_head deferred_rx_queue; 276 277 /* Frames sent, not returned yet to mac80211 */ 278 struct sk_buff_head deferred_tx_queue; 279 280 struct work_struct tx_work; 281 struct workqueue_struct *freezable_wq; 282 283 /* Pending TX frames */ 284 unsigned long tx_frames_map[BITS_TO_LONGS(WLCORE_MAX_TX_DESCRIPTORS)]; 285 struct sk_buff *tx_frames[WLCORE_MAX_TX_DESCRIPTORS]; 286 int tx_frames_cnt; 287 288 /* FW Rx counter */ 289 u32 rx_counter; 290 291 /* Intermediate buffer, used for packet aggregation */ 292 u8 *aggr_buf; 293 u32 aggr_buf_size; 294 295 /* Reusable dummy packet template */ 296 struct sk_buff *dummy_packet; 297 298 /* Network stack work */ 299 struct work_struct netstack_work; 300 301 /* FW log buffer */ 302 u8 *fwlog; 303 304 /* Number of valid bytes in the FW log buffer */ 305 ssize_t fwlog_size; 306 307 /* FW log end marker */ 308 u32 fwlog_end; 309 310 /* FW memory block size */ 311 u32 fw_mem_block_size; 312 313 /* Sysfs FW log entry readers wait queue */ 314 wait_queue_head_t fwlog_waitq; 315 316 /* Hardware recovery work */ 317 struct work_struct recovery_work; 318 bool watchdog_recovery; 319 320 /* Reg domain last configuration */ 321 u32 reg_ch_conf_last[2]; 322 /* Reg domain pending configuration */ 323 u32 reg_ch_conf_pending[2]; 324 325 /* Pointer that holds DMA-friendly block for the mailbox */ 326 void *mbox; 327 328 /* The mbox event mask */ 329 u32 event_mask; 330 /* events to unmask only when ap interface is up */ 331 u32 ap_event_mask; 332 333 /* Mailbox pointers */ 334 u32 mbox_size; 335 u32 mbox_ptr[2]; 336 337 /* Are we currently scanning */ 338 struct wl12xx_vif *scan_wlvif; 339 struct wl1271_scan scan; 340 struct delayed_work scan_complete_work; 341 342 struct ieee80211_vif *roc_vif; 343 struct delayed_work roc_complete_work; 344 345 struct wl12xx_vif *sched_vif; 346 347 /* The current band */ 348 enum ieee80211_band band; 349 350 struct completion *elp_compl; 351 struct delayed_work elp_work; 352 353 /* in dBm */ 354 int power_level; 355 356 struct wl1271_stats stats; 357 358 __le32 *buffer_32; 359 u32 buffer_cmd; 360 u32 buffer_busyword[WL1271_BUSY_WORD_CNT]; 361 362 void *raw_fw_status; 363 struct wl_fw_status *fw_status; 364 struct wl1271_tx_hw_res_if *tx_res_if; 365 366 /* Current chipset configuration */ 367 struct wlcore_conf conf; 368 369 bool sg_enabled; 370 371 bool enable_11a; 372 373 int recovery_count; 374 375 /* Most recently reported noise in dBm */ 376 s8 noise; 377 378 /* bands supported by this instance of wl12xx */ 379 struct ieee80211_supported_band bands[WLCORE_NUM_BANDS]; 380 381 /* 382 * wowlan trigger was configured during suspend. 383 * (currently, only "ANY" trigger is supported) 384 */ 385 bool wow_enabled; 386 bool irq_wake_enabled; 387 388 /* 389 * AP-mode - links indexed by HLID. The global and broadcast links 390 * are always active. 391 */ 392 struct wl1271_link links[WLCORE_MAX_LINKS]; 393 394 /* number of currently active links */ 395 int active_link_count; 396 397 /* Fast/slow links bitmap according to FW */ 398 unsigned long fw_fast_lnk_map; 399 400 /* AP-mode - a bitmap of links currently in PS mode according to FW */ 401 unsigned long ap_fw_ps_map; 402 403 /* AP-mode - a bitmap of links currently in PS mode in mac80211 */ 404 unsigned long ap_ps_map; 405 406 /* Quirks of specific hardware revisions */ 407 unsigned int quirks; 408 409 /* number of currently active RX BA sessions */ 410 int ba_rx_session_count; 411 412 /* Maximum number of supported RX BA sessions */ 413 int ba_rx_session_count_max; 414 415 /* AP-mode - number of currently connected stations */ 416 int active_sta_count; 417 418 /* Flag determining whether AP should broadcast OFDM-only rates */ 419 bool ofdm_only_ap; 420 421 /* last wlvif we transmitted from */ 422 struct wl12xx_vif *last_wlvif; 423 424 /* work to fire when Tx is stuck */ 425 struct delayed_work tx_watchdog_work; 426 427 struct wlcore_ops *ops; 428 /* pointer to the lower driver partition table */ 429 const struct wlcore_partition_set *ptable; 430 /* pointer to the lower driver register table */ 431 const int *rtable; 432 /* name of the firmwares to load - for PLT, single role, multi-role */ 433 const char *plt_fw_name; 434 const char *sr_fw_name; 435 const char *mr_fw_name; 436 437 u8 scan_templ_id_2_4; 438 u8 scan_templ_id_5; 439 u8 sched_scan_templ_id_2_4; 440 u8 sched_scan_templ_id_5; 441 u8 max_channels_5; 442 443 /* per-chip-family private structure */ 444 void *priv; 445 446 /* number of TX descriptors the HW supports. */ 447 u32 num_tx_desc; 448 /* number of RX descriptors the HW supports. */ 449 u32 num_rx_desc; 450 /* number of links the HW supports */ 451 u8 num_links; 452 /* max stations a single AP can support */ 453 u8 max_ap_stations; 454 455 /* translate HW Tx rates to standard rate-indices */ 456 const u8 **band_rate_to_idx; 457 458 /* size of table for HW rates that can be received from chip */ 459 u8 hw_tx_rate_tbl_size; 460 461 /* this HW rate and below are considered HT rates for this chip */ 462 u8 hw_min_ht_rate; 463 464 /* HW HT (11n) capabilities */ 465 struct ieee80211_sta_ht_cap ht_cap[WLCORE_NUM_BANDS]; 466 467 /* the current dfs region */ 468 enum nl80211_dfs_regions dfs_region; 469 470 /* size of the private FW status data */ 471 size_t fw_status_len; 472 size_t fw_status_priv_len; 473 474 /* RX Data filter rule state - enabled/disabled */ 475 unsigned long rx_filter_enabled[BITS_TO_LONGS(WL1271_MAX_RX_FILTERS)]; 476 477 /* size of the private static data */ 478 size_t static_data_priv_len; 479 480 /* the current channel type */ 481 enum nl80211_channel_type channel_type; 482 483 /* mutex for protecting the tx_flush function */ 484 struct mutex flush_mutex; 485 486 /* sleep auth value currently configured to FW */ 487 int sleep_auth; 488 489 /* the number of allocated MAC addresses in this chip */ 490 int num_mac_addr; 491 492 /* minimum FW version required for the driver to work in single-role */ 493 unsigned int min_sr_fw_ver[NUM_FW_VER]; 494 495 /* minimum FW version required for the driver to work in multi-role */ 496 unsigned int min_mr_fw_ver[NUM_FW_VER]; 497 498 struct completion nvs_loading_complete; 499 500 /* interface combinations supported by the hw */ 501 const struct ieee80211_iface_combination *iface_combinations; 502 u8 n_iface_combinations; 503}; 504 505int wlcore_probe(struct wl1271 *wl, struct platform_device *pdev); 506int wlcore_remove(struct platform_device *pdev); 507struct ieee80211_hw *wlcore_alloc_hw(size_t priv_size, u32 aggr_buf_size, 508 u32 mbox_size); 509int wlcore_free_hw(struct wl1271 *wl); 510int wlcore_set_key(struct wl1271 *wl, enum set_key_cmd cmd, 511 struct ieee80211_vif *vif, 512 struct ieee80211_sta *sta, 513 struct ieee80211_key_conf *key_conf); 514void wlcore_regdomain_config(struct wl1271 *wl); 515void wlcore_update_inconn_sta(struct wl1271 *wl, struct wl12xx_vif *wlvif, 516 struct wl1271_station *wl_sta, bool in_conn); 517 518static inline void 519wlcore_set_ht_cap(struct wl1271 *wl, enum ieee80211_band band, 520 struct ieee80211_sta_ht_cap *ht_cap) 521{ 522 memcpy(&wl->ht_cap[band], ht_cap, sizeof(*ht_cap)); 523} 524 525/* Tell wlcore not to care about this element when checking the version */ 526#define WLCORE_FW_VER_IGNORE -1 527 528static inline void 529wlcore_set_min_fw_ver(struct wl1271 *wl, unsigned int chip, 530 unsigned int iftype_sr, unsigned int major_sr, 531 unsigned int subtype_sr, unsigned int minor_sr, 532 unsigned int iftype_mr, unsigned int major_mr, 533 unsigned int subtype_mr, unsigned int minor_mr) 534{ 535 wl->min_sr_fw_ver[FW_VER_CHIP] = chip; 536 wl->min_sr_fw_ver[FW_VER_IF_TYPE] = iftype_sr; 537 wl->min_sr_fw_ver[FW_VER_MAJOR] = major_sr; 538 wl->min_sr_fw_ver[FW_VER_SUBTYPE] = subtype_sr; 539 wl->min_sr_fw_ver[FW_VER_MINOR] = minor_sr; 540 541 wl->min_mr_fw_ver[FW_VER_CHIP] = chip; 542 wl->min_mr_fw_ver[FW_VER_IF_TYPE] = iftype_mr; 543 wl->min_mr_fw_ver[FW_VER_MAJOR] = major_mr; 544 wl->min_mr_fw_ver[FW_VER_SUBTYPE] = subtype_mr; 545 wl->min_mr_fw_ver[FW_VER_MINOR] = minor_mr; 546} 547 548/* Firmware image load chunk size */ 549#define CHUNK_SIZE 16384 550 551/* Quirks */ 552 553/* Each RX/TX transaction requires an end-of-transaction transfer */ 554#define WLCORE_QUIRK_END_OF_TRANSACTION BIT(0) 555 556/* the first start_role(sta) sometimes doesn't work on wl12xx */ 557#define WLCORE_QUIRK_START_STA_FAILS BIT(1) 558 559/* wl127x and SPI don't support SDIO block size alignment */ 560#define WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN BIT(2) 561 562/* means aggregated Rx packets are aligned to a SDIO block */ 563#define WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN BIT(3) 564 565/* Older firmwares did not implement the FW logger over bus feature */ 566#define WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED BIT(4) 567 568/* Older firmwares use an old NVS format */ 569#define WLCORE_QUIRK_LEGACY_NVS BIT(5) 570 571/* pad only the last frame in the aggregate buffer */ 572#define WLCORE_QUIRK_TX_PAD_LAST_FRAME BIT(7) 573 574/* extra header space is required for TKIP */ 575#define WLCORE_QUIRK_TKIP_HEADER_SPACE BIT(8) 576 577/* Some firmwares not support sched scans while connected */ 578#define WLCORE_QUIRK_NO_SCHED_SCAN_WHILE_CONN BIT(9) 579 580/* separate probe response templates for one-shot and sched scans */ 581#define WLCORE_QUIRK_DUAL_PROBE_TMPL BIT(10) 582 583/* Firmware requires reg domain configuration for active calibration */ 584#define WLCORE_QUIRK_REGDOMAIN_CONF BIT(11) 585 586/* The FW only support a zero session id for AP */ 587#define WLCORE_QUIRK_AP_ZERO_SESSION_ID BIT(12) 588 589/* TODO: move all these common registers and values elsewhere */ 590#define HW_ACCESS_ELP_CTRL_REG 0x1FFFC 591 592/* ELP register commands */ 593#define ELPCTRL_WAKE_UP 0x1 594#define ELPCTRL_WAKE_UP_WLAN_READY 0x5 595#define ELPCTRL_SLEEP 0x0 596/* ELP WLAN_READY bit */ 597#define ELPCTRL_WLAN_READY 0x2 598 599/************************************************************************* 600 601 Interrupt Trigger Register (Host -> WiLink) 602 603**************************************************************************/ 604 605/* Hardware to Embedded CPU Interrupts - first 32-bit register set */ 606 607/* 608 * The host sets this bit to inform the Wlan 609 * FW that a TX packet is in the XFER 610 * Buffer #0. 611 */ 612#define INTR_TRIG_TX_PROC0 BIT(2) 613 614/* 615 * The host sets this bit to inform the FW 616 * that it read a packet from RX XFER 617 * Buffer #0. 618 */ 619#define INTR_TRIG_RX_PROC0 BIT(3) 620 621#define INTR_TRIG_DEBUG_ACK BIT(4) 622 623#define INTR_TRIG_STATE_CHANGED BIT(5) 624 625/* Hardware to Embedded CPU Interrupts - second 32-bit register set */ 626 627/* 628 * The host sets this bit to inform the FW 629 * that it read a packet from RX XFER 630 * Buffer #1. 631 */ 632#define INTR_TRIG_RX_PROC1 BIT(17) 633 634/* 635 * The host sets this bit to inform the Wlan 636 * hardware that a TX packet is in the XFER 637 * Buffer #1. 638 */ 639#define INTR_TRIG_TX_PROC1 BIT(18) 640 641#define ACX_SLV_SOFT_RESET_BIT BIT(1) 642#define SOFT_RESET_MAX_TIME 1000000 643#define SOFT_RESET_STALL_TIME 1000 644 645#define ECPU_CONTROL_HALT 0x00000101 646 647#define WELP_ARM_COMMAND_VAL 0x4 648 649#endif /* __WLCORE_H__ */ 650