1/* 2 * Copyright IBM Corp. 2000, 2009 3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com> 4 * Jan Glauber <jang@linux.vnet.ibm.com> 5 */ 6#ifndef _CIO_QDIO_H 7#define _CIO_QDIO_H 8 9#include <asm/page.h> 10#include <asm/schid.h> 11#include <asm/debug.h> 12#include "chsc.h" 13 14#define QDIO_BUSY_BIT_PATIENCE (100 << 12) /* 100 microseconds */ 15#define QDIO_BUSY_BIT_RETRY_DELAY 10 /* 10 milliseconds */ 16#define QDIO_BUSY_BIT_RETRIES 1000 /* = 10s retry time */ 17#define QDIO_INPUT_THRESHOLD (500 << 12) /* 500 microseconds */ 18 19enum qdio_irq_states { 20 QDIO_IRQ_STATE_INACTIVE, 21 QDIO_IRQ_STATE_ESTABLISHED, 22 QDIO_IRQ_STATE_ACTIVE, 23 QDIO_IRQ_STATE_STOPPED, 24 QDIO_IRQ_STATE_CLEANUP, 25 QDIO_IRQ_STATE_ERR, 26 NR_QDIO_IRQ_STATES, 27}; 28 29/* used as intparm in do_IO */ 30#define QDIO_DOING_ESTABLISH 1 31#define QDIO_DOING_ACTIVATE 2 32#define QDIO_DOING_CLEANUP 3 33 34#define SLSB_STATE_NOT_INIT 0x0 35#define SLSB_STATE_EMPTY 0x1 36#define SLSB_STATE_PRIMED 0x2 37#define SLSB_STATE_PENDING 0x3 38#define SLSB_STATE_HALTED 0xe 39#define SLSB_STATE_ERROR 0xf 40#define SLSB_TYPE_INPUT 0x0 41#define SLSB_TYPE_OUTPUT 0x20 42#define SLSB_OWNER_PROG 0x80 43#define SLSB_OWNER_CU 0x40 44 45#define SLSB_P_INPUT_NOT_INIT \ 46 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_NOT_INIT) /* 0x80 */ 47#define SLSB_P_INPUT_ACK \ 48 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_EMPTY) /* 0x81 */ 49#define SLSB_CU_INPUT_EMPTY \ 50 (SLSB_OWNER_CU | SLSB_TYPE_INPUT | SLSB_STATE_EMPTY) /* 0x41 */ 51#define SLSB_P_INPUT_PRIMED \ 52 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_PRIMED) /* 0x82 */ 53#define SLSB_P_INPUT_HALTED \ 54 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_HALTED) /* 0x8e */ 55#define SLSB_P_INPUT_ERROR \ 56 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_ERROR) /* 0x8f */ 57#define SLSB_P_OUTPUT_NOT_INIT \ 58 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_NOT_INIT) /* 0xa0 */ 59#define SLSB_P_OUTPUT_EMPTY \ 60 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_EMPTY) /* 0xa1 */ 61#define SLSB_P_OUTPUT_PENDING \ 62 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_PENDING) /* 0xa3 */ 63#define SLSB_CU_OUTPUT_PRIMED \ 64 (SLSB_OWNER_CU | SLSB_TYPE_OUTPUT | SLSB_STATE_PRIMED) /* 0x62 */ 65#define SLSB_P_OUTPUT_HALTED \ 66 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_HALTED) /* 0xae */ 67#define SLSB_P_OUTPUT_ERROR \ 68 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_ERROR) /* 0xaf */ 69 70#define SLSB_ERROR_DURING_LOOKUP 0xff 71 72/* additional CIWs returned by extended Sense-ID */ 73#define CIW_TYPE_EQUEUE 0x3 /* establish QDIO queues */ 74#define CIW_TYPE_AQUEUE 0x4 /* activate QDIO queues */ 75 76/* flags for st qdio sch data */ 77#define CHSC_FLAG_QDIO_CAPABILITY 0x80 78#define CHSC_FLAG_VALIDITY 0x40 79 80/* SIGA flags */ 81#define QDIO_SIGA_WRITE 0x00 82#define QDIO_SIGA_READ 0x01 83#define QDIO_SIGA_SYNC 0x02 84#define QDIO_SIGA_WRITEQ 0x04 85#define QDIO_SIGA_QEBSM_FLAG 0x80 86 87static inline int do_sqbs(u64 token, unsigned char state, int queue, 88 int *start, int *count) 89{ 90 register unsigned long _ccq asm ("0") = *count; 91 register unsigned long _token asm ("1") = token; 92 unsigned long _queuestart = ((unsigned long)queue << 32) | *start; 93 94 asm volatile( 95 " .insn rsy,0xeb000000008A,%1,0,0(%2)" 96 : "+d" (_ccq), "+d" (_queuestart) 97 : "d" ((unsigned long)state), "d" (_token) 98 : "memory", "cc"); 99 *count = _ccq & 0xff; 100 *start = _queuestart & 0xff; 101 102 return (_ccq >> 32) & 0xff; 103} 104 105static inline int do_eqbs(u64 token, unsigned char *state, int queue, 106 int *start, int *count, int ack) 107{ 108 register unsigned long _ccq asm ("0") = *count; 109 register unsigned long _token asm ("1") = token; 110 unsigned long _queuestart = ((unsigned long)queue << 32) | *start; 111 unsigned long _state = (unsigned long)ack << 63; 112 113 asm volatile( 114 " .insn rrf,0xB99c0000,%1,%2,0,0" 115 : "+d" (_ccq), "+d" (_queuestart), "+d" (_state) 116 : "d" (_token) 117 : "memory", "cc"); 118 *count = _ccq & 0xff; 119 *start = _queuestart & 0xff; 120 *state = _state & 0xff; 121 122 return (_ccq >> 32) & 0xff; 123} 124 125struct qdio_irq; 126 127struct siga_flag { 128 u8 input:1; 129 u8 output:1; 130 u8 sync:1; 131 u8 sync_after_ai:1; 132 u8 sync_out_after_pci:1; 133 u8:3; 134} __attribute__ ((packed)); 135 136struct qdio_dev_perf_stat { 137 unsigned int adapter_int; 138 unsigned int qdio_int; 139 unsigned int pci_request_int; 140 141 unsigned int tasklet_inbound; 142 unsigned int tasklet_inbound_resched; 143 unsigned int tasklet_inbound_resched2; 144 unsigned int tasklet_outbound; 145 146 unsigned int siga_read; 147 unsigned int siga_write; 148 unsigned int siga_sync; 149 150 unsigned int inbound_call; 151 unsigned int inbound_handler; 152 unsigned int stop_polling; 153 unsigned int inbound_queue_full; 154 unsigned int outbound_call; 155 unsigned int outbound_handler; 156 unsigned int outbound_queue_full; 157 unsigned int fast_requeue; 158 unsigned int target_full; 159 unsigned int eqbs; 160 unsigned int eqbs_partial; 161 unsigned int sqbs; 162 unsigned int sqbs_partial; 163 unsigned int int_discarded; 164} ____cacheline_aligned; 165 166struct qdio_queue_perf_stat { 167 /* 168 * Sorted into order-2 buckets: 1, 2-3, 4-7, ... 64-127, 128. 169 * Since max. 127 SBALs are scanned reuse entry for 128 as queue full 170 * aka 127 SBALs found. 171 */ 172 unsigned int nr_sbals[8]; 173 unsigned int nr_sbal_error; 174 unsigned int nr_sbal_nop; 175 unsigned int nr_sbal_total; 176}; 177 178enum qdio_queue_irq_states { 179 QDIO_QUEUE_IRQS_DISABLED, 180}; 181 182struct qdio_input_q { 183 /* input buffer acknowledgement flag */ 184 int polling; 185 /* first ACK'ed buffer */ 186 int ack_start; 187 /* how much sbals are acknowledged with qebsm */ 188 int ack_count; 189 /* last time of noticing incoming data */ 190 u64 timestamp; 191 /* upper-layer polling flag */ 192 unsigned long queue_irq_state; 193 /* callback to start upper-layer polling */ 194 void (*queue_start_poll) (struct ccw_device *, int, unsigned long); 195}; 196 197struct qdio_output_q { 198 /* PCIs are enabled for the queue */ 199 int pci_out_enabled; 200 /* cq: use asynchronous output buffers */ 201 int use_cq; 202 /* cq: aobs used for particual SBAL */ 203 struct qaob **aobs; 204 /* cq: sbal state related to asynchronous operation */ 205 struct qdio_outbuf_state *sbal_state; 206 /* timer to check for more outbound work */ 207 struct timer_list timer; 208 /* used SBALs before tasklet schedule */ 209 int scan_threshold; 210}; 211 212/* 213 * Note on cache alignment: grouped slsb and write mostly data at the beginning 214 * sbal[] is read-only and starts on a new cacheline followed by read mostly. 215 */ 216struct qdio_q { 217 struct slsb slsb; 218 219 union { 220 struct qdio_input_q in; 221 struct qdio_output_q out; 222 } u; 223 224 /* 225 * inbound: next buffer the program should check for 226 * outbound: next buffer to check if adapter processed it 227 */ 228 int first_to_check; 229 230 /* first_to_check of the last time */ 231 int last_move; 232 233 /* beginning position for calling the program */ 234 int first_to_kick; 235 236 /* number of buffers in use by the adapter */ 237 atomic_t nr_buf_used; 238 239 /* error condition during a data transfer */ 240 unsigned int qdio_error; 241 242 /* last scan of the queue */ 243 u64 timestamp; 244 245 struct tasklet_struct tasklet; 246 struct qdio_queue_perf_stat q_stats; 247 248 struct qdio_buffer *sbal[QDIO_MAX_BUFFERS_PER_Q] ____cacheline_aligned; 249 250 /* queue number */ 251 int nr; 252 253 /* bitmask of queue number */ 254 int mask; 255 256 /* input or output queue */ 257 int is_input_q; 258 259 /* list of thinint input queues */ 260 struct list_head entry; 261 262 /* upper-layer program handler */ 263 qdio_handler_t (*handler); 264 265 struct dentry *debugfs_q; 266 struct qdio_irq *irq_ptr; 267 struct sl *sl; 268 /* 269 * A page is allocated under this pointer and used for slib and sl. 270 * slib is 2048 bytes big and sl points to offset PAGE_SIZE / 2. 271 */ 272 struct slib *slib; 273} __attribute__ ((aligned(256))); 274 275struct qdio_irq { 276 struct qib qib; 277 u32 *dsci; /* address of device state change indicator */ 278 struct ccw_device *cdev; 279 struct dentry *debugfs_dev; 280 struct dentry *debugfs_perf; 281 282 unsigned long int_parm; 283 struct subchannel_id schid; 284 unsigned long sch_token; /* QEBSM facility */ 285 286 enum qdio_irq_states state; 287 288 struct siga_flag siga_flag; /* siga sync information from qdioac */ 289 290 int nr_input_qs; 291 int nr_output_qs; 292 293 struct ccw1 ccw; 294 struct ciw equeue; 295 struct ciw aqueue; 296 297 struct qdio_ssqd_desc ssqd_desc; 298 void (*orig_handler) (struct ccw_device *, unsigned long, struct irb *); 299 300 int perf_stat_enabled; 301 302 struct qdr *qdr; 303 unsigned long chsc_page; 304 305 struct qdio_q *input_qs[QDIO_MAX_QUEUES_PER_IRQ]; 306 struct qdio_q *output_qs[QDIO_MAX_QUEUES_PER_IRQ]; 307 308 debug_info_t *debug_area; 309 struct mutex setup_mutex; 310 struct qdio_dev_perf_stat perf_stat; 311}; 312 313/* helper functions */ 314#define queue_type(q) q->irq_ptr->qib.qfmt 315#define SCH_NO(q) (q->irq_ptr->schid.sch_no) 316 317#define is_thinint_irq(irq) \ 318 (irq->qib.qfmt == QDIO_IQDIO_QFMT || \ 319 css_general_characteristics.aif_osa) 320 321#define qperf(__qdev, __attr) ((__qdev)->perf_stat.(__attr)) 322 323#define qperf_inc(__q, __attr) \ 324({ \ 325 struct qdio_irq *qdev = (__q)->irq_ptr; \ 326 if (qdev->perf_stat_enabled) \ 327 (qdev->perf_stat.__attr)++; \ 328}) 329 330static inline void account_sbals_error(struct qdio_q *q, int count) 331{ 332 q->q_stats.nr_sbal_error += count; 333 q->q_stats.nr_sbal_total += count; 334} 335 336/* the highest iqdio queue is used for multicast */ 337static inline int multicast_outbound(struct qdio_q *q) 338{ 339 return (q->irq_ptr->nr_output_qs > 1) && 340 (q->nr == q->irq_ptr->nr_output_qs - 1); 341} 342 343#define pci_out_supported(q) \ 344 (q->irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED) 345#define is_qebsm(q) (q->irq_ptr->sch_token != 0) 346 347#define need_siga_in(q) (q->irq_ptr->siga_flag.input) 348#define need_siga_out(q) (q->irq_ptr->siga_flag.output) 349#define need_siga_sync(q) (unlikely(q->irq_ptr->siga_flag.sync)) 350#define need_siga_sync_after_ai(q) \ 351 (unlikely(q->irq_ptr->siga_flag.sync_after_ai)) 352#define need_siga_sync_out_after_pci(q) \ 353 (unlikely(q->irq_ptr->siga_flag.sync_out_after_pci)) 354 355#define for_each_input_queue(irq_ptr, q, i) \ 356 for (i = 0; i < irq_ptr->nr_input_qs && \ 357 ({ q = irq_ptr->input_qs[i]; 1; }); i++) 358#define for_each_output_queue(irq_ptr, q, i) \ 359 for (i = 0; i < irq_ptr->nr_output_qs && \ 360 ({ q = irq_ptr->output_qs[i]; 1; }); i++) 361 362#define prev_buf(bufnr) \ 363 ((bufnr + QDIO_MAX_BUFFERS_MASK) & QDIO_MAX_BUFFERS_MASK) 364#define next_buf(bufnr) \ 365 ((bufnr + 1) & QDIO_MAX_BUFFERS_MASK) 366#define add_buf(bufnr, inc) \ 367 ((bufnr + inc) & QDIO_MAX_BUFFERS_MASK) 368#define sub_buf(bufnr, dec) \ 369 ((bufnr - dec) & QDIO_MAX_BUFFERS_MASK) 370 371#define queue_irqs_enabled(q) \ 372 (test_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state) == 0) 373#define queue_irqs_disabled(q) \ 374 (test_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state) != 0) 375 376extern u64 last_ai_time; 377 378/* prototypes for thin interrupt */ 379void qdio_setup_thinint(struct qdio_irq *irq_ptr); 380int qdio_establish_thinint(struct qdio_irq *irq_ptr); 381void qdio_shutdown_thinint(struct qdio_irq *irq_ptr); 382void tiqdio_add_input_queues(struct qdio_irq *irq_ptr); 383void tiqdio_remove_input_queues(struct qdio_irq *irq_ptr); 384void tiqdio_inbound_processing(unsigned long q); 385int tiqdio_allocate_memory(void); 386void tiqdio_free_memory(void); 387int tiqdio_register_thinints(void); 388void tiqdio_unregister_thinints(void); 389void clear_nonshared_ind(struct qdio_irq *); 390int test_nonshared_ind(struct qdio_irq *); 391 392/* prototypes for setup */ 393void qdio_inbound_processing(unsigned long data); 394void qdio_outbound_processing(unsigned long data); 395void qdio_outbound_timer(unsigned long data); 396void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm, 397 struct irb *irb); 398int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs, 399 int nr_output_qs); 400void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr); 401int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr, 402 struct subchannel_id *schid, 403 struct qdio_ssqd_desc *data); 404int qdio_setup_irq(struct qdio_initialize *init_data); 405void qdio_print_subchannel_info(struct qdio_irq *irq_ptr, 406 struct ccw_device *cdev); 407void qdio_release_memory(struct qdio_irq *irq_ptr); 408int qdio_setup_create_sysfs(struct ccw_device *cdev); 409void qdio_setup_destroy_sysfs(struct ccw_device *cdev); 410int qdio_setup_init(void); 411void qdio_setup_exit(void); 412int qdio_enable_async_operation(struct qdio_output_q *q); 413void qdio_disable_async_operation(struct qdio_output_q *q); 414struct qaob *qdio_allocate_aob(void); 415 416int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr, 417 unsigned char *state); 418#endif /* _CIO_QDIO_H */ 419