1/*
2 * Copyright 2003 Digi International (www.digi.com)
3 *      Scott H Kilau <Scott_Kilau at digi dot com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2, or (at your option)
8 * any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
12 * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
13 * PURPOSE.  See the GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 *
19 *	NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
20 *
21 *************************************************************************
22 *
23 * Driver includes
24 *
25 *************************************************************************/
26
27#ifndef __DGAP_DRIVER_H
28#define __DGAP_DRIVER_H
29
30#include <linux/types.h>        /* To pick up the varions Linux types */
31#include <linux/tty.h>          /* To pick up the various tty structs/defines */
32#include <linux/interrupt.h>    /* For irqreturn_t type */
33
34#ifndef TRUE
35# define TRUE 1
36#endif
37
38#ifndef FALSE
39# define FALSE 0
40#endif
41
42#if !defined(TTY_FLIPBUF_SIZE)
43# define TTY_FLIPBUF_SIZE 512
44#endif
45
46/*************************************************************************
47 *
48 * Driver defines
49 *
50 *************************************************************************/
51
52/*
53 * Driver identification
54 */
55#define	DG_NAME		"dgap-1.3-16"
56#define	DG_PART		"40002347_C"
57#define	DRVSTR		"dgap"
58
59/*
60 * defines from dgap_pci.h
61 */
62#define PCIMAX 32			/* maximum number of PCI boards */
63
64#define DIGI_VID		0x114F
65
66#define PCI_DEV_EPC_DID		0x0002
67#define PCI_DEV_XEM_DID		0x0004
68#define PCI_DEV_XR_DID		0x0005
69#define PCI_DEV_CX_DID		0x0006
70#define PCI_DEV_XRJ_DID		0x0009	/* PLX-based Xr adapter */
71#define PCI_DEV_XR_IBM_DID	0x0011	/* IBM 8-port Async Adapter */
72#define PCI_DEV_XR_BULL_DID	0x0013	/* BULL 8-port Async Adapter */
73#define PCI_DEV_XR_SAIP_DID	0x001c	/* SAIP card - Xr adapter */
74#define PCI_DEV_XR_422_DID	0x0012	/* Xr-422 */
75#define PCI_DEV_920_2_DID	0x0034	/* XR-Plus 920 K, 2 port */
76#define PCI_DEV_920_4_DID	0x0026	/* XR-Plus 920 K, 4 port */
77#define PCI_DEV_920_8_DID	0x0027	/* XR-Plus 920 K, 8 port */
78#define PCI_DEV_EPCJ_DID	0x000a	/* PLX 9060 chip for PCI  */
79#define PCI_DEV_CX_IBM_DID	0x001b	/* IBM 128-port Async Adapter */
80#define PCI_DEV_920_8_HP_DID	0x0058	/* HP XR-Plus 920 K, 8 port */
81#define PCI_DEV_XEM_HP_DID	0x0059  /* HP Xem PCI */
82
83#define PCI_DEV_XEM_NAME	"AccelePort XEM"
84#define PCI_DEV_CX_NAME		"AccelePort CX"
85#define PCI_DEV_XR_NAME		"AccelePort Xr"
86#define PCI_DEV_XRJ_NAME	"AccelePort Xr (PLX)"
87#define PCI_DEV_XR_SAIP_NAME	"AccelePort Xr (SAIP)"
88#define PCI_DEV_920_2_NAME	"AccelePort Xr920 2 port"
89#define PCI_DEV_920_4_NAME	"AccelePort Xr920 4 port"
90#define PCI_DEV_920_8_NAME	"AccelePort Xr920 8 port"
91#define PCI_DEV_XR_422_NAME	"AccelePort Xr 422"
92#define PCI_DEV_EPCJ_NAME	"AccelePort EPC (PLX)"
93#define PCI_DEV_XR_BULL_NAME	"AccelePort Xr (BULL)"
94#define PCI_DEV_XR_IBM_NAME	"AccelePort Xr (IBM)"
95#define PCI_DEV_CX_IBM_NAME	"AccelePort CX (IBM)"
96#define PCI_DEV_920_8_HP_NAME	"AccelePort Xr920 8 port (HP)"
97#define PCI_DEV_XEM_HP_NAME	"AccelePort XEM (HP)"
98
99/*
100 * On the PCI boards, there is no IO space allocated
101 * The I/O registers will be in the first 3 bytes of the
102 * upper 2MB of the 4MB memory space.  The board memory
103 * will be mapped into the low 2MB of the 4MB memory space
104 */
105
106/* Potential location of PCI Bios from E0000 to FFFFF*/
107#define PCI_BIOS_SIZE		0x00020000
108
109/* Size of Memory and I/O for PCI (4MB) */
110#define PCI_RAM_SIZE		0x00400000
111
112/* Size of Memory (2MB) */
113#define PCI_MEM_SIZE		0x00200000
114
115/* Max PCI Window Size (2MB) */
116#define PCI_WIN_SIZE		0x00200000
117
118#define PCI_WIN_SHIFT		21 /* 21 bits max */
119
120/* Offset of I/0 in Memory (2MB) */
121#define PCI_IO_OFFSET		0x00200000
122
123/* Size of IO (2MB) */
124#define PCI_IO_SIZE_DGAP	0x00200000
125
126/* Number of boards we support at once. */
127#define	MAXBOARDS	32
128#define	MAXPORTS	224
129#define MAXTTYNAMELEN	200
130
131/* Our 3 magic numbers for our board, channel and unit structs */
132#define DGAP_BOARD_MAGIC	0x5c6df104
133#define DGAP_CHANNEL_MAGIC	0x6c6df104
134#define DGAP_UNIT_MAGIC		0x7c6df104
135
136/* Serial port types */
137#define DGAP_SERIAL		0
138#define DGAP_PRINT		1
139
140#define	SERIAL_TYPE_NORMAL	1
141
142/* 4 extra for alignment play space */
143#define WRITEBUFLEN		((4096) + 4)
144#define MYFLIPLEN		N_TTY_BUF_SIZE
145
146#define SBREAK_TIME 0x25
147#define U2BSIZE 0x400
148
149#define dgap_jiffies_from_ms(a) (((a) * HZ) / 1000)
150
151/*
152 * Our major for the mgmt devices.
153 *
154 * We can use 22, because Digi was allocated 22 and 23 for the epca driver.
155 * 22 has now become obsolete now that the "cu" devices have
156 * been removed from 2.6.
157 * Also, this *IS* the epca driver, just PCI only now.
158 */
159#ifndef DIGI_DGAP_MAJOR
160# define DIGI_DGAP_MAJOR         22
161#endif
162
163/*
164 * The parameters we use to define the periods of the moving averages.
165 */
166#define		MA_PERIOD	(HZ / 10)
167#define		SMA_DUR		(1 * HZ)
168#define		EMA_DUR		(1 * HZ)
169#define		SMA_NPERIODS	(SMA_DUR / MA_PERIOD)
170#define		EMA_NPERIODS	(EMA_DUR / MA_PERIOD)
171
172/*
173 * Define a local default termios struct. All ports will be created
174 * with this termios initially.  This is the same structure that is defined
175 * as the default in tty_io.c with the same settings overriden as in serial.c
176 *
177 * In short, this should match the internal serial ports' defaults.
178 */
179#define	DEFAULT_IFLAGS	(ICRNL | IXON)
180#define	DEFAULT_OFLAGS	(OPOST | ONLCR)
181#define	DEFAULT_CFLAGS	(B9600 | CS8 | CREAD | HUPCL | CLOCAL)
182#define	DEFAULT_LFLAGS	(ISIG | ICANON | ECHO | ECHOE | ECHOK | \
183			ECHOCTL | ECHOKE | IEXTEN)
184
185#ifndef _POSIX_VDISABLE
186#define _POSIX_VDISABLE ('\0')
187#endif
188
189#define SNIFF_MAX	65536		/* Sniff buffer size (2^n) */
190#define SNIFF_MASK	(SNIFF_MAX - 1)	/* Sniff wrap mask */
191
192#define VPDSIZE (512)
193
194/************************************************************************
195 *      FEP memory offsets
196 ************************************************************************/
197#define START           0x0004L         /* Execution start address      */
198
199#define CMDBUF          0x0d10L         /* Command (cm_t) structure offset */
200#define CMDSTART        0x0400L         /* Start of command buffer      */
201#define CMDMAX          0x0800L         /* End of command buffer        */
202
203#define EVBUF           0x0d18L         /* Event (ev_t) structure       */
204#define EVSTART         0x0800L         /* Start of event buffer        */
205#define EVMAX           0x0c00L         /* End of event buffer          */
206#define FEP5_PLUS       0x0E40          /* ASCII '5' and ASCII 'A' is here  */
207#define ECS_SEG         0x0E44          /* Segment of the extended      */
208					/* channel structure            */
209#define LINE_SPEED      0x10            /* Offset into ECS_SEG for line */
210					/* speed if the fep has extended */
211					/* capabilities                 */
212
213/* BIOS MAGIC SPOTS */
214#define ERROR           0x0C14L		/* BIOS error code              */
215#define SEQUENCE	0x0C12L		/* BIOS sequence indicator      */
216#define POSTAREA	0x0C00L		/* POST complete message area   */
217
218/* FEP MAGIC SPOTS */
219#define FEPSTAT         POSTAREA        /* OS here when FEP comes up    */
220#define NCHAN           0x0C02L         /* number of ports FEP sees     */
221#define PANIC           0x0C10L         /* PANIC area for FEP           */
222#define KMEMEM          0x0C30L         /* Memory for KME use           */
223#define CONFIG          0x0CD0L         /* Concentrator configuration info */
224#define CONFIGSIZE      0x0030          /* configuration info size      */
225#define DOWNREQ         0x0D00          /* Download request buffer pointer */
226
227#define CHANBUF         0x1000L         /* Async channel (bs_t) structs */
228#define FEPOSSIZE       0x1FFF          /* 8K FEPOS                     */
229
230#define XEMPORTS    0xC02	/*
231				 * Offset in board memory where FEP5 stores
232				 * how many ports it has detected.
233				 * NOTE: FEP5 reports 64 ports when the user
234				 * has the cable in EBI OUT instead of EBI IN.
235				 */
236
237#define FEPCLR      0x00
238#define FEPMEM      0x02
239#define FEPRST      0x04
240#define FEPINT      0x08
241#define FEPMASK     0x0e
242#define FEPWIN      0x80
243
244#define LOWMEM      0x0100
245#define HIGHMEM     0x7f00
246
247#define FEPTIMEOUT 200000
248
249#define ENABLE_INTR	0x0e04		/* Enable interrupts flag */
250#define FEPPOLL_MIN	1		/* minimum of 1 millisecond */
251#define FEPPOLL_MAX	20		/* maximum of 20 milliseconds */
252#define FEPPOLL		0x0c26		/* Fep event poll interval */
253
254#define	IALTPIN		0x0080		/* Input flag to swap DSR <-> DCD */
255
256/************************************************************************
257 * FEP supported functions
258 ************************************************************************/
259#define SRLOW		0xe0		/* Set receive low water	*/
260#define SRHIGH		0xe1		/* Set receive high water	*/
261#define FLUSHTX		0xe2		/* Flush transmit buffer	*/
262#define PAUSETX		0xe3		/* Pause data transmission	*/
263#define RESUMETX	0xe4		/* Resume data transmission	*/
264#define SMINT		0xe5		/* Set Modem Interrupt		*/
265#define SAFLOWC		0xe6		/* Set Aux. flow control chars	*/
266#define SBREAK		0xe8		/* Send break			*/
267#define SMODEM		0xe9		/* Set 8530 modem control lines	*/
268#define SIFLAG		0xea		/* Set UNIX iflags		*/
269#define SFLOWC		0xeb		/* Set flow control characters	*/
270#define STLOW		0xec		/* Set transmit low water mark	*/
271#define RPAUSE		0xee		/* Pause receive		*/
272#define RRESUME		0xef		/* Resume receive		*/
273#define CHRESET		0xf0		/* Reset Channel		*/
274#define BUFSETALL	0xf2		/* Set Tx & Rx buffer size avail*/
275#define SOFLAG		0xf3		/* Set UNIX oflags		*/
276#define SHFLOW		0xf4		/* Set hardware handshake	*/
277#define SCFLAG		0xf5		/* Set UNIX cflags		*/
278#define SVNEXT		0xf6		/* Set VNEXT character		*/
279#define SPINTFC		0xfc		/* Reserved			*/
280#define SCOMMODE	0xfd		/* Set RS232/422 mode		*/
281
282/************************************************************************
283 *	Modes for SCOMMODE
284 ************************************************************************/
285#define MODE_232	0x00
286#define MODE_422	0x01
287
288/************************************************************************
289 *      Event flags.
290 ************************************************************************/
291#define IFBREAK         0x01            /* Break received               */
292#define IFTLW           0x02            /* Transmit low water           */
293#define IFTEM           0x04            /* Transmitter empty            */
294#define IFDATA          0x08            /* Receive data present         */
295#define IFMODEM         0x20            /* Modem status change          */
296
297/************************************************************************
298 *      Modem flags
299 ************************************************************************/
300#       define  DM_RTS          0x02    /* Request to send              */
301#       define  DM_CD           0x80    /* Carrier detect               */
302#       define  DM_DSR          0x20    /* Data set ready               */
303#       define  DM_CTS          0x10    /* Clear to send                */
304#       define  DM_RI           0x40    /* Ring indicator               */
305#       define  DM_DTR          0x01    /* Data terminal ready          */
306
307/*
308 * defines from dgap_conf.h
309 */
310#define NULLNODE 0		/* header node, not used */
311#define BNODE 1			/* Board node */
312#define LNODE 2			/* Line node */
313#define CNODE 3			/* Concentrator node */
314#define MNODE 4			/* EBI Module node */
315#define TNODE 5			/* tty name prefix node */
316#define	CUNODE 6		/* cu name prefix (non-SCO) */
317#define PNODE 7			/* trans. print prefix node */
318#define JNODE 8			/* maJor number node */
319#define ANODE 9			/* altpin */
320#define	TSNODE 10		/* tty structure size */
321#define CSNODE 11		/* channel structure size */
322#define BSNODE 12		/* board structure size */
323#define USNODE 13		/* unit schedule structure size */
324#define FSNODE 14		/* f2200 structure size */
325#define VSNODE 15		/* size of VPIX structures */
326#define INTRNODE 16		/* enable interrupt */
327
328/* Enumeration of tokens */
329#define	BEGIN	1
330#define	END	2
331#define	BOARD	10
332
333#define EPCFS	11 /* start of EPC family definitions */
334#define	ICX		11
335#define	MCX		13
336#define PCX	14
337#define	IEPC	15
338#define	EEPC	16
339#define	MEPC	17
340#define	IPCM	18
341#define	EPCM	19
342#define	MPCM	20
343#define PEPC	21
344#define PPCM	22
345#ifdef CP
346#define ICP     23
347#define ECP     24
348#define MCP     25
349#endif
350#define EPCFE	25 /* end of EPC family definitions */
351#define	PC2E	26
352#define	PC4E	27
353#define	PC4E8K	28
354#define	PC8E	29
355#define	PC8E8K	30
356#define	PC16E	31
357#define MC2E8K  34
358#define MC4E8K  35
359#define MC8E8K  36
360
361#define AVANFS	42	/* start of Avanstar family definitions */
362#define A8P	42
363#define A16P	43
364#define AVANFE	43	/* end of Avanstar family definitions */
365
366#define DA2000FS	44 /* start of AccelePort 2000 family definitions */
367#define DA22		44 /* AccelePort 2002 */
368#define DA24		45 /* AccelePort 2004 */
369#define DA28		46 /* AccelePort 2008 */
370#define DA216		47 /* AccelePort 2016 */
371#define DAR4		48 /* AccelePort RAS 4 port */
372#define DAR8		49 /* AccelePort RAS 8 port */
373#define DDR24		50 /* DataFire RAS 24 port */
374#define DDR30		51 /* DataFire RAS 30 port */
375#define DDR48		52 /* DataFire RAS 48 port */
376#define DDR60		53 /* DataFire RAS 60 port */
377#define DA2000FE	53 /* end of AccelePort 2000/RAS family definitions */
378
379#define PCXRFS	106	/* start of PCXR family definitions */
380#define	APORT4	106
381#define	APORT8	107
382#define PAPORT4 108
383#define PAPORT8 109
384#define APORT4_920I	110
385#define APORT8_920I	111
386#define APORT4_920P	112
387#define APORT8_920P	113
388#define APORT2_920P 114
389#define PCXRFE	117	/* end of PCXR family definitions */
390
391#define	LINE	82
392#ifdef T1
393#define T1M	83
394#define E1M	84
395#endif
396#define	CONC	64
397#define	CX	65
398#define	EPC	66
399#define	MOD	67
400#define	PORTS	68
401#define METHOD	69
402#define CUSTOM	70
403#define BASIC	71
404#define STATUS	72
405#define MODEM	73
406/* The following tokens can appear in multiple places */
407#define	SPEED	74
408#define	NPORTS	75
409#define	ID	76
410#define CABLE	77
411#define CONNECT	78
412#define	IO	79
413#define	MEM	80
414#define DPSZ	81
415
416#define	TTYN	90
417#define	CU	91
418#define	PRINT	92
419#define	XPRINT	93
420#define CMAJOR   94
421#define ALTPIN  95
422#define STARTO 96
423#define USEINTR  97
424#define PCIINFO  98
425
426#define	TTSIZ	100
427#define	CHSIZ	101
428#define BSSIZ	102
429#define	UNTSIZ	103
430#define	F2SIZ	104
431#define	VPSIZ	105
432
433#define	TOTAL_BOARD	2
434#define	CURRENT_BRD	4
435#define	BOARD_TYPE	6
436#define	IO_ADDRESS	8
437#define	MEM_ADDRESS	10
438
439#define	FIELDS_PER_PAGE	18
440
441#define TB_FIELD	1
442#define CB_FIELD	3
443#define BT_FIELD	5
444#define IO_FIELD	7
445#define ID_FIELD	8
446#define ME_FIELD	9
447#define TTY_FIELD	11
448#define CU_FIELD	13
449#define PR_FIELD	15
450#define MPR_FIELD	17
451
452#define	MAX_FIELD	512
453
454#define	INIT		0
455#define	NITEMS		128
456#define MAX_ITEM	512
457
458#define	DSCRINST	1
459#define	DSCRNUM		3
460#define	ALTPINQ		5
461#define	SSAVE		7
462
463#define	DSCR		"32"
464#define	ONETONINE	"123456789"
465#define	ALL		"1234567890"
466
467/*
468 * All the possible states the driver can be while being loaded.
469 */
470enum {
471	DRIVER_INITIALIZED = 0,
472	DRIVER_READY
473};
474
475/*
476 * All the possible states the board can be while booting up.
477 */
478enum {
479	BOARD_FAILED = 0,
480	BOARD_READY
481};
482
483/*
484 * All the possible states that a requested concentrator image can be in.
485 */
486enum {
487	NO_PENDING_CONCENTRATOR_REQUESTS = 0,
488	NEED_CONCENTRATOR,
489	REQUESTED_CONCENTRATOR
490};
491
492/*
493 * Modem line constants are defined as macros because DSR and
494 * DCD are swapable using the ditty altpin option.
495 */
496#define D_CD(ch)        ch->ch_cd       /* Carrier detect       */
497#define D_DSR(ch)       ch->ch_dsr      /* Data set ready       */
498#define D_RTS(ch)       DM_RTS          /* Request to send      */
499#define D_CTS(ch)       DM_CTS          /* Clear to send        */
500#define D_RI(ch)        DM_RI           /* Ring indicator       */
501#define D_DTR(ch)       DM_DTR          /* Data terminal ready  */
502
503/*************************************************************************
504 *
505 * Structures and closely related defines.
506 *
507 *************************************************************************/
508
509/*
510 * A structure to hold a statistics counter.  We also
511 * compute moving averages for this counter.
512 */
513struct macounter {
514	u32		cnt;	/* Total count */
515	ulong		accum;	/* Acuumulator per period */
516	ulong		sma;	/* Simple moving average */
517	ulong		ema;	/* Exponential moving average */
518};
519
520/************************************************************************
521 * Device flag definitions for bd_flags.
522 ************************************************************************/
523#define	BD_FEP5PLUS	0x0001          /* Supports FEP5 Plus commands */
524#define BD_HAS_VPD	0x0002		/* Board has VPD info available */
525
526/*
527 *	Per-board information
528 */
529struct board_t {
530	int		magic;		/* Board Magic number.  */
531	int		boardnum;	/* Board number: 0-3 */
532
533	int		type;		/* Type of board */
534	char		*name;		/* Product Name */
535	struct pci_dev	*pdev;		/* Pointer to the pci_dev struct */
536	u16		vendor;		/* PCI vendor ID */
537	u16		device;		/* PCI device ID */
538	u16		subvendor;	/* PCI subsystem vendor ID */
539	u16		subdevice;	/* PCI subsystem device ID */
540	u8		rev;		/* PCI revision ID */
541	uint		pci_bus;	/* PCI bus value */
542	uint		pci_slot;	/* PCI slot value */
543	u16		maxports;	/* MAX ports this board can handle */
544	u8		vpd[VPDSIZE];	/* VPD of board, if found */
545	u32		bd_flags;	/* Board flags */
546
547	spinlock_t	bd_lock;	/* Used to protect board */
548
549	u32		state;		/* State of card. */
550	wait_queue_head_t state_wait;	/* Place to sleep on for state change */
551
552	struct		tasklet_struct helper_tasklet; /* Poll helper tasklet */
553
554	u32		wait_for_bios;
555	u32		wait_for_fep;
556
557	struct cnode    *bd_config;	/* Config of board */
558
559	u16		nasync;		/* Number of ports on card */
560
561	ulong		irq;		/* Interrupt request number */
562	ulong		intr_count;	/* Count of interrupts */
563	u32		intr_used;	/* Non-zero if using interrupts */
564	u32		intr_running;	/* Non-zero if FEP knows its doing */
565					/* interrupts */
566
567	ulong		port;		/* Start of base io port of the card */
568	ulong		port_end;	/* End of base io port of the card */
569	ulong		membase;	/* Start of base memory of the card */
570	ulong		membase_end;	/* End of base memory of the card */
571
572	u8 __iomem	*re_map_port;	/* Remapped io port of the card */
573	u8 __iomem	*re_map_membase;/* Remapped memory of the card */
574
575	u8		inhibit_poller; /* Tells the poller to leave us alone */
576
577	struct channel_t *channels[MAXPORTS]; /* array of pointers to our */
578					      /* channels.                */
579
580	struct tty_driver	*serial_driver;
581	struct tty_port *serial_ports;
582	char		serial_name[200];
583	struct tty_driver	*print_driver;
584	struct tty_port *printer_ports;
585	char		print_name[200];
586
587	struct bs_t __iomem *bd_bs;	/* Base structure pointer         */
588
589	char	*flipbuf;		/* Our flip buffer, alloced if    */
590					/* board is found                 */
591	char	*flipflagbuf;		/* Our flip flag buffer, alloced  */
592					/* if board is found              */
593
594	u16		dpatype;	/* The board "type", as defined   */
595					/* by DPA                         */
596	u16		dpastatus;	/* The board "status", as defined */
597					/* by DPA                         */
598
599	u32		conc_dl_status;	/* Status of any pending conc     */
600					/* download                       */
601};
602
603/************************************************************************
604 * Unit flag definitions for un_flags.
605 ************************************************************************/
606#define UN_ISOPEN	0x0001		/* Device is open		*/
607#define UN_CLOSING	0x0002		/* Line is being closed		*/
608#define UN_IMM		0x0004		/* Service immediately		*/
609#define UN_BUSY		0x0008		/* Some work this channel	*/
610#define UN_BREAKI	0x0010		/* Input break received		*/
611#define UN_PWAIT	0x0020		/* Printer waiting for terminal	*/
612#define UN_TIME		0x0040		/* Waiting on time		*/
613#define UN_EMPTY	0x0080		/* Waiting output queue empty	*/
614#define UN_LOW		0x0100		/* Waiting output low water mark*/
615#define UN_EXCL_OPEN	0x0200		/* Open for exclusive use	*/
616#define UN_WOPEN	0x0400		/* Device waiting for open	*/
617#define UN_WIOCTL	0x0800		/* Device waiting for open	*/
618#define UN_HANGUP	0x8000		/* Carrier lost			*/
619
620struct device;
621
622/************************************************************************
623 * Structure for terminal or printer unit.
624 ************************************************************************/
625struct un_t {
626	int	magic;		/* Unit Magic Number.			*/
627	struct	channel_t *un_ch;
628	u32	un_time;
629	u32	un_type;
630	int	un_open_count;	/* Counter of opens to port		*/
631	struct tty_struct *un_tty;/* Pointer to unit tty structure	*/
632	u32	un_flags;	/* Unit flags				*/
633	wait_queue_head_t un_flags_wait; /* Place to sleep to wait on unit */
634	u32	un_dev;		/* Minor device number			*/
635	tcflag_t un_oflag;	/* oflags being done on board		*/
636	tcflag_t un_lflag;	/* lflags being done on board		*/
637	struct device *un_sysfs;
638};
639
640/************************************************************************
641 * Device flag definitions for ch_flags.
642 ************************************************************************/
643#define CH_PRON         0x0001          /* Printer on string                */
644#define CH_OUT          0x0002          /* Dial-out device open             */
645#define CH_STOP         0x0004          /* Output is stopped                */
646#define CH_STOPI        0x0008          /* Input is stopped                 */
647#define CH_CD           0x0010          /* Carrier is present               */
648#define CH_FCAR         0x0020          /* Carrier forced on                */
649
650#define CH_RXBLOCK      0x0080          /* Enable rx blocked flag           */
651#define CH_WLOW         0x0100          /* Term waiting low event           */
652#define CH_WEMPTY       0x0200          /* Term waiting empty event         */
653#define CH_RENABLE      0x0400          /* Buffer just emptied          */
654#define CH_RACTIVE      0x0800          /* Process active in xxread()   */
655#define CH_RWAIT        0x1000          /* Process waiting in xxread()  */
656#define CH_BAUD0	0x2000		/* Used for checking B0 transitions */
657#define CH_HANGUP       0x8000		/* Hangup received                  */
658
659/*
660 * Definitions for ch_sniff_flags
661 */
662#define SNIFF_OPEN	0x1
663#define SNIFF_WAIT_DATA	0x2
664#define SNIFF_WAIT_SPACE 0x4
665
666/************************************************************************
667 ***	Definitions for Digi ditty(1) command.
668 ************************************************************************/
669
670/************************************************************************
671 * This module provides application access to special Digi
672 * serial line enhancements which are not standard UNIX(tm) features.
673 ************************************************************************/
674
675#if !defined(TIOCMODG)
676
677#define	TIOCMODG	(('d'<<8) | 250)	/* get modem ctrl state	*/
678#define	TIOCMODS	(('d'<<8) | 251)	/* set modem ctrl state	*/
679
680#ifndef TIOCM_LE
681#define		TIOCM_LE	0x01		/* line enable		*/
682#define		TIOCM_DTR	0x02		/* data terminal ready	*/
683#define		TIOCM_RTS	0x04		/* request to send	*/
684#define		TIOCM_ST	0x08		/* secondary transmit	*/
685#define		TIOCM_SR	0x10		/* secondary receive	*/
686#define		TIOCM_CTS	0x20		/* clear to send	*/
687#define		TIOCM_CAR	0x40		/* carrier detect	*/
688#define		TIOCM_RNG	0x80		/* ring	indicator	*/
689#define		TIOCM_DSR	0x100		/* data set ready	*/
690#define		TIOCM_RI	TIOCM_RNG	/* ring (alternate)	*/
691#define		TIOCM_CD	TIOCM_CAR	/* carrier detect (alt)	*/
692#endif
693
694#endif
695
696#if !defined(TIOCMSET)
697#define	TIOCMSET	(('d'<<8) | 252)	/* set modem ctrl state	*/
698#define	TIOCMGET	(('d'<<8) | 253)	/* set modem ctrl state	*/
699#endif
700
701#if !defined(TIOCMBIC)
702#define	TIOCMBIC	(('d'<<8) | 254)	/* set modem ctrl state */
703#define	TIOCMBIS	(('d'<<8) | 255)	/* set modem ctrl state */
704#endif
705
706#if !defined(TIOCSDTR)
707#define	TIOCSDTR	(('e'<<8) | 0)		/* set DTR		*/
708#define	TIOCCDTR	(('e'<<8) | 1)		/* clear DTR		*/
709#endif
710
711/************************************************************************
712 * Ioctl command arguments for DIGI parameters.
713 ************************************************************************/
714#define DIGI_GETA	(('e'<<8) | 94)		/* Read params		*/
715
716#define DIGI_SETA	(('e'<<8) | 95)		/* Set params		*/
717#define DIGI_SETAW	(('e'<<8) | 96)		/* Drain & set params	*/
718#define DIGI_SETAF	(('e'<<8) | 97)		/* Drain, flush & set params */
719
720#define DIGI_KME	(('e'<<8) | 98)		/* Read/Write Host	*/
721						/* Adapter Memory	*/
722
723#define	DIGI_GETFLOW	(('e'<<8) | 99)		/* Get startc/stopc flow */
724						/* control characters    */
725#define	DIGI_SETFLOW	(('e'<<8) | 100)	/* Set startc/stopc flow */
726						/* control characters	 */
727#define	DIGI_GETAFLOW	(('e'<<8) | 101)	/* Get Aux. startc/stopc */
728						/* flow control chars    */
729#define	DIGI_SETAFLOW	(('e'<<8) | 102)	/* Set Aux. startc/stopc */
730						/* flow control chars	 */
731
732#define DIGI_GEDELAY	(('d'<<8) | 246)	/* Get edelay */
733#define DIGI_SEDELAY	(('d'<<8) | 247)	/* Set edelay */
734
735struct	digiflow_t {
736	unsigned char	startc;			/* flow cntl start char	*/
737	unsigned char	stopc;			/* flow cntl stop char	*/
738};
739
740#ifdef	FLOW_2200
741#define	F2200_GETA	(('e'<<8) | 104)	/* Get 2x36 flow cntl flags */
742#define	F2200_SETAW	(('e'<<8) | 105)	/* Set 2x36 flow cntl flags */
743#define		F2200_MASK	0x03		/* 2200 flow cntl bit mask  */
744#define		FCNTL_2200	0x01		/* 2x36 terminal flow cntl  */
745#define		PCNTL_2200	0x02		/* 2x36 printer flow cntl   */
746#define	F2200_XON	0xf8
747#define	P2200_XON	0xf9
748#define	F2200_XOFF	0xfa
749#define	P2200_XOFF	0xfb
750
751#define	FXOFF_MASK	0x03			/* 2200 flow status mask    */
752#define	RCVD_FXOFF	0x01			/* 2x36 Terminal XOFF rcvd  */
753#define	RCVD_PXOFF	0x02			/* 2x36 Printer XOFF rcvd   */
754#endif
755
756/************************************************************************
757 * Values for digi_flags
758 ************************************************************************/
759#define DIGI_IXON	0x0001		/* Handle IXON in the FEP	*/
760#define DIGI_FAST	0x0002		/* Fast baud rates		*/
761#define RTSPACE		0x0004		/* RTS input flow control	*/
762#define CTSPACE		0x0008		/* CTS output flow control	*/
763#define DSRPACE		0x0010		/* DSR output flow control	*/
764#define DCDPACE		0x0020		/* DCD output flow control	*/
765#define DTRPACE		0x0040		/* DTR input flow control	*/
766#define DIGI_COOK	0x0080		/* Cooked processing done in FEP */
767#define DIGI_FORCEDCD	0x0100		/* Force carrier		*/
768#define	DIGI_ALTPIN	0x0200		/* Alternate RJ-45 pin config	*/
769#define	DIGI_AIXON	0x0400		/* Aux flow control in fep	*/
770#define	DIGI_PRINTER	0x0800		/* Hold port open for flow cntrl*/
771#define DIGI_PP_INPUT	0x1000		/* Change parallel port to input*/
772#define DIGI_DTR_TOGGLE 0x2000		/* Support DTR Toggle		*/
773#define	DIGI_422	0x4000		/* for 422/232 selectable panel */
774#define DIGI_RTS_TOGGLE	0x8000		/* Support RTS Toggle		*/
775
776/************************************************************************
777 * These options are not supported on the comxi.
778 ************************************************************************/
779#define	DIGI_COMXI	(DIGI_FAST|DIGI_COOK|DSRPACE|DCDPACE|DTRPACE)
780
781#define DIGI_PLEN	28		/* String length		*/
782#define	DIGI_TSIZ	10		/* Terminal string len		*/
783
784/************************************************************************
785 * Structure used with ioctl commands for DIGI parameters.
786 ************************************************************************/
787struct digi_t {
788	unsigned short	digi_flags;		/* Flags (see above)	*/
789	unsigned short	digi_maxcps;		/* Max printer CPS	*/
790	unsigned short	digi_maxchar;		/* Max chars in print queue */
791	unsigned short	digi_bufsize;		/* Buffer size		*/
792	unsigned char	digi_onlen;		/* Length of ON string	*/
793	unsigned char	digi_offlen;		/* Length of OFF string	*/
794	char		digi_onstr[DIGI_PLEN];	/* Printer on string	*/
795	char		digi_offstr[DIGI_PLEN];	/* Printer off string	*/
796	char		digi_term[DIGI_TSIZ];	/* terminal string	*/
797};
798
799/************************************************************************
800 * KME definitions and structures.
801 ************************************************************************/
802#define	RW_IDLE		0	/* Operation complete			*/
803#define	RW_READ		1	/* Read Concentrator Memory		*/
804#define	RW_WRITE	2	/* Write Concentrator Memory		*/
805
806struct rw_t {
807	unsigned char	rw_req;		/* Request type			*/
808	unsigned char	rw_board;	/* Host Adapter board number	*/
809	unsigned char	rw_conc;	/* Concentrator number		*/
810	unsigned char	rw_reserved;	/* Reserved for expansion	*/
811	unsigned long	rw_addr;	/* Address in concentrator	*/
812	unsigned short	rw_size;	/* Read/write request length	*/
813	unsigned char	rw_data[128];	/* Data to read/write		*/
814};
815
816/************************************************************************
817 * Structure to get driver status information
818 ************************************************************************/
819struct digi_dinfo {
820	unsigned long	dinfo_nboards;		/* # boards configured	*/
821	char		dinfo_reserved[12];	/* for future expansion */
822	char		dinfo_version[16];	/* driver version       */
823};
824
825#define	DIGI_GETDD	(('d'<<8) | 248)	/* get driver info      */
826
827/************************************************************************
828 * Structure used with ioctl commands for per-board information
829 *
830 * physsize and memsize differ when board has "windowed" memory
831 ************************************************************************/
832struct digi_info {
833	unsigned long	info_bdnum;		/* Board number (0 based)  */
834	unsigned long	info_ioport;		/* io port address         */
835	unsigned long	info_physaddr;		/* memory address          */
836	unsigned long	info_physsize;		/* Size of host mem window */
837	unsigned long	info_memsize;		/* Amount of dual-port mem */
838						/* on board                */
839	unsigned short	info_bdtype;		/* Board type              */
840	unsigned short	info_nports;		/* number of ports         */
841	char		info_bdstate;		/* board state             */
842	char		info_reserved[7];	/* for future expansion    */
843};
844
845#define	DIGI_GETBD	(('d'<<8) | 249)	/* get board info          */
846
847struct digi_stat {
848	unsigned int	info_chan;		/* Channel number (0 based)  */
849	unsigned int	info_brd;		/* Board number (0 based)  */
850	unsigned long	info_cflag;		/* cflag for channel       */
851	unsigned long	info_iflag;		/* iflag for channel       */
852	unsigned long	info_oflag;		/* oflag for channel       */
853	unsigned long	info_mstat;		/* mstat for channel       */
854	unsigned long	info_tx_data;		/* tx_data for channel       */
855	unsigned long	info_rx_data;		/* rx_data for channel       */
856	unsigned long	info_hflow;		/* hflow for channel       */
857	unsigned long	info_reserved[8];	/* for future expansion    */
858};
859
860#define	DIGI_GETSTAT	(('d'<<8) | 244)	/* get board info          */
861/************************************************************************
862 *
863 * Structure used with ioctl commands for per-channel information
864 *
865 ************************************************************************/
866struct digi_ch {
867	unsigned long	info_bdnum;		/* Board number (0 based)  */
868	unsigned long	info_channel;		/* Channel index number    */
869	unsigned long	info_ch_cflag;		/* Channel cflag           */
870	unsigned long	info_ch_iflag;		/* Channel iflag           */
871	unsigned long	info_ch_oflag;		/* Channel oflag           */
872	unsigned long	info_chsize;		/* Channel structure size  */
873	unsigned long	info_sleep_stat;	/* sleep status		   */
874	dev_t		info_dev;		/* device number	   */
875	unsigned char	info_initstate;		/* Channel init state	   */
876	unsigned char	info_running;		/* Channel running state   */
877	long		reserved[8];		/* reserved for future use */
878};
879
880/*
881* This structure is used with the DIGI_FEPCMD ioctl to
882* tell the driver which port to send the command for.
883*/
884struct digi_cmd {
885	int	cmd;
886	int	word;
887	int	ncmds;
888	int	chan; /* channel index (zero based) */
889	int	bdid; /* board index (zero based) */
890};
891
892/*
893*  info_sleep_stat defines
894*/
895#define INFO_RUNWAIT	0x0001
896#define INFO_WOPEN	0x0002
897#define INFO_TTIOW	0x0004
898#define INFO_CH_RWAIT	0x0008
899#define INFO_CH_WEMPTY	0x0010
900#define INFO_CH_WLOW	0x0020
901#define INFO_XXBUF_BUSY 0x0040
902
903#define	DIGI_GETCH	(('d'<<8) | 245)	/* get board info          */
904
905/* Board type definitions */
906
907#define	SUBTYPE		0007
908#define	T_PCXI		0000
909#define T_PCXM		0001
910#define T_PCXE		0002
911#define T_PCXR		0003
912#define T_SP		0004
913#define T_SP_PLUS	0005
914#	define T_HERC	0000
915#	define T_HOU	0001
916#	define T_LON	0002
917#	define T_CHA	0003
918#define FAMILY		0070
919#define T_COMXI		0000
920#define T_PCXX		0010
921#define T_CX		0020
922#define T_EPC		0030
923#define	T_PCLITE	0040
924#define	T_SPXX		0050
925#define	T_AVXX		0060
926#define T_DXB		0070
927#define T_A2K_4_8	0070
928#define BUSTYPE		0700
929#define T_ISABUS	0000
930#define T_MCBUS		0100
931#define	T_EISABUS	0200
932#define	T_PCIBUS	0400
933
934/* Board State Definitions */
935
936#define	BD_RUNNING	0x0
937#define	BD_REASON	0x7f
938#define	BD_NOTFOUND	0x1
939#define	BD_NOIOPORT	0x2
940#define	BD_NOMEM	0x3
941#define	BD_NOBIOS	0x4
942#define	BD_NOFEP	0x5
943#define	BD_FAILED	0x6
944#define BD_ALLOCATED	0x7
945#define BD_TRIBOOT	0x8
946#define	BD_BADKME	0x80
947
948#define DIGI_LOOPBACK	(('d'<<8) | 252)	/* Enable/disable UART  */
949						/* internal loopback    */
950#define DIGI_SPOLL	(('d'<<8) | 254)	/* change poller rate   */
951
952#define DIGI_SETCUSTOMBAUD _IOW('e', 106, int)	/* Set integer baud rate */
953#define DIGI_GETCUSTOMBAUD _IOR('e', 107, int)	/* Get integer baud rate */
954#define DIGI_RESET_PORT	   (('e'<<8) | 93)	/* Reset port		 */
955
956/************************************************************************
957 * Channel information structure.
958 ************************************************************************/
959struct channel_t {
960	int magic;			/* Channel Magic Number		*/
961	struct bs_t __iomem *ch_bs;	/* Base structure pointer       */
962	struct cm_t __iomem *ch_cm;	/* Command queue pointer        */
963	struct board_t *ch_bd;		/* Board structure pointer      */
964	u8 __iomem *ch_vaddr;		/* FEP memory origin            */
965	u8 __iomem *ch_taddr;		/* Write buffer origin          */
966	u8 __iomem *ch_raddr;		/* Read buffer origin           */
967	struct digi_t  ch_digi;		/* Transparent Print structure  */
968	struct un_t ch_tun;		/* Terminal unit info           */
969	struct un_t ch_pun;		/* Printer unit info            */
970
971	spinlock_t	ch_lock;	/* provide for serialization */
972	wait_queue_head_t ch_flags_wait;
973
974	u32	pscan_state;
975	u8	pscan_savechar;
976
977	u32 ch_portnum;			/* Port number, 0 offset.	*/
978	u32 ch_open_count;		/* open count			*/
979	u32	ch_flags;		/* Channel flags                */
980
981	u32	ch_cpstime;		/* Time for CPS calculations    */
982
983	tcflag_t ch_c_iflag;		/* channel iflags               */
984	tcflag_t ch_c_cflag;		/* channel cflags               */
985	tcflag_t ch_c_oflag;		/* channel oflags               */
986	tcflag_t ch_c_lflag;		/* channel lflags               */
987
988	u16  ch_fepiflag;		/* FEP tty iflags               */
989	u16  ch_fepcflag;		/* FEP tty cflags               */
990	u16  ch_fepoflag;		/* FEP tty oflags               */
991	u16  ch_wopen;			/* Waiting for open process cnt */
992	u16  ch_tstart;			/* Transmit buffer start        */
993	u16  ch_tsize;			/* Transmit buffer size         */
994	u16  ch_rstart;			/* Receive buffer start         */
995	u16  ch_rsize;			/* Receive buffer size          */
996	u16  ch_rdelay;			/* Receive delay time           */
997
998	u16	ch_tlw;			/* Our currently set low water mark */
999
1000	u16  ch_cook;			/* Output character mask        */
1001
1002	u8   ch_card;			/* Card channel is on           */
1003	u8   ch_stopc;			/* Stop character               */
1004	u8   ch_startc;			/* Start character              */
1005
1006	u8   ch_mostat;			/* FEP output modem status      */
1007	u8   ch_mistat;			/* FEP input modem status       */
1008	u8   ch_mforce;			/* Modem values to be forced    */
1009	u8   ch_mval;			/* Force values                 */
1010	u8   ch_fepstopc;		/* FEP stop character           */
1011	u8   ch_fepstartc;		/* FEP start character          */
1012
1013	u8   ch_astopc;			/* Auxiliary Stop character     */
1014	u8   ch_astartc;		/* Auxiliary Start character    */
1015	u8   ch_fepastopc;		/* Auxiliary FEP stop char      */
1016	u8   ch_fepastartc;		/* Auxiliary FEP start char     */
1017
1018	u8   ch_hflow;			/* FEP hardware handshake       */
1019	u8   ch_dsr;			/* stores real dsr value        */
1020	u8   ch_cd;			/* stores real cd value         */
1021	u8   ch_tx_win;			/* channel tx buffer window     */
1022	u8   ch_rx_win;			/* channel rx buffer window     */
1023	uint	ch_custom_speed;	/* Custom baud, if set		*/
1024	uint	ch_baud_info;		/* Current baud info for /proc output */
1025	ulong	ch_rxcount;		/* total of data received so far      */
1026	ulong	ch_txcount;		/* total of data transmitted so far   */
1027	ulong	ch_err_parity;		/* Count of parity errors on channel  */
1028	ulong	ch_err_frame;		/* Count of framing errors on channel */
1029	ulong	ch_err_break;		/* Count of breaks on channel	*/
1030	ulong	ch_err_overrun;		/* Count of overruns on channel	*/
1031};
1032
1033/************************************************************************
1034 * Command structure definition.
1035 ************************************************************************/
1036struct cm_t {
1037	unsigned short cm_head;		/* Command buffer head offset */
1038	unsigned short cm_tail;		/* Command buffer tail offset */
1039	unsigned short cm_start;	/* start offset of buffer     */
1040	unsigned short cm_max;		/* last offset of buffer      */
1041};
1042
1043/************************************************************************
1044 * Event structure definition.
1045 ************************************************************************/
1046struct ev_t {
1047	unsigned short ev_head;		/* Command buffer head offset */
1048	unsigned short ev_tail;		/* Command buffer tail offset */
1049	unsigned short ev_start;	/* start offset of buffer     */
1050	unsigned short ev_max;		/* last offset of buffer      */
1051};
1052
1053/************************************************************************
1054 * Download buffer structure.
1055 ************************************************************************/
1056struct downld_t {
1057	u8	dl_type;		/* Header                       */
1058	u8	dl_seq;			/* Download sequence            */
1059	ushort	dl_srev;		/* Software revision number     */
1060	ushort	dl_lrev;		/* Low revision number          */
1061	ushort	dl_hrev;		/* High revision number         */
1062	ushort	dl_seg;			/* Start segment address        */
1063	ushort	dl_size;		/* Number of bytes to download  */
1064	u8	dl_data[1024];		/* Download data                */
1065};
1066
1067/************************************************************************
1068 * Per channel buffer structure
1069 ************************************************************************
1070 *              Base Structure Entries Usage Meanings to Host           *
1071 *                                                                      *
1072 *        W = read write        R = read only                           *
1073 *        C = changed by commands only                                  *
1074 *        U = unknown (may be changed w/o notice)                       *
1075 ************************************************************************/
1076struct bs_t {
1077	unsigned short  tp_jmp;		/* Transmit poll jump	 */
1078	unsigned short  tc_jmp;		/* Cooked procedure jump */
1079	unsigned short  ri_jmp;		/* Not currently used	 */
1080	unsigned short  rp_jmp;		/* Receive poll jump	 */
1081
1082	unsigned short  tx_seg;		/* W Tx segment	 */
1083	unsigned short  tx_head;	/* W Tx buffer head offset */
1084	unsigned short  tx_tail;	/* R Tx buffer tail offset */
1085	unsigned short  tx_max;		/* W Tx buffer size - 1    */
1086
1087	unsigned short  rx_seg;		/* W Rx segment	    */
1088	unsigned short  rx_head;	/* W Rx buffer head offset */
1089	unsigned short  rx_tail;	/* R Rx buffer tail offset */
1090	unsigned short  rx_max;		/* W Rx buffer size - 1    */
1091
1092	unsigned short  tx_lw;		/* W Tx buffer low water mark */
1093	unsigned short  rx_lw;		/* W Rx buffer low water mark */
1094	unsigned short  rx_hw;		/* W Rx buffer high water mark*/
1095	unsigned short  incr;		/* W Increment to next channel*/
1096
1097	unsigned short  fepdev;		/* U SCC device base address  */
1098	unsigned short  edelay;		/* W Exception delay          */
1099	unsigned short  blen;		/* W Break length             */
1100	unsigned short  btime;		/* U Break complete time      */
1101
1102	unsigned short  iflag;		/* C UNIX input flags         */
1103	unsigned short  oflag;		/* C UNIX output flags        */
1104	unsigned short  cflag;		/* C UNIX control flags       */
1105	unsigned short  wfill[13];	/* U Reserved for expansion   */
1106
1107	unsigned char   num;		/* U Channel number           */
1108	unsigned char   ract;		/* U Receiver active counter  */
1109	unsigned char   bstat;		/* U Break status bits        */
1110	unsigned char   tbusy;		/* W Transmit busy            */
1111	unsigned char   iempty;		/* W Transmit empty event     */
1112					/* enable                     */
1113	unsigned char   ilow;		/* W Transmit low-water event */
1114					/* enable                     */
1115	unsigned char   idata;		/* W Receive data interrupt   */
1116					/* enable                     */
1117	unsigned char   eflag;		/* U Host event flags         */
1118
1119	unsigned char   tflag;		/* U Transmit flags           */
1120	unsigned char   rflag;		/* U Receive flags            */
1121	unsigned char   xmask;		/* U Transmit ready flags     */
1122	unsigned char   xval;		/* U Transmit ready value     */
1123	unsigned char   m_stat;		/* RC Modem status bits       */
1124	unsigned char   m_change;	/* U Modem bits which changed */
1125	unsigned char   m_int;		/* W Modem interrupt enable   */
1126					/* bits                       */
1127	unsigned char   m_last;		/* U Last modem status        */
1128
1129	unsigned char   mtran;		/* C Unreported modem trans   */
1130	unsigned char   orun;		/* C Buffer overrun occurred  */
1131	unsigned char   astartc;	/* W Auxiliary Xon char       */
1132	unsigned char   astopc;		/* W Auxiliary Xoff char      */
1133	unsigned char   startc;		/* W Xon character            */
1134	unsigned char   stopc;		/* W Xoff character           */
1135	unsigned char   vnextc;		/* W Vnext character          */
1136	unsigned char   hflow;		/* C Software flow control    */
1137
1138	unsigned char   fillc;		/* U Delay Fill character     */
1139	unsigned char   ochar;		/* U Saved output character   */
1140	unsigned char   omask;		/* U Output character mask    */
1141
1142	unsigned char   bfill[13];	/* U Reserved for expansion   */
1143
1144	unsigned char   scc[16];	/* U SCC registers            */
1145};
1146
1147struct cnode {
1148	struct cnode *next;
1149	int type;
1150	int numbrd;
1151
1152	union {
1153		struct {
1154			char  type;	/* Board Type           */
1155			long  port;	/* I/O Address		*/
1156			char  *portstr; /* I/O Address in string */
1157			long  addr;	/* Memory Address	*/
1158			char  *addrstr; /* Memory Address in string */
1159			long  pcibus;	/* PCI BUS		*/
1160			char  *pcibusstr; /* PCI BUS in string */
1161			long  pcislot;	/* PCI SLOT		*/
1162			char  *pcislotstr; /* PCI SLOT in string */
1163			long  nport;	/* Number of Ports	*/
1164			char  *id;	/* tty id		*/
1165			long  start;	/* start of tty counting */
1166			char  *method;  /* Install method       */
1167			char  v_port;
1168			char  v_addr;
1169			char  v_pcibus;
1170			char  v_pcislot;
1171			char  v_nport;
1172			char  v_id;
1173			char  v_start;
1174			char  v_method;
1175			char  line1;
1176			char  line2;
1177			char  conc1;   /* total concs in line1 */
1178			char  conc2;   /* total concs in line2 */
1179			char  module1; /* total modules for line1 */
1180			char  module2; /* total modules for line2 */
1181			char  *status; /* config status */
1182			char  *dimstatus;	 /* Y/N */
1183			int   status_index; /* field pointer */
1184		} board;
1185
1186		struct {
1187			char  *cable;
1188			char  v_cable;
1189			long  speed;
1190			char  v_speed;
1191		} line;
1192
1193		struct {
1194			char  type;
1195			char  *connect;
1196			long  speed;
1197			long  nport;
1198			char  *id;
1199			char  *idstr;
1200			long  start;
1201			char  v_connect;
1202			char  v_speed;
1203			char  v_nport;
1204			char  v_id;
1205			char  v_start;
1206		} conc;
1207
1208		struct {
1209			char type;
1210			long nport;
1211			char *id;
1212			char *idstr;
1213			long start;
1214			char v_nport;
1215			char v_id;
1216			char v_start;
1217		} module;
1218
1219		char *ttyname;
1220		char *cuname;
1221		char *printname;
1222		long majornumber;
1223		long altpin;
1224		long ttysize;
1225		long chsize;
1226		long bssize;
1227		long unsize;
1228		long f2size;
1229		long vpixsize;
1230		long useintr;
1231	} u;
1232};
1233#endif
1234