1/*
2 * I2O kernel space accessible structures/APIs
3 *
4 * (c) Copyright 1999, 2000 Red Hat Software
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 *************************************************************************
12 *
13 * This header file defined the I2O APIs/structures for use by
14 * the I2O kernel modules.
15 *
16 */
17
18#ifndef _I2O_H
19#define _I2O_H
20
21#include <linux/i2o-dev.h>
22
23/* How many different OSM's are we allowing */
24#define I2O_MAX_DRIVERS		8
25
26#include <linux/pci.h>
27#include <linux/bug.h>
28#include <linux/dma-mapping.h>
29#include <linux/string.h>
30#include <linux/slab.h>
31#include <linux/workqueue.h>	/* work_struct */
32#include <linux/mempool.h>
33#include <linux/mutex.h>
34#include <linux/scatterlist.h>
35#include <linux/semaphore.h>	/* Needed for MUTEX init macros */
36
37#include <asm/io.h>
38
39/* message queue empty */
40#define I2O_QUEUE_EMPTY		0xffffffff
41
42/*
43 *	Cache strategies
44 */
45
46/*	The NULL strategy leaves everything up to the controller. This tends to be a
47 *	pessimal but functional choice.
48 */
49#define CACHE_NULL		0
50/*	Prefetch data when reading. We continually attempt to load the next 32 sectors
51 *	into the controller cache.
52 */
53#define CACHE_PREFETCH		1
54/*	Prefetch data when reading. We sometimes attempt to load the next 32 sectors
55 *	into the controller cache. When an I/O is less <= 8K we assume its probably
56 *	not sequential and don't prefetch (default)
57 */
58#define CACHE_SMARTFETCH	2
59/*	Data is written to the cache and then out on to the disk. The I/O must be
60 *	physically on the medium before the write is acknowledged (default without
61 *	NVRAM)
62 */
63#define CACHE_WRITETHROUGH	17
64/*	Data is written to the cache and then out on to the disk. The controller
65 *	is permitted to write back the cache any way it wants. (default if battery
66 *	backed NVRAM is present). It can be useful to set this for swap regardless of
67 *	battery state.
68 */
69#define CACHE_WRITEBACK		18
70/*	Optimise for under powered controllers, especially on RAID1 and RAID0. We
71 *	write large I/O's directly to disk bypassing the cache to avoid the extra
72 *	memory copy hits. Small writes are writeback cached
73 */
74#define CACHE_SMARTBACK		19
75/*	Optimise for under powered controllers, especially on RAID1 and RAID0. We
76 *	write large I/O's directly to disk bypassing the cache to avoid the extra
77 *	memory copy hits. Small writes are writethrough cached. Suitable for devices
78 *	lacking battery backup
79 */
80#define CACHE_SMARTTHROUGH	20
81
82/*
83 *	Ioctl structures
84 */
85
86#define 	BLKI2OGRSTRAT	_IOR('2', 1, int)
87#define 	BLKI2OGWSTRAT	_IOR('2', 2, int)
88#define 	BLKI2OSRSTRAT	_IOW('2', 3, int)
89#define 	BLKI2OSWSTRAT	_IOW('2', 4, int)
90
91/*
92 *	I2O Function codes
93 */
94
95/*
96 *	Executive Class
97 */
98#define	I2O_CMD_ADAPTER_ASSIGN		0xB3
99#define	I2O_CMD_ADAPTER_READ		0xB2
100#define	I2O_CMD_ADAPTER_RELEASE		0xB5
101#define	I2O_CMD_BIOS_INFO_SET		0xA5
102#define	I2O_CMD_BOOT_DEVICE_SET		0xA7
103#define	I2O_CMD_CONFIG_VALIDATE		0xBB
104#define	I2O_CMD_CONN_SETUP		0xCA
105#define	I2O_CMD_DDM_DESTROY		0xB1
106#define	I2O_CMD_DDM_ENABLE		0xD5
107#define	I2O_CMD_DDM_QUIESCE		0xC7
108#define	I2O_CMD_DDM_RESET		0xD9
109#define	I2O_CMD_DDM_SUSPEND		0xAF
110#define	I2O_CMD_DEVICE_ASSIGN		0xB7
111#define	I2O_CMD_DEVICE_RELEASE		0xB9
112#define	I2O_CMD_HRT_GET			0xA8
113#define	I2O_CMD_ADAPTER_CLEAR		0xBE
114#define	I2O_CMD_ADAPTER_CONNECT		0xC9
115#define	I2O_CMD_ADAPTER_RESET		0xBD
116#define	I2O_CMD_LCT_NOTIFY		0xA2
117#define	I2O_CMD_OUTBOUND_INIT		0xA1
118#define	I2O_CMD_PATH_ENABLE		0xD3
119#define	I2O_CMD_PATH_QUIESCE		0xC5
120#define	I2O_CMD_PATH_RESET		0xD7
121#define	I2O_CMD_STATIC_MF_CREATE	0xDD
122#define	I2O_CMD_STATIC_MF_RELEASE	0xDF
123#define	I2O_CMD_STATUS_GET		0xA0
124#define	I2O_CMD_SW_DOWNLOAD		0xA9
125#define	I2O_CMD_SW_UPLOAD		0xAB
126#define	I2O_CMD_SW_REMOVE		0xAD
127#define	I2O_CMD_SYS_ENABLE		0xD1
128#define	I2O_CMD_SYS_MODIFY		0xC1
129#define	I2O_CMD_SYS_QUIESCE		0xC3
130#define	I2O_CMD_SYS_TAB_SET		0xA3
131
132/*
133 * Utility Class
134 */
135#define I2O_CMD_UTIL_NOP		0x00
136#define I2O_CMD_UTIL_ABORT		0x01
137#define I2O_CMD_UTIL_CLAIM		0x09
138#define I2O_CMD_UTIL_RELEASE		0x0B
139#define I2O_CMD_UTIL_PARAMS_GET		0x06
140#define I2O_CMD_UTIL_PARAMS_SET		0x05
141#define I2O_CMD_UTIL_EVT_REGISTER	0x13
142#define I2O_CMD_UTIL_EVT_ACK		0x14
143#define I2O_CMD_UTIL_CONFIG_DIALOG	0x10
144#define I2O_CMD_UTIL_DEVICE_RESERVE	0x0D
145#define I2O_CMD_UTIL_DEVICE_RELEASE	0x0F
146#define I2O_CMD_UTIL_LOCK		0x17
147#define I2O_CMD_UTIL_LOCK_RELEASE	0x19
148#define I2O_CMD_UTIL_REPLY_FAULT_NOTIFY	0x15
149
150/*
151 * SCSI Host Bus Adapter Class
152 */
153#define I2O_CMD_SCSI_EXEC		0x81
154#define I2O_CMD_SCSI_ABORT		0x83
155#define I2O_CMD_SCSI_BUSRESET		0x27
156
157/*
158 * Bus Adapter Class
159 */
160#define I2O_CMD_BUS_ADAPTER_RESET	0x85
161#define I2O_CMD_BUS_RESET		0x87
162#define I2O_CMD_BUS_SCAN		0x89
163#define I2O_CMD_BUS_QUIESCE		0x8b
164
165/*
166 * Random Block Storage Class
167 */
168#define I2O_CMD_BLOCK_READ		0x30
169#define I2O_CMD_BLOCK_WRITE		0x31
170#define I2O_CMD_BLOCK_CFLUSH		0x37
171#define I2O_CMD_BLOCK_MLOCK		0x49
172#define I2O_CMD_BLOCK_MUNLOCK		0x4B
173#define I2O_CMD_BLOCK_MMOUNT		0x41
174#define I2O_CMD_BLOCK_MEJECT		0x43
175#define I2O_CMD_BLOCK_POWER		0x70
176
177#define I2O_CMD_PRIVATE			0xFF
178
179/* Command status values  */
180
181#define I2O_CMD_IN_PROGRESS	0x01
182#define I2O_CMD_REJECTED	0x02
183#define I2O_CMD_FAILED		0x03
184#define I2O_CMD_COMPLETED	0x04
185
186/* I2O API function return values */
187
188#define I2O_RTN_NO_ERROR			0
189#define I2O_RTN_NOT_INIT			1
190#define I2O_RTN_FREE_Q_EMPTY			2
191#define I2O_RTN_TCB_ERROR			3
192#define I2O_RTN_TRANSACTION_ERROR		4
193#define I2O_RTN_ADAPTER_ALREADY_INIT		5
194#define I2O_RTN_MALLOC_ERROR			6
195#define I2O_RTN_ADPTR_NOT_REGISTERED		7
196#define I2O_RTN_MSG_REPLY_TIMEOUT		8
197#define I2O_RTN_NO_STATUS			9
198#define I2O_RTN_NO_FIRM_VER			10
199#define	I2O_RTN_NO_LINK_SPEED			11
200
201/* Reply message status defines for all messages */
202
203#define I2O_REPLY_STATUS_SUCCESS                    	0x00
204#define I2O_REPLY_STATUS_ABORT_DIRTY                	0x01
205#define I2O_REPLY_STATUS_ABORT_NO_DATA_TRANSFER     	0x02
206#define	I2O_REPLY_STATUS_ABORT_PARTIAL_TRANSFER		0x03
207#define	I2O_REPLY_STATUS_ERROR_DIRTY			0x04
208#define	I2O_REPLY_STATUS_ERROR_NO_DATA_TRANSFER		0x05
209#define	I2O_REPLY_STATUS_ERROR_PARTIAL_TRANSFER		0x06
210#define	I2O_REPLY_STATUS_PROCESS_ABORT_DIRTY		0x08
211#define	I2O_REPLY_STATUS_PROCESS_ABORT_NO_DATA_TRANSFER	0x09
212#define	I2O_REPLY_STATUS_PROCESS_ABORT_PARTIAL_TRANSFER	0x0A
213#define	I2O_REPLY_STATUS_TRANSACTION_ERROR		0x0B
214#define	I2O_REPLY_STATUS_PROGRESS_REPORT		0x80
215
216/* Status codes and Error Information for Parameter functions */
217
218#define I2O_PARAMS_STATUS_SUCCESS		0x00
219#define I2O_PARAMS_STATUS_BAD_KEY_ABORT		0x01
220#define I2O_PARAMS_STATUS_BAD_KEY_CONTINUE   	0x02
221#define I2O_PARAMS_STATUS_BUFFER_FULL		0x03
222#define I2O_PARAMS_STATUS_BUFFER_TOO_SMALL	0x04
223#define I2O_PARAMS_STATUS_FIELD_UNREADABLE	0x05
224#define I2O_PARAMS_STATUS_FIELD_UNWRITEABLE	0x06
225#define I2O_PARAMS_STATUS_INSUFFICIENT_FIELDS	0x07
226#define I2O_PARAMS_STATUS_INVALID_GROUP_ID	0x08
227#define I2O_PARAMS_STATUS_INVALID_OPERATION	0x09
228#define I2O_PARAMS_STATUS_NO_KEY_FIELD		0x0A
229#define I2O_PARAMS_STATUS_NO_SUCH_FIELD		0x0B
230#define I2O_PARAMS_STATUS_NON_DYNAMIC_GROUP	0x0C
231#define I2O_PARAMS_STATUS_OPERATION_ERROR	0x0D
232#define I2O_PARAMS_STATUS_SCALAR_ERROR		0x0E
233#define I2O_PARAMS_STATUS_TABLE_ERROR		0x0F
234#define I2O_PARAMS_STATUS_WRONG_GROUP_TYPE	0x10
235
236/* DetailedStatusCode defines for Executive, DDM, Util and Transaction error
237 * messages: Table 3-2 Detailed Status Codes.*/
238
239#define I2O_DSC_SUCCESS                        0x0000
240#define I2O_DSC_BAD_KEY                        0x0002
241#define I2O_DSC_TCL_ERROR                      0x0003
242#define I2O_DSC_REPLY_BUFFER_FULL              0x0004
243#define I2O_DSC_NO_SUCH_PAGE                   0x0005
244#define I2O_DSC_INSUFFICIENT_RESOURCE_SOFT     0x0006
245#define I2O_DSC_INSUFFICIENT_RESOURCE_HARD     0x0007
246#define I2O_DSC_CHAIN_BUFFER_TOO_LARGE         0x0009
247#define I2O_DSC_UNSUPPORTED_FUNCTION           0x000A
248#define I2O_DSC_DEVICE_LOCKED                  0x000B
249#define I2O_DSC_DEVICE_RESET                   0x000C
250#define I2O_DSC_INAPPROPRIATE_FUNCTION         0x000D
251#define I2O_DSC_INVALID_INITIATOR_ADDRESS      0x000E
252#define I2O_DSC_INVALID_MESSAGE_FLAGS          0x000F
253#define I2O_DSC_INVALID_OFFSET                 0x0010
254#define I2O_DSC_INVALID_PARAMETER              0x0011
255#define I2O_DSC_INVALID_REQUEST                0x0012
256#define I2O_DSC_INVALID_TARGET_ADDRESS         0x0013
257#define I2O_DSC_MESSAGE_TOO_LARGE              0x0014
258#define I2O_DSC_MESSAGE_TOO_SMALL              0x0015
259#define I2O_DSC_MISSING_PARAMETER              0x0016
260#define I2O_DSC_TIMEOUT                        0x0017
261#define I2O_DSC_UNKNOWN_ERROR                  0x0018
262#define I2O_DSC_UNKNOWN_FUNCTION               0x0019
263#define I2O_DSC_UNSUPPORTED_VERSION            0x001A
264#define I2O_DSC_DEVICE_BUSY                    0x001B
265#define I2O_DSC_DEVICE_NOT_AVAILABLE           0x001C
266
267/* DetailedStatusCode defines for Block Storage Operation: Table 6-7 Detailed
268   Status Codes.*/
269
270#define I2O_BSA_DSC_SUCCESS               0x0000
271#define I2O_BSA_DSC_MEDIA_ERROR           0x0001
272#define I2O_BSA_DSC_ACCESS_ERROR          0x0002
273#define I2O_BSA_DSC_DEVICE_FAILURE        0x0003
274#define I2O_BSA_DSC_DEVICE_NOT_READY      0x0004
275#define I2O_BSA_DSC_MEDIA_NOT_PRESENT     0x0005
276#define I2O_BSA_DSC_MEDIA_LOCKED          0x0006
277#define I2O_BSA_DSC_MEDIA_FAILURE         0x0007
278#define I2O_BSA_DSC_PROTOCOL_FAILURE      0x0008
279#define I2O_BSA_DSC_BUS_FAILURE           0x0009
280#define I2O_BSA_DSC_ACCESS_VIOLATION      0x000A
281#define I2O_BSA_DSC_WRITE_PROTECTED       0x000B
282#define I2O_BSA_DSC_DEVICE_RESET          0x000C
283#define I2O_BSA_DSC_VOLUME_CHANGED        0x000D
284#define I2O_BSA_DSC_TIMEOUT               0x000E
285
286/* FailureStatusCodes, Table 3-3 Message Failure Codes */
287
288#define I2O_FSC_TRANSPORT_SERVICE_SUSPENDED             0x81
289#define I2O_FSC_TRANSPORT_SERVICE_TERMINATED            0x82
290#define I2O_FSC_TRANSPORT_CONGESTION                    0x83
291#define I2O_FSC_TRANSPORT_FAILURE                       0x84
292#define I2O_FSC_TRANSPORT_STATE_ERROR                   0x85
293#define I2O_FSC_TRANSPORT_TIME_OUT                      0x86
294#define I2O_FSC_TRANSPORT_ROUTING_FAILURE               0x87
295#define I2O_FSC_TRANSPORT_INVALID_VERSION               0x88
296#define I2O_FSC_TRANSPORT_INVALID_OFFSET                0x89
297#define I2O_FSC_TRANSPORT_INVALID_MSG_FLAGS             0x8A
298#define I2O_FSC_TRANSPORT_FRAME_TOO_SMALL               0x8B
299#define I2O_FSC_TRANSPORT_FRAME_TOO_LARGE               0x8C
300#define I2O_FSC_TRANSPORT_INVALID_TARGET_ID             0x8D
301#define I2O_FSC_TRANSPORT_INVALID_INITIATOR_ID          0x8E
302#define I2O_FSC_TRANSPORT_INVALID_INITIATOR_CONTEXT     0x8F
303#define I2O_FSC_TRANSPORT_UNKNOWN_FAILURE               0xFF
304
305/* Device Claim Types */
306#define	I2O_CLAIM_PRIMARY					0x01000000
307#define	I2O_CLAIM_MANAGEMENT					0x02000000
308#define	I2O_CLAIM_AUTHORIZED					0x03000000
309#define	I2O_CLAIM_SECONDARY					0x04000000
310
311/* Message header defines for VersionOffset */
312#define I2OVER15	0x0001
313#define I2OVER20	0x0002
314
315/* Default is 1.5 */
316#define I2OVERSION	I2OVER15
317
318#define SGL_OFFSET_0    I2OVERSION
319#define SGL_OFFSET_4    (0x0040 | I2OVERSION)
320#define SGL_OFFSET_5    (0x0050 | I2OVERSION)
321#define SGL_OFFSET_6    (0x0060 | I2OVERSION)
322#define SGL_OFFSET_7    (0x0070 | I2OVERSION)
323#define SGL_OFFSET_8    (0x0080 | I2OVERSION)
324#define SGL_OFFSET_9    (0x0090 | I2OVERSION)
325#define SGL_OFFSET_10   (0x00A0 | I2OVERSION)
326#define SGL_OFFSET_11   (0x00B0 | I2OVERSION)
327#define SGL_OFFSET_12   (0x00C0 | I2OVERSION)
328#define SGL_OFFSET(x)   (((x)<<4) | I2OVERSION)
329
330/* Transaction Reply Lists (TRL) Control Word structure */
331#define TRL_SINGLE_FIXED_LENGTH		0x00
332#define TRL_SINGLE_VARIABLE_LENGTH	0x40
333#define TRL_MULTIPLE_FIXED_LENGTH	0x80
334
335 /* msg header defines for MsgFlags */
336#define MSG_STATIC	0x0100
337#define MSG_64BIT_CNTXT	0x0200
338#define MSG_MULTI_TRANS	0x1000
339#define MSG_FAIL	0x2000
340#define MSG_FINAL	0x4000
341#define MSG_REPLY	0x8000
342
343 /* minimum size msg */
344#define THREE_WORD_MSG_SIZE	0x00030000
345#define FOUR_WORD_MSG_SIZE	0x00040000
346#define FIVE_WORD_MSG_SIZE	0x00050000
347#define SIX_WORD_MSG_SIZE	0x00060000
348#define SEVEN_WORD_MSG_SIZE	0x00070000
349#define EIGHT_WORD_MSG_SIZE	0x00080000
350#define NINE_WORD_MSG_SIZE	0x00090000
351#define TEN_WORD_MSG_SIZE	0x000A0000
352#define ELEVEN_WORD_MSG_SIZE	0x000B0000
353#define I2O_MESSAGE_SIZE(x)	((x)<<16)
354
355/* special TID assignments */
356#define ADAPTER_TID		0
357#define HOST_TID		1
358
359/* outbound queue defines */
360#define I2O_MAX_OUTBOUND_MSG_FRAMES	128
361#define I2O_OUTBOUND_MSG_FRAME_SIZE	128	/* in 32-bit words */
362
363/* inbound queue definitions */
364#define I2O_MSG_INPOOL_MIN		32
365#define I2O_INBOUND_MSG_FRAME_SIZE	128	/* in 32-bit words */
366
367#define I2O_POST_WAIT_OK	0
368#define I2O_POST_WAIT_TIMEOUT	-ETIMEDOUT
369
370#define I2O_CONTEXT_LIST_MIN_LENGTH	15
371#define I2O_CONTEXT_LIST_USED		0x01
372#define I2O_CONTEXT_LIST_DELETED	0x02
373
374/* timeouts */
375#define I2O_TIMEOUT_INIT_OUTBOUND_QUEUE	15
376#define I2O_TIMEOUT_MESSAGE_GET		5
377#define I2O_TIMEOUT_RESET		30
378#define I2O_TIMEOUT_STATUS_GET		5
379#define I2O_TIMEOUT_LCT_GET		360
380#define I2O_TIMEOUT_SCSI_SCB_ABORT	240
381
382/* retries */
383#define I2O_HRT_GET_TRIES		3
384#define I2O_LCT_GET_TRIES		3
385
386/* defines for max_sectors and max_phys_segments */
387#define I2O_MAX_SECTORS			1024
388#define I2O_MAX_SECTORS_LIMITED		128
389#define I2O_MAX_PHYS_SEGMENTS		BLK_MAX_SEGMENTS
390
391/*
392 *	Message structures
393 */
394struct i2o_message {
395	union {
396		struct {
397			u8 version_offset;
398			u8 flags;
399			u16 size;
400			u32 target_tid:12;
401			u32 init_tid:12;
402			u32 function:8;
403			u32 icntxt;	/* initiator context */
404			u32 tcntxt;	/* transaction context */
405		} s;
406		u32 head[4];
407	} u;
408	/* List follows */
409	u32 body[0];
410};
411
412/* MFA and I2O message used by mempool */
413struct i2o_msg_mfa {
414	u32 mfa;		/* MFA returned by the controller */
415	struct i2o_message msg;	/* I2O message */
416};
417
418/*
419 *	Each I2O device entity has one of these. There is one per device.
420 */
421struct i2o_device {
422	i2o_lct_entry lct_data;	/* Device LCT information */
423
424	struct i2o_controller *iop;	/* Controlling IOP */
425	struct list_head list;	/* node in IOP devices list */
426
427	struct device device;
428
429	struct mutex lock;	/* device lock */
430};
431
432/*
433 *	Event structure provided to the event handling function
434 */
435struct i2o_event {
436	struct work_struct work;
437	struct i2o_device *i2o_dev;	/* I2O device pointer from which the
438					   event reply was initiated */
439	u16 size;		/* Size of data in 32-bit words */
440	u32 tcntxt;		/* Transaction context used at
441				   registration */
442	u32 event_indicator;	/* Event indicator from reply */
443	u32 data[0];		/* Event data from reply */
444};
445
446/*
447 *	I2O classes which could be handled by the OSM
448 */
449struct i2o_class_id {
450	u16 class_id:12;
451};
452
453/*
454 *	I2O driver structure for OSMs
455 */
456struct i2o_driver {
457	char *name;		/* OSM name */
458	int context;		/* Low 8 bits of the transaction info */
459	struct i2o_class_id *classes;	/* I2O classes that this OSM handles */
460
461	/* Message reply handler */
462	int (*reply) (struct i2o_controller *, u32, struct i2o_message *);
463
464	/* Event handler */
465	work_func_t event;
466
467	struct workqueue_struct *event_queue;	/* Event queue */
468
469	struct device_driver driver;
470
471	/* notification of changes */
472	void (*notify_controller_add) (struct i2o_controller *);
473	void (*notify_controller_remove) (struct i2o_controller *);
474	void (*notify_device_add) (struct i2o_device *);
475	void (*notify_device_remove) (struct i2o_device *);
476
477	struct semaphore lock;
478};
479
480/*
481 *	Contains DMA mapped address information
482 */
483struct i2o_dma {
484	void *virt;
485	dma_addr_t phys;
486	size_t len;
487};
488
489/*
490 *	Contains slab cache and mempool information
491 */
492struct i2o_pool {
493	char *name;
494	struct kmem_cache *slab;
495	mempool_t *mempool;
496};
497
498/*
499 *	Contains IO mapped address information
500 */
501struct i2o_io {
502	void __iomem *virt;
503	unsigned long phys;
504	unsigned long len;
505};
506
507/*
508 *	Context queue entry, used for 32-bit context on 64-bit systems
509 */
510struct i2o_context_list_element {
511	struct list_head list;
512	u32 context;
513	void *ptr;
514	unsigned long timestamp;
515};
516
517/*
518 * Each I2O controller has one of these objects
519 */
520struct i2o_controller {
521	char name[16];
522	int unit;
523	int type;
524
525	struct pci_dev *pdev;	/* PCI device */
526
527	unsigned int promise:1;	/* Promise controller */
528	unsigned int adaptec:1;	/* DPT / Adaptec controller */
529	unsigned int raptor:1;	/* split bar */
530	unsigned int no_quiesce:1;	/* dont quiesce before reset */
531	unsigned int short_req:1;	/* use small block sizes */
532	unsigned int limit_sectors:1;	/* limit number of sectors / request */
533	unsigned int pae_support:1;	/* controller has 64-bit SGL support */
534
535	struct list_head devices;	/* list of I2O devices */
536	struct list_head list;	/* Controller list */
537
538	void __iomem *in_port;	/* Inbout port address */
539	void __iomem *out_port;	/* Outbound port address */
540	void __iomem *irq_status;	/* Interrupt status register address */
541	void __iomem *irq_mask;	/* Interrupt mask register address */
542
543	struct i2o_dma status;	/* IOP status block */
544
545	struct i2o_dma hrt;	/* HW Resource Table */
546	i2o_lct *lct;		/* Logical Config Table */
547	struct i2o_dma dlct;	/* Temp LCT */
548	struct mutex lct_lock;	/* Lock for LCT updates */
549	struct i2o_dma status_block;	/* IOP status block */
550
551	struct i2o_io base;	/* controller messaging unit */
552	struct i2o_io in_queue;	/* inbound message queue Host->IOP */
553	struct i2o_dma out_queue;	/* outbound message queue IOP->Host */
554
555	struct i2o_pool in_msg;	/* mempool for inbound messages */
556
557	unsigned int battery:1;	/* Has a battery backup */
558	unsigned int io_alloc:1;	/* An I/O resource was allocated */
559	unsigned int mem_alloc:1;	/* A memory resource was allocated */
560
561	struct resource io_resource;	/* I/O resource allocated to the IOP */
562	struct resource mem_resource;	/* Mem resource allocated to the IOP */
563
564	struct device device;
565	struct i2o_device *exec;	/* Executive */
566#if BITS_PER_LONG == 64
567	spinlock_t context_list_lock;	/* lock for context_list */
568	atomic_t context_list_counter;	/* needed for unique contexts */
569	struct list_head context_list;	/* list of context id's
570					   and pointers */
571#endif
572	spinlock_t lock;	/* lock for controller
573				   configuration */
574	void *driver_data[I2O_MAX_DRIVERS];	/* storage for drivers */
575};
576
577/*
578 * I2O System table entry
579 *
580 * The system table contains information about all the IOPs in the
581 * system.  It is sent to all IOPs so that they can create peer2peer
582 * connections between them.
583 */
584struct i2o_sys_tbl_entry {
585	u16 org_id;
586	u16 reserved1;
587	u32 iop_id:12;
588	u32 reserved2:20;
589	u16 seg_num:12;
590	u16 i2o_version:4;
591	u8 iop_state;
592	u8 msg_type;
593	u16 frame_size;
594	u16 reserved3;
595	u32 last_changed;
596	u32 iop_capabilities;
597	u32 inbound_low;
598	u32 inbound_high;
599};
600
601struct i2o_sys_tbl {
602	u8 num_entries;
603	u8 version;
604	u16 reserved1;
605	u32 change_ind;
606	u32 reserved2;
607	u32 reserved3;
608	struct i2o_sys_tbl_entry iops[0];
609};
610
611extern struct list_head i2o_controllers;
612
613/* Message functions */
614extern struct i2o_message *i2o_msg_get_wait(struct i2o_controller *, int);
615extern int i2o_msg_post_wait_mem(struct i2o_controller *, struct i2o_message *,
616				 unsigned long, struct i2o_dma *);
617
618/* IOP functions */
619extern int i2o_status_get(struct i2o_controller *);
620
621extern int i2o_event_register(struct i2o_device *, struct i2o_driver *, int,
622			      u32);
623extern struct i2o_device *i2o_iop_find_device(struct i2o_controller *, u16);
624extern struct i2o_controller *i2o_find_iop(int);
625
626/* Functions needed for handling 64-bit pointers in 32-bit context */
627#if BITS_PER_LONG == 64
628extern u32 i2o_cntxt_list_add(struct i2o_controller *, void *);
629extern void *i2o_cntxt_list_get(struct i2o_controller *, u32);
630extern u32 i2o_cntxt_list_remove(struct i2o_controller *, void *);
631extern u32 i2o_cntxt_list_get_ptr(struct i2o_controller *, void *);
632
633static inline u32 i2o_ptr_low(void *ptr)
634{
635	return (u32) (u64) ptr;
636};
637
638static inline u32 i2o_ptr_high(void *ptr)
639{
640	return (u32) ((u64) ptr >> 32);
641};
642
643static inline u32 i2o_dma_low(dma_addr_t dma_addr)
644{
645	return (u32) (u64) dma_addr;
646};
647
648static inline u32 i2o_dma_high(dma_addr_t dma_addr)
649{
650	return (u32) ((u64) dma_addr >> 32);
651};
652#else
653static inline u32 i2o_cntxt_list_add(struct i2o_controller *c, void *ptr)
654{
655	return (u32) ptr;
656};
657
658static inline void *i2o_cntxt_list_get(struct i2o_controller *c, u32 context)
659{
660	return (void *)context;
661};
662
663static inline u32 i2o_cntxt_list_remove(struct i2o_controller *c, void *ptr)
664{
665	return (u32) ptr;
666};
667
668static inline u32 i2o_cntxt_list_get_ptr(struct i2o_controller *c, void *ptr)
669{
670	return (u32) ptr;
671};
672
673static inline u32 i2o_ptr_low(void *ptr)
674{
675	return (u32) ptr;
676};
677
678static inline u32 i2o_ptr_high(void *ptr)
679{
680	return 0;
681};
682
683static inline u32 i2o_dma_low(dma_addr_t dma_addr)
684{
685	return (u32) dma_addr;
686};
687
688static inline u32 i2o_dma_high(dma_addr_t dma_addr)
689{
690	return 0;
691};
692#endif
693
694extern u16 i2o_sg_tablesize(struct i2o_controller *c, u16 body_size);
695extern dma_addr_t i2o_dma_map_single(struct i2o_controller *c, void *ptr,
696					    size_t size,
697					    enum dma_data_direction direction,
698					    u32 ** sg_ptr);
699extern int i2o_dma_map_sg(struct i2o_controller *c,
700				 struct scatterlist *sg, int sg_count,
701				 enum dma_data_direction direction,
702				 u32 ** sg_ptr);
703extern int i2o_dma_alloc(struct device *dev, struct i2o_dma *addr, size_t len);
704extern void i2o_dma_free(struct device *dev, struct i2o_dma *addr);
705extern int i2o_dma_realloc(struct device *dev, struct i2o_dma *addr,
706								size_t len);
707extern int i2o_pool_alloc(struct i2o_pool *pool, const char *name,
708				 size_t size, int min_nr);
709extern void i2o_pool_free(struct i2o_pool *pool);
710/* I2O driver (OSM) functions */
711extern int i2o_driver_register(struct i2o_driver *);
712extern void i2o_driver_unregister(struct i2o_driver *);
713
714/**
715 *	i2o_driver_notify_controller_add - Send notification of added controller
716 *	@drv: I2O driver
717 *	@c: I2O controller
718 *
719 *	Send notification of added controller to a single registered driver.
720 */
721static inline void i2o_driver_notify_controller_add(struct i2o_driver *drv,
722						    struct i2o_controller *c)
723{
724	if (drv->notify_controller_add)
725		drv->notify_controller_add(c);
726};
727
728/**
729 *	i2o_driver_notify_controller_remove - Send notification of removed controller
730 *	@drv: I2O driver
731 *	@c: I2O controller
732 *
733 *	Send notification of removed controller to a single registered driver.
734 */
735static inline void i2o_driver_notify_controller_remove(struct i2o_driver *drv,
736						       struct i2o_controller *c)
737{
738	if (drv->notify_controller_remove)
739		drv->notify_controller_remove(c);
740};
741
742/**
743 *	i2o_driver_notify_device_add - Send notification of added device
744 *	@drv: I2O driver
745 *	@i2o_dev: the added i2o_device
746 *
747 *	Send notification of added device to a single registered driver.
748 */
749static inline void i2o_driver_notify_device_add(struct i2o_driver *drv,
750						struct i2o_device *i2o_dev)
751{
752	if (drv->notify_device_add)
753		drv->notify_device_add(i2o_dev);
754};
755
756/**
757 *	i2o_driver_notify_device_remove - Send notification of removed device
758 *	@drv: I2O driver
759 *	@i2o_dev: the added i2o_device
760 *
761 *	Send notification of removed device to a single registered driver.
762 */
763static inline void i2o_driver_notify_device_remove(struct i2o_driver *drv,
764						   struct i2o_device *i2o_dev)
765{
766	if (drv->notify_device_remove)
767		drv->notify_device_remove(i2o_dev);
768};
769
770extern void i2o_driver_notify_controller_add_all(struct i2o_controller *);
771extern void i2o_driver_notify_controller_remove_all(struct i2o_controller *);
772extern void i2o_driver_notify_device_add_all(struct i2o_device *);
773extern void i2o_driver_notify_device_remove_all(struct i2o_device *);
774
775/* I2O device functions */
776extern int i2o_device_claim(struct i2o_device *);
777extern int i2o_device_claim_release(struct i2o_device *);
778
779/* Exec OSM functions */
780extern int i2o_exec_lct_get(struct i2o_controller *);
781
782/* device / driver / kobject conversion functions */
783#define to_i2o_driver(drv) container_of(drv,struct i2o_driver, driver)
784#define to_i2o_device(dev) container_of(dev, struct i2o_device, device)
785#define to_i2o_controller(dev) container_of(dev, struct i2o_controller, device)
786
787/**
788 *	i2o_out_to_virt - Turn an I2O message to a virtual address
789 *	@c: controller
790 *	@m: message engine value
791 *
792 *	Turn a receive message from an I2O controller bus address into
793 *	a Linux virtual address. The shared page frame is a linear block
794 *	so we simply have to shift the offset. This function does not
795 *	work for sender side messages as they are ioremap objects
796 *	provided by the I2O controller.
797 */
798static inline struct i2o_message *i2o_msg_out_to_virt(struct i2o_controller *c,
799						      u32 m)
800{
801	BUG_ON(m < c->out_queue.phys
802	       || m >= c->out_queue.phys + c->out_queue.len);
803
804	return c->out_queue.virt + (m - c->out_queue.phys);
805};
806
807/**
808 *	i2o_msg_in_to_virt - Turn an I2O message to a virtual address
809 *	@c: controller
810 *	@m: message engine value
811 *
812 *	Turn a send message from an I2O controller bus address into
813 *	a Linux virtual address. The shared page frame is a linear block
814 *	so we simply have to shift the offset. This function does not
815 *	work for receive side messages as they are kmalloc objects
816 *	in a different pool.
817 */
818static inline struct i2o_message __iomem *i2o_msg_in_to_virt(struct
819							     i2o_controller *c,
820							     u32 m)
821{
822	return c->in_queue.virt + m;
823};
824
825/**
826 *	i2o_msg_get - obtain an I2O message from the IOP
827 *	@c: I2O controller
828 *
829 *	This function tries to get a message frame. If no message frame is
830 *	available do not wait until one is available (see also i2o_msg_get_wait).
831 *	The returned pointer to the message frame is not in I/O memory, it is
832 *	allocated from a mempool. But because a MFA is allocated from the
833 *	controller too it is guaranteed that i2o_msg_post() will never fail.
834 *
835 *	On a success a pointer to the message frame is returned. If the message
836 *	queue is empty -EBUSY is returned and if no memory is available -ENOMEM
837 *	is returned.
838 */
839static inline struct i2o_message *i2o_msg_get(struct i2o_controller *c)
840{
841	struct i2o_msg_mfa *mmsg = mempool_alloc(c->in_msg.mempool, GFP_ATOMIC);
842	if (!mmsg)
843		return ERR_PTR(-ENOMEM);
844
845	mmsg->mfa = readl(c->in_port);
846	if (unlikely(mmsg->mfa >= c->in_queue.len)) {
847		u32 mfa = mmsg->mfa;
848
849		mempool_free(mmsg, c->in_msg.mempool);
850
851		if (mfa == I2O_QUEUE_EMPTY)
852			return ERR_PTR(-EBUSY);
853		return ERR_PTR(-EFAULT);
854	}
855
856	return &mmsg->msg;
857};
858
859/**
860 *	i2o_msg_post - Post I2O message to I2O controller
861 *	@c: I2O controller to which the message should be send
862 *	@msg: message returned by i2o_msg_get()
863 *
864 *	Post the message to the I2O controller and return immediately.
865 */
866static inline void i2o_msg_post(struct i2o_controller *c,
867				struct i2o_message *msg)
868{
869	struct i2o_msg_mfa *mmsg;
870
871	mmsg = container_of(msg, struct i2o_msg_mfa, msg);
872	memcpy_toio(i2o_msg_in_to_virt(c, mmsg->mfa), msg,
873		    (le32_to_cpu(msg->u.head[0]) >> 16) << 2);
874	writel(mmsg->mfa, c->in_port);
875	mempool_free(mmsg, c->in_msg.mempool);
876};
877
878/**
879 * 	i2o_msg_post_wait - Post and wait a message and wait until return
880 *	@c: controller
881 *	@msg: message to post
882 *	@timeout: time in seconds to wait
883 *
884 * 	This API allows an OSM to post a message and then be told whether or
885 *	not the system received a successful reply. If the message times out
886 *	then the value '-ETIMEDOUT' is returned.
887 *
888 *	Returns 0 on success or negative error code on failure.
889 */
890static inline int i2o_msg_post_wait(struct i2o_controller *c,
891				    struct i2o_message *msg,
892				    unsigned long timeout)
893{
894	return i2o_msg_post_wait_mem(c, msg, timeout, NULL);
895};
896
897/**
898 *	i2o_msg_nop_mfa - Returns a fetched MFA back to the controller
899 *	@c: I2O controller from which the MFA was fetched
900 *	@mfa: MFA which should be returned
901 *
902 *	This function must be used for preserved messages, because i2o_msg_nop()
903 *	also returns the allocated memory back to the msg_pool mempool.
904 */
905static inline void i2o_msg_nop_mfa(struct i2o_controller *c, u32 mfa)
906{
907	struct i2o_message __iomem *msg;
908	u32 nop[3] = {
909		THREE_WORD_MSG_SIZE | SGL_OFFSET_0,
910		I2O_CMD_UTIL_NOP << 24 | HOST_TID << 12 | ADAPTER_TID,
911		0x00000000
912	};
913
914	msg = i2o_msg_in_to_virt(c, mfa);
915	memcpy_toio(msg, nop, sizeof(nop));
916	writel(mfa, c->in_port);
917};
918
919/**
920 *	i2o_msg_nop - Returns a message which is not used
921 *	@c: I2O controller from which the message was created
922 *	@msg: message which should be returned
923 *
924 *	If you fetch a message via i2o_msg_get, and can't use it, you must
925 *	return the message with this function. Otherwise the MFA is lost as well
926 *	as the allocated memory from the mempool.
927 */
928static inline void i2o_msg_nop(struct i2o_controller *c,
929			       struct i2o_message *msg)
930{
931	struct i2o_msg_mfa *mmsg;
932	mmsg = container_of(msg, struct i2o_msg_mfa, msg);
933
934	i2o_msg_nop_mfa(c, mmsg->mfa);
935	mempool_free(mmsg, c->in_msg.mempool);
936};
937
938/**
939 *	i2o_flush_reply - Flush reply from I2O controller
940 *	@c: I2O controller
941 *	@m: the message identifier
942 *
943 *	The I2O controller must be informed that the reply message is not needed
944 *	anymore. If you forget to flush the reply, the message frame can't be
945 *	used by the controller anymore and is therefore lost.
946 */
947static inline void i2o_flush_reply(struct i2o_controller *c, u32 m)
948{
949	writel(m, c->out_port);
950};
951
952/*
953 *	Endian handling wrapped into the macro - keeps the core code
954 *	cleaner.
955 */
956
957#define i2o_raw_writel(val, mem)	__raw_writel(cpu_to_le32(val), mem)
958
959extern int i2o_parm_field_get(struct i2o_device *, int, int, void *, int);
960extern int i2o_parm_table_get(struct i2o_device *, int, int, int, void *, int,
961			      void *, int);
962
963/* debugging and troubleshooting/diagnostic helpers. */
964#define osm_printk(level, format, arg...)  \
965	printk(level "%s: " format, OSM_NAME , ## arg)
966
967#ifdef DEBUG
968#define osm_debug(format, arg...) \
969	osm_printk(KERN_DEBUG, format , ## arg)
970#else
971#define osm_debug(format, arg...) \
972        do { } while (0)
973#endif
974
975#define osm_err(format, arg...)		\
976	osm_printk(KERN_ERR, format , ## arg)
977#define osm_info(format, arg...)		\
978	osm_printk(KERN_INFO, format , ## arg)
979#define osm_warn(format, arg...)		\
980	osm_printk(KERN_WARNING, format , ## arg)
981
982/* debugging functions */
983extern void i2o_report_status(const char *, const char *, struct i2o_message *);
984extern void i2o_dump_message(struct i2o_message *);
985extern void i2o_dump_hrt(struct i2o_controller *c);
986extern void i2o_debug_state(struct i2o_controller *c);
987
988#endif				/* _I2O_H */
989