1/* 2 * AD7746 capacitive sensor driver supporting AD7745, AD7746 and AD7747 3 * 4 * Copyright 2011 Analog Devices Inc. 5 * 6 * Licensed under the GPL-2. 7 */ 8 9#include <linux/interrupt.h> 10#include <linux/device.h> 11#include <linux/kernel.h> 12#include <linux/slab.h> 13#include <linux/sysfs.h> 14#include <linux/i2c.h> 15#include <linux/delay.h> 16#include <linux/module.h> 17#include <linux/stat.h> 18 19#include <linux/iio/iio.h> 20#include <linux/iio/sysfs.h> 21 22#include "ad7746.h" 23 24/* 25 * AD7746 Register Definition 26 */ 27 28#define AD7746_REG_STATUS 0 29#define AD7746_REG_CAP_DATA_HIGH 1 30#define AD7746_REG_CAP_DATA_MID 2 31#define AD7746_REG_CAP_DATA_LOW 3 32#define AD7746_REG_VT_DATA_HIGH 4 33#define AD7746_REG_VT_DATA_MID 5 34#define AD7746_REG_VT_DATA_LOW 6 35#define AD7746_REG_CAP_SETUP 7 36#define AD7746_REG_VT_SETUP 8 37#define AD7746_REG_EXC_SETUP 9 38#define AD7746_REG_CFG 10 39#define AD7746_REG_CAPDACA 11 40#define AD7746_REG_CAPDACB 12 41#define AD7746_REG_CAP_OFFH 13 42#define AD7746_REG_CAP_OFFL 14 43#define AD7746_REG_CAP_GAINH 15 44#define AD7746_REG_CAP_GAINL 16 45#define AD7746_REG_VOLT_GAINH 17 46#define AD7746_REG_VOLT_GAINL 18 47 48/* Status Register Bit Designations (AD7746_REG_STATUS) */ 49#define AD7746_STATUS_EXCERR (1 << 3) 50#define AD7746_STATUS_RDY (1 << 2) 51#define AD7746_STATUS_RDYVT (1 << 1) 52#define AD7746_STATUS_RDYCAP (1 << 0) 53 54/* Capacitive Channel Setup Register Bit Designations (AD7746_REG_CAP_SETUP) */ 55#define AD7746_CAPSETUP_CAPEN (1 << 7) 56#define AD7746_CAPSETUP_CIN2 (1 << 6) /* AD7746 only */ 57#define AD7746_CAPSETUP_CAPDIFF (1 << 5) 58#define AD7746_CAPSETUP_CACHOP (1 << 0) 59 60/* Voltage/Temperature Setup Register Bit Designations (AD7746_REG_VT_SETUP) */ 61#define AD7746_VTSETUP_VTEN (1 << 7) 62#define AD7746_VTSETUP_VTMD_INT_TEMP (0 << 5) 63#define AD7746_VTSETUP_VTMD_EXT_TEMP (1 << 5) 64#define AD7746_VTSETUP_VTMD_VDD_MON (2 << 5) 65#define AD7746_VTSETUP_VTMD_EXT_VIN (3 << 5) 66#define AD7746_VTSETUP_EXTREF (1 << 4) 67#define AD7746_VTSETUP_VTSHORT (1 << 1) 68#define AD7746_VTSETUP_VTCHOP (1 << 0) 69 70/* Excitation Setup Register Bit Designations (AD7746_REG_EXC_SETUP) */ 71#define AD7746_EXCSETUP_CLKCTRL (1 << 7) 72#define AD7746_EXCSETUP_EXCON (1 << 6) 73#define AD7746_EXCSETUP_EXCB (1 << 5) 74#define AD7746_EXCSETUP_NEXCB (1 << 4) 75#define AD7746_EXCSETUP_EXCA (1 << 3) 76#define AD7746_EXCSETUP_NEXCA (1 << 2) 77#define AD7746_EXCSETUP_EXCLVL(x) (((x) & 0x3) << 0) 78 79/* Config Register Bit Designations (AD7746_REG_CFG) */ 80#define AD7746_CONF_VTFS(x) ((x) << 6) 81#define AD7746_CONF_CAPFS(x) ((x) << 3) 82#define AD7746_CONF_MODE_IDLE (0 << 0) 83#define AD7746_CONF_MODE_CONT_CONV (1 << 0) 84#define AD7746_CONF_MODE_SINGLE_CONV (2 << 0) 85#define AD7746_CONF_MODE_PWRDN (3 << 0) 86#define AD7746_CONF_MODE_OFFS_CAL (5 << 0) 87#define AD7746_CONF_MODE_GAIN_CAL (6 << 0) 88 89/* CAPDAC Register Bit Designations (AD7746_REG_CAPDACx) */ 90#define AD7746_CAPDAC_DACEN (1 << 7) 91#define AD7746_CAPDAC_DACP(x) ((x) & 0x7F) 92 93/* 94 * struct ad7746_chip_info - chip specific information 95 */ 96 97struct ad7746_chip_info { 98 struct i2c_client *client; 99 /* 100 * Capacitive channel digital filter setup; 101 * conversion time/update rate setup per channel 102 */ 103 u8 config; 104 u8 cap_setup; 105 u8 vt_setup; 106 u8 capdac[2][2]; 107 s8 capdac_set; 108 109 union { 110 __be32 d32; 111 u8 d8[4]; 112 } data ____cacheline_aligned; 113}; 114 115enum ad7746_chan { 116 VIN, 117 VIN_VDD, 118 TEMP_INT, 119 TEMP_EXT, 120 CIN1, 121 CIN1_DIFF, 122 CIN2, 123 CIN2_DIFF, 124}; 125 126static const struct iio_chan_spec ad7746_channels[] = { 127 [VIN] = { 128 .type = IIO_VOLTAGE, 129 .indexed = 1, 130 .channel = 0, 131 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 132 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 133 .address = AD7746_REG_VT_DATA_HIGH << 8 | 134 AD7746_VTSETUP_VTMD_EXT_VIN, 135 }, 136 [VIN_VDD] = { 137 .type = IIO_VOLTAGE, 138 .indexed = 1, 139 .channel = 1, 140 .extend_name = "supply", 141 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 142 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 143 .address = AD7746_REG_VT_DATA_HIGH << 8 | 144 AD7746_VTSETUP_VTMD_VDD_MON, 145 }, 146 [TEMP_INT] = { 147 .type = IIO_TEMP, 148 .indexed = 1, 149 .channel = 0, 150 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), 151 .address = AD7746_REG_VT_DATA_HIGH << 8 | 152 AD7746_VTSETUP_VTMD_INT_TEMP, 153 }, 154 [TEMP_EXT] = { 155 .type = IIO_TEMP, 156 .indexed = 1, 157 .channel = 1, 158 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), 159 .address = AD7746_REG_VT_DATA_HIGH << 8 | 160 AD7746_VTSETUP_VTMD_EXT_TEMP, 161 }, 162 [CIN1] = { 163 .type = IIO_CAPACITANCE, 164 .indexed = 1, 165 .channel = 0, 166 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 167 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET), 168 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) | 169 BIT(IIO_CHAN_INFO_SCALE), 170 .address = AD7746_REG_CAP_DATA_HIGH << 8, 171 }, 172 [CIN1_DIFF] = { 173 .type = IIO_CAPACITANCE, 174 .differential = 1, 175 .indexed = 1, 176 .channel = 0, 177 .channel2 = 2, 178 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 179 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET), 180 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) | 181 BIT(IIO_CHAN_INFO_SCALE), 182 .address = AD7746_REG_CAP_DATA_HIGH << 8 | 183 AD7746_CAPSETUP_CAPDIFF 184 }, 185 [CIN2] = { 186 .type = IIO_CAPACITANCE, 187 .indexed = 1, 188 .channel = 1, 189 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 190 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET), 191 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) | 192 BIT(IIO_CHAN_INFO_SCALE), 193 .address = AD7746_REG_CAP_DATA_HIGH << 8 | 194 AD7746_CAPSETUP_CIN2, 195 }, 196 [CIN2_DIFF] = { 197 .type = IIO_CAPACITANCE, 198 .differential = 1, 199 .indexed = 1, 200 .channel = 1, 201 .channel2 = 3, 202 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 203 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET), 204 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) | 205 BIT(IIO_CHAN_INFO_SCALE), 206 .address = AD7746_REG_CAP_DATA_HIGH << 8 | 207 AD7746_CAPSETUP_CAPDIFF | AD7746_CAPSETUP_CIN2, 208 } 209}; 210 211/* Values are Update Rate (Hz), Conversion Time (ms) + 1*/ 212static const unsigned char ad7746_vt_filter_rate_table[][2] = { 213 {50, 20 + 1}, {31, 32 + 1}, {16, 62 + 1}, {8, 122 + 1}, 214}; 215 216static const unsigned char ad7746_cap_filter_rate_table[][2] = { 217 {91, 11 + 1}, {84, 12 + 1}, {50, 20 + 1}, {26, 38 + 1}, 218 {16, 62 + 1}, {13, 77 + 1}, {11, 92 + 1}, {9, 110 + 1}, 219}; 220 221static int ad7746_select_channel(struct iio_dev *indio_dev, 222 struct iio_chan_spec const *chan) 223{ 224 struct ad7746_chip_info *chip = iio_priv(indio_dev); 225 int ret, delay; 226 u8 vt_setup, cap_setup; 227 228 switch (chan->type) { 229 case IIO_CAPACITANCE: 230 cap_setup = (chan->address & 0xFF) | AD7746_CAPSETUP_CAPEN; 231 vt_setup = chip->vt_setup & ~AD7746_VTSETUP_VTEN; 232 delay = ad7746_cap_filter_rate_table[(chip->config >> 3) & 233 0x7][1]; 234 235 if (chip->capdac_set != chan->channel) { 236 ret = i2c_smbus_write_byte_data(chip->client, 237 AD7746_REG_CAPDACA, 238 chip->capdac[chan->channel][0]); 239 if (ret < 0) 240 return ret; 241 ret = i2c_smbus_write_byte_data(chip->client, 242 AD7746_REG_CAPDACB, 243 chip->capdac[chan->channel][1]); 244 if (ret < 0) 245 return ret; 246 247 chip->capdac_set = chan->channel; 248 } 249 break; 250 case IIO_VOLTAGE: 251 case IIO_TEMP: 252 vt_setup = (chan->address & 0xFF) | AD7746_VTSETUP_VTEN; 253 cap_setup = chip->cap_setup & ~AD7746_CAPSETUP_CAPEN; 254 delay = ad7746_cap_filter_rate_table[(chip->config >> 6) & 255 0x3][1]; 256 break; 257 default: 258 return -EINVAL; 259 } 260 261 if (chip->cap_setup != cap_setup) { 262 ret = i2c_smbus_write_byte_data(chip->client, 263 AD7746_REG_CAP_SETUP, 264 cap_setup); 265 if (ret < 0) 266 return ret; 267 268 chip->cap_setup = cap_setup; 269 } 270 271 if (chip->vt_setup != vt_setup) { 272 ret = i2c_smbus_write_byte_data(chip->client, 273 AD7746_REG_VT_SETUP, 274 vt_setup); 275 if (ret < 0) 276 return ret; 277 278 chip->vt_setup = vt_setup; 279 } 280 281 return delay; 282} 283 284static inline ssize_t ad7746_start_calib(struct device *dev, 285 struct device_attribute *attr, 286 const char *buf, 287 size_t len, 288 u8 regval) 289{ 290 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 291 struct ad7746_chip_info *chip = iio_priv(indio_dev); 292 bool doit; 293 int ret, timeout = 10; 294 295 ret = strtobool(buf, &doit); 296 if (ret < 0) 297 return ret; 298 299 if (!doit) 300 return 0; 301 302 mutex_lock(&indio_dev->mlock); 303 regval |= chip->config; 304 ret = i2c_smbus_write_byte_data(chip->client, AD7746_REG_CFG, regval); 305 if (ret < 0) { 306 mutex_unlock(&indio_dev->mlock); 307 return ret; 308 } 309 310 do { 311 msleep(20); 312 ret = i2c_smbus_read_byte_data(chip->client, AD7746_REG_CFG); 313 if (ret < 0) { 314 mutex_unlock(&indio_dev->mlock); 315 return ret; 316 } 317 } while ((ret == regval) && timeout--); 318 319 mutex_unlock(&indio_dev->mlock); 320 321 return len; 322} 323 324static ssize_t ad7746_start_offset_calib(struct device *dev, 325 struct device_attribute *attr, 326 const char *buf, 327 size_t len) 328{ 329 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 330 int ret = ad7746_select_channel(indio_dev, 331 &ad7746_channels[to_iio_dev_attr(attr)->address]); 332 if (ret < 0) 333 return ret; 334 335 return ad7746_start_calib(dev, attr, buf, len, 336 AD7746_CONF_MODE_OFFS_CAL); 337} 338 339static ssize_t ad7746_start_gain_calib(struct device *dev, 340 struct device_attribute *attr, 341 const char *buf, 342 size_t len) 343{ 344 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 345 int ret = ad7746_select_channel(indio_dev, 346 &ad7746_channels[to_iio_dev_attr(attr)->address]); 347 if (ret < 0) 348 return ret; 349 350 return ad7746_start_calib(dev, attr, buf, len, 351 AD7746_CONF_MODE_GAIN_CAL); 352} 353 354static IIO_DEVICE_ATTR(in_capacitance0_calibbias_calibration, 355 S_IWUSR, NULL, ad7746_start_offset_calib, CIN1); 356static IIO_DEVICE_ATTR(in_capacitance1_calibbias_calibration, 357 S_IWUSR, NULL, ad7746_start_offset_calib, CIN2); 358static IIO_DEVICE_ATTR(in_capacitance0_calibscale_calibration, 359 S_IWUSR, NULL, ad7746_start_gain_calib, CIN1); 360static IIO_DEVICE_ATTR(in_capacitance1_calibscale_calibration, 361 S_IWUSR, NULL, ad7746_start_gain_calib, CIN2); 362static IIO_DEVICE_ATTR(in_voltage0_calibscale_calibration, 363 S_IWUSR, NULL, ad7746_start_gain_calib, VIN); 364 365static ssize_t ad7746_show_cap_filter_rate_setup(struct device *dev, 366 struct device_attribute *attr, 367 char *buf) 368{ 369 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 370 struct ad7746_chip_info *chip = iio_priv(indio_dev); 371 372 return sprintf(buf, "%d\n", ad7746_cap_filter_rate_table[ 373 (chip->config >> 3) & 0x7][0]); 374} 375 376static ssize_t ad7746_store_cap_filter_rate_setup(struct device *dev, 377 struct device_attribute *attr, 378 const char *buf, 379 size_t len) 380{ 381 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 382 struct ad7746_chip_info *chip = iio_priv(indio_dev); 383 u8 data; 384 int ret, i; 385 386 ret = kstrtou8(buf, 10, &data); 387 if (ret < 0) 388 return ret; 389 390 for (i = 0; i < ARRAY_SIZE(ad7746_cap_filter_rate_table); i++) 391 if (data >= ad7746_cap_filter_rate_table[i][0]) 392 break; 393 394 if (i >= ARRAY_SIZE(ad7746_cap_filter_rate_table)) 395 i = ARRAY_SIZE(ad7746_cap_filter_rate_table) - 1; 396 397 mutex_lock(&indio_dev->mlock); 398 chip->config &= ~AD7746_CONF_CAPFS(0x7); 399 chip->config |= AD7746_CONF_CAPFS(i); 400 mutex_unlock(&indio_dev->mlock); 401 402 return len; 403} 404 405static ssize_t ad7746_show_vt_filter_rate_setup(struct device *dev, 406 struct device_attribute *attr, 407 char *buf) 408{ 409 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 410 struct ad7746_chip_info *chip = iio_priv(indio_dev); 411 412 return sprintf(buf, "%d\n", ad7746_vt_filter_rate_table[ 413 (chip->config >> 6) & 0x3][0]); 414} 415 416static ssize_t ad7746_store_vt_filter_rate_setup(struct device *dev, 417 struct device_attribute *attr, 418 const char *buf, 419 size_t len) 420{ 421 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 422 struct ad7746_chip_info *chip = iio_priv(indio_dev); 423 u8 data; 424 int ret, i; 425 426 ret = kstrtou8(buf, 10, &data); 427 if (ret < 0) 428 return ret; 429 430 for (i = 0; i < ARRAY_SIZE(ad7746_vt_filter_rate_table); i++) 431 if (data >= ad7746_vt_filter_rate_table[i][0]) 432 break; 433 434 if (i >= ARRAY_SIZE(ad7746_vt_filter_rate_table)) 435 i = ARRAY_SIZE(ad7746_vt_filter_rate_table) - 1; 436 437 mutex_lock(&indio_dev->mlock); 438 chip->config &= ~AD7746_CONF_VTFS(0x3); 439 chip->config |= AD7746_CONF_VTFS(i); 440 mutex_unlock(&indio_dev->mlock); 441 442 return len; 443} 444 445static IIO_DEVICE_ATTR(in_capacitance_sampling_frequency, 446 S_IRUGO | S_IWUSR, ad7746_show_cap_filter_rate_setup, 447 ad7746_store_cap_filter_rate_setup, 0); 448 449static IIO_DEVICE_ATTR(in_voltage_sampling_frequency, 450 S_IRUGO | S_IWUSR, ad7746_show_vt_filter_rate_setup, 451 ad7746_store_vt_filter_rate_setup, 0); 452 453static IIO_CONST_ATTR(in_voltage_sampling_frequency_available, "50 31 16 8"); 454static IIO_CONST_ATTR(in_capacitance_sampling_frequency_available, 455 "91 84 50 26 16 13 11 9"); 456 457static struct attribute *ad7746_attributes[] = { 458 &iio_dev_attr_in_capacitance_sampling_frequency.dev_attr.attr, 459 &iio_dev_attr_in_voltage_sampling_frequency.dev_attr.attr, 460 &iio_dev_attr_in_capacitance0_calibbias_calibration.dev_attr.attr, 461 &iio_dev_attr_in_capacitance0_calibscale_calibration.dev_attr.attr, 462 &iio_dev_attr_in_capacitance1_calibscale_calibration.dev_attr.attr, 463 &iio_dev_attr_in_capacitance1_calibbias_calibration.dev_attr.attr, 464 &iio_dev_attr_in_voltage0_calibscale_calibration.dev_attr.attr, 465 &iio_const_attr_in_voltage_sampling_frequency_available.dev_attr.attr, 466 &iio_const_attr_in_capacitance_sampling_frequency_available. 467 dev_attr.attr, 468 NULL, 469}; 470 471static const struct attribute_group ad7746_attribute_group = { 472 .attrs = ad7746_attributes, 473}; 474 475static int ad7746_write_raw(struct iio_dev *indio_dev, 476 struct iio_chan_spec const *chan, 477 int val, 478 int val2, 479 long mask) 480{ 481 struct ad7746_chip_info *chip = iio_priv(indio_dev); 482 int ret, reg; 483 484 mutex_lock(&indio_dev->mlock); 485 486 switch (mask) { 487 case IIO_CHAN_INFO_CALIBSCALE: 488 if (val != 1) { 489 ret = -EINVAL; 490 goto out; 491 } 492 493 val = (val2 * 1024) / 15625; 494 495 switch (chan->type) { 496 case IIO_CAPACITANCE: 497 reg = AD7746_REG_CAP_GAINH; 498 break; 499 case IIO_VOLTAGE: 500 reg = AD7746_REG_VOLT_GAINH; 501 break; 502 default: 503 ret = -EINVAL; 504 goto out; 505 } 506 507 ret = i2c_smbus_write_word_data(chip->client, reg, swab16(val)); 508 if (ret < 0) 509 goto out; 510 511 ret = 0; 512 break; 513 case IIO_CHAN_INFO_CALIBBIAS: 514 if ((val < 0) | (val > 0xFFFF)) { 515 ret = -EINVAL; 516 goto out; 517 } 518 ret = i2c_smbus_write_word_data(chip->client, 519 AD7746_REG_CAP_OFFH, swab16(val)); 520 if (ret < 0) 521 goto out; 522 523 ret = 0; 524 break; 525 case IIO_CHAN_INFO_OFFSET: 526 if ((val < 0) | (val > 43008000)) { /* 21pF */ 527 ret = -EINVAL; 528 goto out; 529 } 530 531 /* CAPDAC Scale = 21pF_typ / 127 532 * CIN Scale = 8.192pF / 2^24 533 * Offset Scale = CAPDAC Scale / CIN Scale = 338646 534 * */ 535 536 val /= 338646; 537 538 chip->capdac[chan->channel][chan->differential] = (val > 0 ? 539 AD7746_CAPDAC_DACP(val) | AD7746_CAPDAC_DACEN : 0); 540 541 ret = i2c_smbus_write_byte_data(chip->client, 542 AD7746_REG_CAPDACA, 543 chip->capdac[chan->channel][0]); 544 if (ret < 0) 545 goto out; 546 ret = i2c_smbus_write_byte_data(chip->client, 547 AD7746_REG_CAPDACB, 548 chip->capdac[chan->channel][1]); 549 if (ret < 0) 550 goto out; 551 552 chip->capdac_set = chan->channel; 553 554 ret = 0; 555 break; 556 default: 557 ret = -EINVAL; 558 } 559 560out: 561 mutex_unlock(&indio_dev->mlock); 562 return ret; 563} 564 565static int ad7746_read_raw(struct iio_dev *indio_dev, 566 struct iio_chan_spec const *chan, 567 int *val, int *val2, 568 long mask) 569{ 570 struct ad7746_chip_info *chip = iio_priv(indio_dev); 571 int ret, delay; 572 u8 regval, reg; 573 574 mutex_lock(&indio_dev->mlock); 575 576 switch (mask) { 577 case IIO_CHAN_INFO_RAW: 578 case IIO_CHAN_INFO_PROCESSED: 579 ret = ad7746_select_channel(indio_dev, chan); 580 if (ret < 0) 581 goto out; 582 delay = ret; 583 584 regval = chip->config | AD7746_CONF_MODE_SINGLE_CONV; 585 ret = i2c_smbus_write_byte_data(chip->client, AD7746_REG_CFG, 586 regval); 587 if (ret < 0) 588 goto out; 589 590 msleep(delay); 591 /* Now read the actual register */ 592 593 ret = i2c_smbus_read_i2c_block_data(chip->client, 594 chan->address >> 8, 3, &chip->data.d8[1]); 595 596 if (ret < 0) 597 goto out; 598 599 *val = (be32_to_cpu(chip->data.d32) & 0xFFFFFF) - 0x800000; 600 601 switch (chan->type) { 602 case IIO_TEMP: 603 /* temperature in milli degrees Celsius 604 * T = ((*val / 2048) - 4096) * 1000 605 */ 606 *val = (*val * 125) / 256; 607 break; 608 case IIO_VOLTAGE: 609 if (chan->channel == 1) /* supply_raw*/ 610 *val = *val * 6; 611 break; 612 default: 613 break; 614 } 615 616 ret = IIO_VAL_INT; 617 break; 618 case IIO_CHAN_INFO_CALIBSCALE: 619 switch (chan->type) { 620 case IIO_CAPACITANCE: 621 reg = AD7746_REG_CAP_GAINH; 622 break; 623 case IIO_VOLTAGE: 624 reg = AD7746_REG_VOLT_GAINH; 625 break; 626 default: 627 ret = -EINVAL; 628 goto out; 629 } 630 631 ret = i2c_smbus_read_word_data(chip->client, reg); 632 if (ret < 0) 633 goto out; 634 /* 1 + gain_val / 2^16 */ 635 *val = 1; 636 *val2 = (15625 * swab16(ret)) / 1024; 637 638 ret = IIO_VAL_INT_PLUS_MICRO; 639 break; 640 case IIO_CHAN_INFO_CALIBBIAS: 641 ret = i2c_smbus_read_word_data(chip->client, 642 AD7746_REG_CAP_OFFH); 643 if (ret < 0) 644 goto out; 645 *val = swab16(ret); 646 647 ret = IIO_VAL_INT; 648 break; 649 case IIO_CHAN_INFO_OFFSET: 650 *val = AD7746_CAPDAC_DACP(chip->capdac[chan->channel] 651 [chan->differential]) * 338646; 652 653 ret = IIO_VAL_INT; 654 break; 655 case IIO_CHAN_INFO_SCALE: 656 switch (chan->type) { 657 case IIO_CAPACITANCE: 658 /* 8.192pf / 2^24 */ 659 *val = 0; 660 *val2 = 488; 661 ret = IIO_VAL_INT_PLUS_NANO; 662 break; 663 case IIO_VOLTAGE: 664 /* 1170mV / 2^23 */ 665 *val = 1170; 666 *val2 = 23; 667 ret = IIO_VAL_FRACTIONAL_LOG2; 668 break; 669 default: 670 ret = -EINVAL; 671 break; 672 } 673 674 break; 675 default: 676 ret = -EINVAL; 677 } 678out: 679 mutex_unlock(&indio_dev->mlock); 680 return ret; 681} 682 683static const struct iio_info ad7746_info = { 684 .attrs = &ad7746_attribute_group, 685 .read_raw = &ad7746_read_raw, 686 .write_raw = &ad7746_write_raw, 687 .driver_module = THIS_MODULE, 688}; 689 690/* 691 * device probe and remove 692 */ 693 694static int ad7746_probe(struct i2c_client *client, 695 const struct i2c_device_id *id) 696{ 697 struct ad7746_platform_data *pdata = client->dev.platform_data; 698 struct ad7746_chip_info *chip; 699 struct iio_dev *indio_dev; 700 int ret = 0; 701 unsigned char regval = 0; 702 703 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip)); 704 if (!indio_dev) 705 return -ENOMEM; 706 chip = iio_priv(indio_dev); 707 /* this is only used for device removal purposes */ 708 i2c_set_clientdata(client, indio_dev); 709 710 chip->client = client; 711 chip->capdac_set = -1; 712 713 /* Establish that the iio_dev is a child of the i2c device */ 714 indio_dev->name = id->name; 715 indio_dev->dev.parent = &client->dev; 716 indio_dev->info = &ad7746_info; 717 indio_dev->channels = ad7746_channels; 718 if (id->driver_data == 7746) 719 indio_dev->num_channels = ARRAY_SIZE(ad7746_channels); 720 else 721 indio_dev->num_channels = ARRAY_SIZE(ad7746_channels) - 2; 722 indio_dev->num_channels = ARRAY_SIZE(ad7746_channels); 723 indio_dev->modes = INDIO_DIRECT_MODE; 724 725 if (pdata) { 726 if (pdata->exca_en) { 727 if (pdata->exca_inv_en) 728 regval |= AD7746_EXCSETUP_NEXCA; 729 else 730 regval |= AD7746_EXCSETUP_EXCA; 731 } 732 733 if (pdata->excb_en) { 734 if (pdata->excb_inv_en) 735 regval |= AD7746_EXCSETUP_NEXCB; 736 else 737 regval |= AD7746_EXCSETUP_EXCB; 738 } 739 740 regval |= AD7746_EXCSETUP_EXCLVL(pdata->exclvl); 741 } else { 742 dev_warn(&client->dev, "No platform data? using default\n"); 743 regval = AD7746_EXCSETUP_EXCA | AD7746_EXCSETUP_EXCB | 744 AD7746_EXCSETUP_EXCLVL(3); 745 } 746 747 ret = i2c_smbus_write_byte_data(chip->client, 748 AD7746_REG_EXC_SETUP, regval); 749 if (ret < 0) 750 return ret; 751 752 ret = iio_device_register(indio_dev); 753 if (ret) 754 return ret; 755 756 dev_info(&client->dev, "%s capacitive sensor registered\n", id->name); 757 758 return 0; 759} 760 761static int ad7746_remove(struct i2c_client *client) 762{ 763 struct iio_dev *indio_dev = i2c_get_clientdata(client); 764 765 iio_device_unregister(indio_dev); 766 767 return 0; 768} 769 770static const struct i2c_device_id ad7746_id[] = { 771 { "ad7745", 7745 }, 772 { "ad7746", 7746 }, 773 { "ad7747", 7747 }, 774 {} 775}; 776 777MODULE_DEVICE_TABLE(i2c, ad7746_id); 778 779static struct i2c_driver ad7746_driver = { 780 .driver = { 781 .name = KBUILD_MODNAME, 782 }, 783 .probe = ad7746_probe, 784 .remove = ad7746_remove, 785 .id_table = ad7746_id, 786}; 787module_i2c_driver(ad7746_driver); 788 789MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); 790MODULE_DESCRIPTION("Analog Devices AD7746/5/7 capacitive sensor driver"); 791MODULE_LICENSE("GPL v2"); 792