1/****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17 * 18 ******************************************************************************/ 19 20#include <pwrseqcmd.h> 21#include <usb_ops_linux.h> 22 23/* This routine deals with the Power Configuration CMDs parsing 24 * for RTL8723/RTL8188E Series IC. 25 */ 26u8 rtl88eu_pwrseqcmdparsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers, 27 u8 ifacetype, struct wl_pwr_cfg pwrseqcmd[]) 28{ 29 struct wl_pwr_cfg pwrcfgcmd = {0}; 30 u8 poll_bit = false; 31 u32 aryidx = 0; 32 u8 value = 0; 33 u32 offset = 0; 34 u32 poll_count = 0; /* polling autoload done. */ 35 u32 max_poll_count = 5000; 36 37 do { 38 pwrcfgcmd = pwrseqcmd[aryidx]; 39 40 RT_TRACE(_module_hal_init_c_ , _drv_info_, 41 ("rtl88eu_pwrseqcmdparsing: offset(%#x) cut_msk(%#x)" 42 "fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x)" 43 "msk(%#x) value(%#x)\n", 44 GET_PWR_CFG_OFFSET(pwrcfgcmd), 45 GET_PWR_CFG_CUT_MASK(pwrcfgcmd), 46 GET_PWR_CFG_FAB_MASK(pwrcfgcmd), 47 GET_PWR_CFG_INTF_MASK(pwrcfgcmd), 48 GET_PWR_CFG_BASE(pwrcfgcmd), 49 GET_PWR_CFG_CMD(pwrcfgcmd), 50 GET_PWR_CFG_MASK(pwrcfgcmd), 51 GET_PWR_CFG_VALUE(pwrcfgcmd))); 52 53 /* Only Handle the command whose FAB, CUT, and Interface are matched */ 54 if ((GET_PWR_CFG_FAB_MASK(pwrcfgcmd) & fab_vers) && 55 (GET_PWR_CFG_CUT_MASK(pwrcfgcmd) & cut_vers) && 56 (GET_PWR_CFG_INTF_MASK(pwrcfgcmd) & ifacetype)) { 57 switch (GET_PWR_CFG_CMD(pwrcfgcmd)) { 58 case PWR_CMD_READ: 59 RT_TRACE(_module_hal_init_c_, _drv_info_, 60 ("rtl88eu_pwrseqcmdparsing: PWR_CMD_READ\n")); 61 break; 62 case PWR_CMD_WRITE: 63 RT_TRACE(_module_hal_init_c_, _drv_info_, 64 ("rtl88eu_pwrseqcmdparsing: PWR_CMD_WRITE\n")); 65 offset = GET_PWR_CFG_OFFSET(pwrcfgcmd); 66 67 /* Read the value from system register */ 68 value = usb_read8(padapter, offset); 69 70 value &= ~(GET_PWR_CFG_MASK(pwrcfgcmd)); 71 value |= (GET_PWR_CFG_VALUE(pwrcfgcmd) & 72 GET_PWR_CFG_MASK(pwrcfgcmd)); 73 74 /* Write the value back to system register */ 75 usb_write8(padapter, offset, value); 76 break; 77 case PWR_CMD_POLLING: 78 RT_TRACE(_module_hal_init_c_, _drv_info_, 79 ("rtl88eu_pwrseqcmdparsing: PWR_CMD_POLLING\n")); 80 81 poll_bit = false; 82 offset = GET_PWR_CFG_OFFSET(pwrcfgcmd); 83 do { 84 value = usb_read8(padapter, offset); 85 value &= GET_PWR_CFG_MASK(pwrcfgcmd); 86 87 if (value == (GET_PWR_CFG_VALUE(pwrcfgcmd) & 88 GET_PWR_CFG_MASK(pwrcfgcmd))) 89 poll_bit = true; 90 else 91 udelay(10); 92 93 if (poll_count++ > max_poll_count) { 94 DBG_88E("Fail to polling Offset[%#x]\n", offset); 95 return false; 96 } 97 } while (!poll_bit); 98 break; 99 case PWR_CMD_DELAY: 100 RT_TRACE(_module_hal_init_c_, _drv_info_, 101 ("rtl88eu_pwrseqcmdparsing: PWR_CMD_DELAY\n")); 102 if (GET_PWR_CFG_VALUE(pwrcfgcmd) == PWRSEQ_DELAY_US) 103 udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd)); 104 else 105 udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd)*1000); 106 break; 107 case PWR_CMD_END: 108 /* When this command is parsed, end the process */ 109 RT_TRACE(_module_hal_init_c_, _drv_info_, 110 ("rtl88eu_pwrseqcmdparsing: PWR_CMD_END\n")); 111 return true; 112 default: 113 RT_TRACE(_module_hal_init_c_, _drv_err_, 114 ("rtl88eu_pwrseqcmdparsing: Unknown CMD!!\n")); 115 break; 116 } 117 } 118 119 aryidx++;/* Add Array Index */ 120 } while (1); 121 return true; 122} 123