1/* 2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. 3 * All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program; if not, write to the Free Software Foundation, Inc., 17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * File: device.h 20 * 21 * Purpose: MAC Data structure 22 * 23 * Author: Tevin Chen 24 * 25 * Date: Mar 17, 1997 26 * 27 */ 28 29#ifndef __DEVICE_H__ 30#define __DEVICE_H__ 31 32#include <linux/module.h> 33#include <linux/types.h> 34#include <linux/mm.h> 35#include <linux/errno.h> 36#include <linux/ioport.h> 37#include <linux/pci.h> 38#include <linux/kernel.h> 39#include <linux/netdevice.h> 40#include <linux/etherdevice.h> 41#include <linux/skbuff.h> 42#include <linux/delay.h> 43#include <linux/timer.h> 44#include <linux/slab.h> 45#include <linux/interrupt.h> 46#include <linux/string.h> 47#include <linux/wait.h> 48#include <linux/if_arp.h> 49#include <linux/sched.h> 50#include <linux/io.h> 51#include <linux/if.h> 52#include <linux/crc32.h> 53#include <linux/uaccess.h> 54#include <linux/proc_fs.h> 55#include <linux/inetdevice.h> 56#include <linux/reboot.h> 57#include <linux/ethtool.h> 58/* Include Wireless Extension definition and check version - Jean II */ 59#include <net/mac80211.h> 60#include <linux/wireless.h> 61#include <net/iw_handler.h> /* New driver API */ 62 63#ifndef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT 64#define WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT 65#endif 66 67/* device specific */ 68 69#include "device_cfg.h" 70#include "card.h" 71#include "mib.h" 72#include "srom.h" 73#include "desc.h" 74#include "key.h" 75#include "mac.h" 76 77/*--------------------- Export Definitions -------------------------*/ 78 79#define RATE_1M 0 80#define RATE_2M 1 81#define RATE_5M 2 82#define RATE_11M 3 83#define RATE_6M 4 84#define RATE_9M 5 85#define RATE_12M 6 86#define RATE_18M 7 87#define RATE_24M 8 88#define RATE_36M 9 89#define RATE_48M 10 90#define RATE_54M 11 91#define RATE_AUTO 12 92#define MAX_RATE 12 93 94#define MAC_MAX_CONTEXT_REG (256+128) 95 96#define MAX_MULTICAST_ADDRESS_NUM 32 97#define MULTICAST_ADDRESS_LIST_SIZE (MAX_MULTICAST_ADDRESS_NUM * ETH_ALEN) 98 99#define DUPLICATE_RX_CACHE_LENGTH 5 100 101#define NUM_KEY_ENTRY 11 102 103#define TX_WEP_NONE 0 104#define TX_WEP_OTF 1 105#define TX_WEP_SW 2 106#define TX_WEP_SWOTP 3 107#define TX_WEP_OTPSW 4 108#define TX_WEP_SW232 5 109 110#define KEYSEL_WEP40 0 111#define KEYSEL_WEP104 1 112#define KEYSEL_TKIP 2 113#define KEYSEL_CCMP 3 114 115#define AUTO_FB_NONE 0 116#define AUTO_FB_0 1 117#define AUTO_FB_1 2 118 119#define FB_RATE0 0 120#define FB_RATE1 1 121 122/* Antenna Mode */ 123#define ANT_A 0 124#define ANT_B 1 125#define ANT_DIVERSITY 2 126#define ANT_RXD_TXA 3 127#define ANT_RXD_TXB 4 128#define ANT_UNKNOWN 0xFF 129 130#define MAXCHECKHANGCNT 4 131 132#define BB_VGA_LEVEL 4 133#define BB_VGA_CHANGE_THRESHOLD 16 134 135#ifndef RUN_AT 136#define RUN_AT(x) (jiffies+(x)) 137#endif 138 139#define MAKE_BEACON_RESERVED 10 /* (us) */ 140 141/* DMA related */ 142#define RESERV_AC0DMA 4 143 144/* BUILD OBJ mode */ 145 146#define AVAIL_TD(p, q) ((p)->sOpts.nTxDescs[(q)] - ((p)->iTDUsed[(q)])) 147 148#define NUM 64 149 150/* 0:11A 1:11B 2:11G */ 151#define BB_TYPE_11A 0 152#define BB_TYPE_11B 1 153#define BB_TYPE_11G 2 154 155/* 0:11a, 1:11b, 2:11gb (only CCK in BasicRate), 3:11ga (OFDM in BasicRate) */ 156#define PK_TYPE_11A 0 157#define PK_TYPE_11B 1 158#define PK_TYPE_11GB 2 159#define PK_TYPE_11GA 3 160 161typedef struct __chip_info_tbl { 162 CHIP_TYPE chip_id; 163 char *name; 164 int io_size; 165 int nTxQueue; 166 u32 flags; 167} CHIP_INFO, *PCHIP_INFO; 168 169typedef enum { 170 OWNED_BY_HOST = 0, 171 OWNED_BY_NIC = 1 172} DEVICE_OWNER_TYPE, *PDEVICE_OWNER_TYPE; 173 174/* flags for options */ 175#define DEVICE_FLAGS_IP_ALIGN 0x00000001UL 176#define DEVICE_FLAGS_PREAMBLE_TYPE 0x00000002UL 177#define DEVICE_FLAGS_OP_MODE 0x00000004UL 178#define DEVICE_FLAGS_PS_MODE 0x00000008UL 179#define DEVICE_FLAGS_80211h_MODE 0x00000010UL 180#define DEVICE_FLAGS_DiversityANT 0x00000020UL 181 182/* flags for driver status */ 183#define DEVICE_FLAGS_OPENED 0x00010000UL 184#define DEVICE_FLAGS_WOL_ENABLED 0x00080000UL 185/* flags for capabilities */ 186#define DEVICE_FLAGS_TX_ALIGN 0x01000000UL 187#define DEVICE_FLAGS_HAVE_CAM 0x02000000UL 188#define DEVICE_FLAGS_FLOW_CTRL 0x04000000UL 189 190/* flags for MII status */ 191#define DEVICE_LINK_FAIL 0x00000001UL 192#define DEVICE_SPEED_10 0x00000002UL 193#define DEVICE_SPEED_100 0x00000004UL 194#define DEVICE_SPEED_1000 0x00000008UL 195#define DEVICE_DUPLEX_FULL 0x00000010UL 196#define DEVICE_AUTONEG_ENABLE 0x00000020UL 197#define DEVICE_FORCED_BY_EEPROM 0x00000040UL 198/* for device_set_media_duplex */ 199#define DEVICE_LINK_CHANGE 0x00000001UL 200 201typedef struct __device_opt { 202 int nRxDescs0; /* Number of RX descriptors0 */ 203 int nRxDescs1; /* Number of RX descriptors1 */ 204 int nTxDescs[2]; /* Number of TX descriptors 0, 1 */ 205 int int_works; /* interrupt limits */ 206 int short_retry; 207 int long_retry; 208 int bbp_type; 209 u32 flags; 210} OPTIONS, *POPTIONS; 211 212struct vnt_private { 213 struct pci_dev *pcid; 214 /* mac80211 */ 215 struct ieee80211_hw *hw; 216 struct ieee80211_vif *vif; 217 unsigned long key_entry_inuse; 218 u32 basic_rates; 219 u16 current_aid; 220 int mc_list_count; 221 u8 mac_hw; 222 223/* dma addr, rx/tx pool */ 224 dma_addr_t pool_dma; 225 dma_addr_t rd0_pool_dma; 226 dma_addr_t rd1_pool_dma; 227 228 dma_addr_t td0_pool_dma; 229 dma_addr_t td1_pool_dma; 230 231 dma_addr_t tx_bufs_dma0; 232 dma_addr_t tx_bufs_dma1; 233 dma_addr_t tx_beacon_dma; 234 235 unsigned char *tx0_bufs; 236 unsigned char *tx1_bufs; 237 unsigned char *tx_beacon_bufs; 238 239 CHIP_TYPE chip_id; 240 241 void __iomem *PortOffset; 242 unsigned long dwIsr; 243 u32 memaddr; 244 u32 ioaddr; 245 u32 io_size; 246 247 unsigned char byRevId; 248 unsigned char byRxMode; 249 unsigned short SubSystemID; 250 unsigned short SubVendorID; 251 252 spinlock_t lock; 253 254 int nTxQueues; 255 volatile int iTDUsed[TYPE_MAXTD]; 256 257 volatile PSTxDesc apCurrTD[TYPE_MAXTD]; 258 volatile PSTxDesc apTailTD[TYPE_MAXTD]; 259 260 volatile PSTxDesc apTD0Rings; 261 volatile PSTxDesc apTD1Rings; 262 263 volatile PSRxDesc aRD0Ring; 264 volatile PSRxDesc aRD1Ring; 265 volatile PSRxDesc pCurrRD[TYPE_MAXRD]; 266 267 OPTIONS sOpts; 268 269 u32 flags; 270 271 u32 rx_buf_sz; 272 u8 rx_rate; 273 int multicast_limit; 274 275 u32 rx_bytes; 276 277 /* Version control */ 278 unsigned char byLocalID; 279 unsigned char byRFType; 280 281 unsigned char byMaxPwrLevel; 282 unsigned char byZoneType; 283 bool bZoneRegExist; 284 unsigned char byOriginalZonetype; 285 286 unsigned char abyCurrentNetAddr[ETH_ALEN]; __aligned(2) 287 bool bLinkPass; /* link status: OK or fail */ 288 289 /* Adapter statistics */ 290 SStatCounter scStatistic; 291 /* 802.11 counter */ 292 SDot11Counters s802_11Counter; 293 294 unsigned int uCurrRSSI; 295 unsigned char byCurrSQ; 296 297 unsigned long dwTxAntennaSel; 298 unsigned long dwRxAntennaSel; 299 unsigned char byAntennaCount; 300 unsigned char byRxAntennaMode; 301 unsigned char byTxAntennaMode; 302 bool bTxRxAntInv; 303 304 unsigned char *pbyTmpBuff; 305 unsigned int uSIFS; /* Current SIFS */ 306 unsigned int uDIFS; /* Current DIFS */ 307 unsigned int uEIFS; /* Current EIFS */ 308 unsigned int uSlot; /* Current SlotTime */ 309 unsigned int uCwMin; /* Current CwMin */ 310 unsigned int uCwMax; /* CwMax is fixed on 1023. */ 311 /* PHY parameter */ 312 unsigned char bySIFS; 313 unsigned char byDIFS; 314 unsigned char byEIFS; 315 unsigned char bySlot; 316 unsigned char byCWMaxMin; 317 318 u8 byBBType; /* 0:11A, 1:11B, 2:11G */ 319 u8 byPacketType; /* 320 * 0:11a,1:11b,2:11gb (only CCK 321 * in BasicRate), 3:11ga (OFDM in 322 * Basic Rate) 323 */ 324 unsigned short wBasicRate; 325 unsigned char byACKRate; 326 unsigned char byTopOFDMBasicRate; 327 unsigned char byTopCCKBasicRate; 328 329 unsigned char byMinChannel; 330 unsigned char byMaxChannel; 331 332 unsigned char byPreambleType; 333 unsigned char byShortPreamble; 334 335 unsigned short wCurrentRate; 336 unsigned char byShortRetryLimit; 337 unsigned char byLongRetryLimit; 338 enum nl80211_iftype op_mode; 339 bool bBSSIDFilter; 340 unsigned short wMaxTransmitMSDULifetime; 341 342 bool bEncryptionEnable; 343 bool bLongHeader; 344 bool bShortSlotTime; 345 bool bProtectMode; 346 bool bNonERPPresent; 347 bool bBarkerPreambleMd; 348 349 bool bRadioControlOff; 350 bool bRadioOff; 351 bool bEnablePSMode; 352 unsigned short wListenInterval; 353 bool bPWBitOn; 354 355 /* GPIO Radio Control */ 356 unsigned char byRadioCtl; 357 unsigned char byGPIO; 358 bool bHWRadioOff; 359 bool bPrvActive4RadioOFF; 360 bool bGPIOBlockRead; 361 362 /* Beacon related */ 363 unsigned short wSeqCounter; 364 unsigned short wBCNBufLen; 365 bool bBeaconBufReady; 366 bool bBeaconSent; 367 bool bIsBeaconBufReadySet; 368 unsigned int cbBeaconBufReadySetCnt; 369 bool bFixRate; 370 u16 byCurrentCh; 371 372 bool bAES; 373 374 unsigned char byAutoFBCtrl; 375 376 /* For Update BaseBand VGA Gain Offset */ 377 bool bUpdateBBVGA; 378 unsigned int uBBVGADiffCount; 379 unsigned char byBBVGANew; 380 unsigned char byBBVGACurrent; 381 unsigned char abyBBVGA[BB_VGA_LEVEL]; 382 long ldBmThreshold[BB_VGA_LEVEL]; 383 384 unsigned char byBBPreEDRSSI; 385 unsigned char byBBPreEDIndex; 386 387 unsigned long dwDiagRefCount; 388 389 /* For FOE Tuning */ 390 unsigned char byFOETuning; 391 392 /* For RF Power table */ 393 unsigned char byCCKPwr; 394 unsigned char byOFDMPwrG; 395 unsigned char byCurPwr; 396 char byCurPwrdBm; 397 unsigned char abyCCKPwrTbl[CB_MAX_CHANNEL_24G+1]; 398 unsigned char abyOFDMPwrTbl[CB_MAX_CHANNEL+1]; 399 char abyCCKDefaultPwr[CB_MAX_CHANNEL_24G+1]; 400 char abyOFDMDefaultPwr[CB_MAX_CHANNEL+1]; 401 char abyRegPwr[CB_MAX_CHANNEL+1]; 402 char abyLocalPwr[CB_MAX_CHANNEL+1]; 403 404 /* BaseBand Loopback Use */ 405 unsigned char byBBCR4d; 406 unsigned char byBBCRc9; 407 unsigned char byBBCR88; 408 unsigned char byBBCR09; 409 410 unsigned char abyEEPROM[EEP_MAX_CONTEXT_SIZE]; /* unsigned long alignment */ 411 412 unsigned short wBeaconInterval; 413}; 414 415static inline PDEVICE_RD_INFO alloc_rd_info(void) 416{ 417 return kzalloc(sizeof(DEVICE_RD_INFO), GFP_ATOMIC); 418} 419 420static inline PDEVICE_TD_INFO alloc_td_info(void) 421{ 422 return kzalloc(sizeof(DEVICE_TD_INFO), GFP_ATOMIC); 423} 424#endif 425