1/* 2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. 3 * All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program; if not, write to the Free Software Foundation, Inc., 17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * 20 * File: mac.h 21 * 22 * Purpose: MAC routines 23 * 24 * Author: Tevin Chen 25 * 26 * Date: May 21, 1996 27 * 28 * Revision History: 29 * 07-01-2003 Bryan YC Fan: Re-write codes to support VT3253 spec. 30 * 08-25-2003 Kyle Hsu: Porting MAC functions from sim53. 31 * 09-03-2003 Bryan YC Fan: Add MACvDisableProtectMD & MACvEnableProtectMD 32 */ 33 34#ifndef __MAC_H__ 35#define __MAC_H__ 36 37#include "device.h" 38 39#define REV_ID_VT3253_A0 0x00 40#define REV_ID_VT3253_A1 0x01 41#define REV_ID_VT3253_B0 0x08 42#define REV_ID_VT3253_B1 0x09 43 44/* Registers in the MAC */ 45#define MAC_REG_BISTCMD 0x04 46#define MAC_REG_BISTSR0 0x05 47#define MAC_REG_BISTSR1 0x06 48#define MAC_REG_BISTSR2 0x07 49#define MAC_REG_I2MCSR 0x08 50#define MAC_REG_I2MTGID 0x09 51#define MAC_REG_I2MTGAD 0x0a 52#define MAC_REG_I2MCFG 0x0b 53#define MAC_REG_I2MDIPT 0x0c 54#define MAC_REG_I2MDOPT 0x0e 55#define MAC_REG_USBSUS 0x0f 56 57#define MAC_REG_LOCALID 0x14 58#define MAC_REG_TESTCFG 0x15 59#define MAC_REG_JUMPER0 0x16 60#define MAC_REG_JUMPER1 0x17 61#define MAC_REG_TMCTL 0x18 62#define MAC_REG_TMDATA0 0x1c 63#define MAC_REG_TMDATA1 0x1d 64#define MAC_REG_TMDATA2 0x1e 65#define MAC_REG_TMDATA3 0x1f 66 67/* MAC Parameter related */ 68#define MAC_REG_LRT 0x20 69#define MAC_REG_SRT 0x21 70#define MAC_REG_SIFS 0x22 71#define MAC_REG_DIFS 0x23 72#define MAC_REG_EIFS 0x24 73#define MAC_REG_SLOT 0x25 74#define MAC_REG_BI 0x26 75#define MAC_REG_CWMAXMIN0 0x28 76#define MAC_REG_LINKOFFTOTM 0x2a 77#define MAC_REG_SWTMOT 0x2b 78#define MAC_REG_RTSOKCNT 0x2c 79#define MAC_REG_RTSFAILCNT 0x2d 80#define MAC_REG_ACKFAILCNT 0x2e 81#define MAC_REG_FCSERRCNT 0x2f 82 83/* TSF Related */ 84#define MAC_REG_TSFCNTR 0x30 85#define MAC_REG_NEXTTBTT 0x38 86#define MAC_REG_TSFOFST 0x40 87#define MAC_REG_TFTCTL 0x48 88 89/* WMAC Control/Status Related */ 90#define MAC_REG_ENCFG0 0x4c 91#define MAC_REG_ENCFG1 0x4d 92#define MAC_REG_ENCFG2 0x4e 93 94#define MAC_REG_CFG 0x50 95#define MAC_REG_TEST 0x52 96#define MAC_REG_HOSTCR 0x54 97#define MAC_REG_MACCR 0x55 98#define MAC_REG_RCR 0x56 99#define MAC_REG_TCR 0x57 100#define MAC_REG_IMR 0x58 101#define MAC_REG_ISR 0x5c 102#define MAC_REG_ISR1 0x5d 103 104/* Power Saving Related */ 105#define MAC_REG_PSCFG 0x60 106#define MAC_REG_PSCTL 0x61 107#define MAC_REG_PSPWRSIG 0x62 108#define MAC_REG_BBCR13 0x63 109#define MAC_REG_AIDATIM 0x64 110#define MAC_REG_PWBT 0x66 111#define MAC_REG_WAKEOKTMR 0x68 112#define MAC_REG_CALTMR 0x69 113#define MAC_REG_SYNSPACCNT 0x6a 114#define MAC_REG_WAKSYNOPT 0x6b 115 116/* Baseband/IF Control Group */ 117#define MAC_REG_BBREGCTL 0x6c 118#define MAC_REG_CHANNEL 0x6d 119#define MAC_REG_BBREGADR 0x6e 120#define MAC_REG_BBREGDATA 0x6f 121#define MAC_REG_IFREGCTL 0x70 122#define MAC_REG_IFDATA 0x71 123#define MAC_REG_ITRTMSET 0x74 124#define MAC_REG_PAPEDELAY 0x77 125#define MAC_REG_SOFTPWRCTL 0x78 126#define MAC_REG_SOFTPWRCTL2 0x79 127#define MAC_REG_GPIOCTL0 0x7a 128#define MAC_REG_GPIOCTL1 0x7b 129 130/* MiscFF PIO related */ 131#define MAC_REG_MISCFFNDEX 0xbc 132#define MAC_REG_MISCFFCTL 0xbe 133#define MAC_REG_MISCFFDATA 0xc0 134 135/* MAC Configuration Group */ 136#define MAC_REG_PAR0 0xc4 137#define MAC_REG_PAR4 0xc8 138#define MAC_REG_BSSID0 0xcc 139#define MAC_REG_BSSID4 0xd0 140#define MAC_REG_MAR0 0xd4 141#define MAC_REG_MAR4 0xd8 142 143/* MAC RSPPKT INFO Group */ 144#define MAC_REG_RSPINF_B_1 0xdC 145#define MAC_REG_RSPINF_B_2 0xe0 146#define MAC_REG_RSPINF_B_5 0xe4 147#define MAC_REG_RSPINF_B_11 0xe8 148#define MAC_REG_RSPINF_A_6 0xec 149#define MAC_REG_RSPINF_A_9 0xee 150#define MAC_REG_RSPINF_A_12 0xf0 151#define MAC_REG_RSPINF_A_18 0xf2 152#define MAC_REG_RSPINF_A_24 0xf4 153#define MAC_REG_RSPINF_A_36 0xf6 154#define MAC_REG_RSPINF_A_48 0xf8 155#define MAC_REG_RSPINF_A_54 0xfa 156#define MAC_REG_RSPINF_A_72 0xfc 157 158/* Bits in the I2MCFG EEPROM register */ 159#define I2MCFG_BOUNDCTL 0x80 160#define I2MCFG_WAITCTL 0x20 161#define I2MCFG_SCLOECTL 0x10 162#define I2MCFG_WBUSYCTL 0x08 163#define I2MCFG_NORETRY 0x04 164#define I2MCFG_I2MLDSEQ 0x02 165#define I2MCFG_I2CMFAST 0x01 166 167/* Bits in the I2MCSR EEPROM register */ 168#define I2MCSR_EEMW 0x80 169#define I2MCSR_EEMR 0x40 170#define I2MCSR_AUTOLD 0x08 171#define I2MCSR_NACK 0x02 172#define I2MCSR_DONE 0x01 173 174/* Bits in the TMCTL register */ 175#define TMCTL_TSUSP 0x04 176#define TMCTL_TMD 0x02 177#define TMCTL_TE 0x01 178 179/* Bits in the TFTCTL register */ 180#define TFTCTL_HWUTSF 0x80 181#define TFTCTL_TBTTSYNC 0x40 182#define TFTCTL_HWUTSFEN 0x20 183#define TFTCTL_TSFCNTRRD 0x10 184#define TFTCTL_TBTTSYNCEN 0x08 185#define TFTCTL_TSFSYNCEN 0x04 186#define TFTCTL_TSFCNTRST 0x02 187#define TFTCTL_TSFCNTREN 0x01 188 189/* Bits in the EnhanceCFG_0 register */ 190#define EnCFG_BBType_a 0x00 191#define EnCFG_BBType_b 0x01 192#define EnCFG_BBType_g 0x02 193#define EnCFG_BBType_MASK 0x03 194#define EnCFG_ProtectMd 0x20 195 196/* Bits in the EnhanceCFG_1 register */ 197#define EnCFG_BcnSusInd 0x01 198#define EnCFG_BcnSusClr 0x02 199 200/* Bits in the EnhanceCFG_2 register */ 201#define EnCFG_NXTBTTCFPSTR 0x01 202#define EnCFG_BarkerPream 0x02 203#define EnCFG_PktBurstMode 0x04 204 205/* Bits in the CFG register */ 206#define CFG_TKIPOPT 0x80 207#define CFG_RXDMAOPT 0x40 208#define CFG_TMOT_SW 0x20 209#define CFG_TMOT_HWLONG 0x10 210#define CFG_TMOT_HW 0x00 211#define CFG_CFPENDOPT 0x08 212#define CFG_BCNSUSEN 0x04 213#define CFG_NOTXTIMEOUT 0x02 214#define CFG_NOBUFOPT 0x01 215 216/* Bits in the TEST register */ 217#define TEST_LBEXT 0x80 218#define TEST_LBINT 0x40 219#define TEST_LBNONE 0x00 220#define TEST_SOFTINT 0x20 221#define TEST_CONTTX 0x10 222#define TEST_TXPE 0x08 223#define TEST_NAVDIS 0x04 224#define TEST_NOCTS 0x02 225#define TEST_NOACK 0x01 226 227/* Bits in the HOSTCR register */ 228#define HOSTCR_TXONST 0x80 229#define HOSTCR_RXONST 0x40 230#define HOSTCR_ADHOC 0x20 231#define HOSTCR_AP 0x10 232#define HOSTCR_TXON 0x08 233#define HOSTCR_RXON 0x04 234#define HOSTCR_MACEN 0x02 235#define HOSTCR_SOFTRST 0x01 236 237/* Bits in the MACCR register */ 238#define MACCR_SYNCFLUSHOK 0x04 239#define MACCR_SYNCFLUSH 0x02 240#define MACCR_CLRNAV 0x01 241 242/* Bits in the RCR register */ 243#define RCR_SSID 0x80 244#define RCR_RXALLTYPE 0x40 245#define RCR_UNICAST 0x20 246#define RCR_BROADCAST 0x10 247#define RCR_MULTICAST 0x08 248#define RCR_WPAERR 0x04 249#define RCR_ERRCRC 0x02 250#define RCR_BSSID 0x01 251 252/* Bits in the TCR register */ 253#define TCR_SYNCDCFOPT 0x02 254#define TCR_AUTOBCNTX 0x01 255 256/* ISR1 */ 257#define ISR_GPIO3 0x40 258#define ISR_RXNOBUF 0x08 259#define ISR_MIBNEARFULL 0x04 260#define ISR_SOFTINT 0x02 261#define ISR_FETALERR 0x01 262 263#define LEDSTS_STS 0x06 264#define LEDSTS_TMLEN 0x78 265#define LEDSTS_OFF 0x00 266#define LEDSTS_ON 0x02 267#define LEDSTS_SLOW 0x04 268#define LEDSTS_INTER 0x06 269 270/* ISR0 */ 271#define ISR_WATCHDOG 0x80 272#define ISR_SOFTTIMER 0x40 273#define ISR_GPIO0 0x20 274#define ISR_TBTT 0x10 275#define ISR_RXDMA0 0x08 276#define ISR_BNTX 0x04 277#define ISR_ACTX 0x01 278 279/* Bits in the PSCFG register */ 280#define PSCFG_PHILIPMD 0x40 281#define PSCFG_WAKECALEN 0x20 282#define PSCFG_WAKETMREN 0x10 283#define PSCFG_BBPSPROG 0x08 284#define PSCFG_WAKESYN 0x04 285#define PSCFG_SLEEPSYN 0x02 286#define PSCFG_AUTOSLEEP 0x01 287 288/* Bits in the PSCTL register */ 289#define PSCTL_WAKEDONE 0x20 290#define PSCTL_PS 0x10 291#define PSCTL_GO2DOZE 0x08 292#define PSCTL_LNBCN 0x04 293#define PSCTL_ALBCN 0x02 294#define PSCTL_PSEN 0x01 295 296/* Bits in the PSPWSIG register */ 297#define PSSIG_WPE3 0x80 298#define PSSIG_WPE2 0x40 299#define PSSIG_WPE1 0x20 300#define PSSIG_WRADIOPE 0x10 301#define PSSIG_SPE3 0x08 302#define PSSIG_SPE2 0x04 303#define PSSIG_SPE1 0x02 304#define PSSIG_SRADIOPE 0x01 305 306/* Bits in the BBREGCTL register */ 307#define BBREGCTL_DONE 0x04 308#define BBREGCTL_REGR 0x02 309#define BBREGCTL_REGW 0x01 310 311/* Bits in the IFREGCTL register */ 312#define IFREGCTL_DONE 0x04 313#define IFREGCTL_IFRF 0x02 314#define IFREGCTL_REGW 0x01 315 316/* Bits in the SOFTPWRCTL register */ 317#define SOFTPWRCTL_RFLEOPT 0x08 318#define SOFTPWRCTL_TXPEINV 0x02 319#define SOFTPWRCTL_SWPECTI 0x01 320#define SOFTPWRCTL_SWPAPE 0x20 321#define SOFTPWRCTL_SWCALEN 0x10 322#define SOFTPWRCTL_SWRADIO_PE 0x08 323#define SOFTPWRCTL_SWPE2 0x04 324#define SOFTPWRCTL_SWPE1 0x02 325#define SOFTPWRCTL_SWPE3 0x01 326 327/* Bits in the GPIOCTL1 register */ 328#define GPIO3_MD 0x20 329#define GPIO3_DATA 0x40 330#define GPIO3_INTMD 0x80 331 332/* Bits in the MISCFFCTL register */ 333#define MISCFFCTL_WRITE 0x0001 334 335/* Loopback mode */ 336#define MAC_LB_EXT 0x02 337#define MAC_LB_INTERNAL 0x01 338#define MAC_LB_NONE 0x00 339 340/* Ethernet address filter type */ 341#define PKT_TYPE_NONE 0x00 /* turn off receiver */ 342#define PKT_TYPE_ALL_MULTICAST 0x80 343#define PKT_TYPE_PROMISCUOUS 0x40 344#define PKT_TYPE_DIRECTED 0x20 /* obselete */ 345#define PKT_TYPE_BROADCAST 0x10 346#define PKT_TYPE_MULTICAST 0x08 347#define PKT_TYPE_ERROR_WPA 0x04 348#define PKT_TYPE_ERROR_CRC 0x02 349#define PKT_TYPE_BSSID 0x01 350 351#define Default_BI 0x200 352 353/* MiscFIFO Offset */ 354#define MISCFIFO_KEYETRY0 32 355#define MISCFIFO_KEYENTRYSIZE 22 356 357#define MAC_REVISION_A0 0x00 358#define MAC_REVISION_A1 0x01 359 360struct vnt_mac_set_key { 361 union { 362 struct { 363 u8 addr[ETH_ALEN]; 364 __le16 key_ctl; 365 } write __packed; 366 u32 swap[2]; 367 } u; 368 u8 key[WLAN_KEY_LEN_CCMP]; 369} __packed; 370 371void vnt_mac_set_filter(struct vnt_private *, u64); 372void vnt_mac_shutdown(struct vnt_private *); 373void vnt_mac_set_bb_type(struct vnt_private *, u8); 374void vnt_mac_disable_keyentry(struct vnt_private *, u8); 375void vnt_mac_set_keyentry(struct vnt_private *, u16, u32, u32, u8 *, u8 *); 376void vnt_mac_reg_bits_off(struct vnt_private *, u8, u8); 377void vnt_mac_reg_bits_on(struct vnt_private *, u8, u8); 378void vnt_mac_write_word(struct vnt_private *, u8, u16); 379void vnt_mac_set_bssid_addr(struct vnt_private *, u8 *); 380void vnt_mac_enable_protect_mode(struct vnt_private *); 381void vnt_mac_disable_protect_mode(struct vnt_private *); 382void vnt_mac_enable_barker_preamble_mode(struct vnt_private *); 383void vnt_mac_disable_barker_preamble_mode(struct vnt_private *); 384void vnt_mac_set_beacon_interval(struct vnt_private *, u16); 385void vnt_mac_set_led(struct vnt_private *priv, u8, u8); 386 387#endif /* __MAC_H__ */ 388