1/*
2 *  Driver for 8250/16550-type serial ports
3 *
4 *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
5 *
6 *  Copyright (C) 2001 Russell King.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/serial_8250.h>
15#include <linux/serial_reg.h>
16#include <linux/dmaengine.h>
17
18struct uart_8250_dma {
19	int (*tx_dma)(struct uart_8250_port *p);
20	int (*rx_dma)(struct uart_8250_port *p, unsigned int iir);
21
22	/* Filter function */
23	dma_filter_fn		fn;
24	/* Parameter to the filter function */
25	void			*rx_param;
26	void			*tx_param;
27
28	struct dma_slave_config	rxconf;
29	struct dma_slave_config	txconf;
30
31	struct dma_chan		*rxchan;
32	struct dma_chan		*txchan;
33
34	dma_addr_t		rx_addr;
35	dma_addr_t		tx_addr;
36
37	dma_cookie_t		rx_cookie;
38	dma_cookie_t		tx_cookie;
39
40	void			*rx_buf;
41
42	size_t			rx_size;
43	size_t			tx_size;
44
45	unsigned char		tx_running:1;
46	unsigned char		tx_err: 1;
47	unsigned char		rx_running:1;
48};
49
50struct old_serial_port {
51	unsigned int uart;
52	unsigned int baud_base;
53	unsigned int port;
54	unsigned int irq;
55	upf_t        flags;
56	unsigned char hub6;
57	unsigned char io_type;
58	unsigned char __iomem *iomem_base;
59	unsigned short iomem_reg_shift;
60	unsigned long irqflags;
61};
62
63struct serial8250_config {
64	const char	*name;
65	unsigned short	fifo_size;
66	unsigned short	tx_loadsz;
67	unsigned char	fcr;
68	unsigned char	rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
69	unsigned int	flags;
70};
71
72#define UART_CAP_FIFO	(1 << 8)	/* UART has FIFO */
73#define UART_CAP_EFR	(1 << 9)	/* UART has EFR */
74#define UART_CAP_SLEEP	(1 << 10)	/* UART has IER sleep */
75#define UART_CAP_AFE	(1 << 11)	/* MCR-based hw flow control */
76#define UART_CAP_UUE	(1 << 12)	/* UART needs IER bit 6 set (Xscale) */
77#define UART_CAP_RTOIE	(1 << 13)	/* UART needs IER bit 4 set (Xscale, Tegra) */
78#define UART_CAP_HFIFO	(1 << 14)	/* UART has a "hidden" FIFO */
79#define UART_CAP_RPM	(1 << 15)	/* Runtime PM is active while idle */
80
81#define UART_BUG_QUOT	(1 << 0)	/* UART has buggy quot LSB */
82#define UART_BUG_TXEN	(1 << 1)	/* UART has buggy TX IIR status */
83#define UART_BUG_NOMSR	(1 << 2)	/* UART has buggy MSR status bits (Au1x00) */
84#define UART_BUG_THRE	(1 << 3)	/* UART has buggy THRE reassertion */
85#define UART_BUG_PARITY	(1 << 4)	/* UART mishandles parity if FIFO enabled */
86
87#define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
88
89#ifdef CONFIG_SERIAL_8250_SHARE_IRQ
90#define SERIAL8250_SHARE_IRQS 1
91#else
92#define SERIAL8250_SHARE_IRQS 0
93#endif
94
95static inline int serial_in(struct uart_8250_port *up, int offset)
96{
97	return up->port.serial_in(&up->port, offset);
98}
99
100static inline void serial_out(struct uart_8250_port *up, int offset, int value)
101{
102	up->port.serial_out(&up->port, offset, value);
103}
104
105void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
106
107static inline int serial_dl_read(struct uart_8250_port *up)
108{
109	return up->dl_read(up);
110}
111
112static inline void serial_dl_write(struct uart_8250_port *up, int value)
113{
114	up->dl_write(up, value);
115}
116
117struct uart_8250_port *serial8250_get_port(int line);
118void serial8250_rpm_get(struct uart_8250_port *p);
119void serial8250_rpm_put(struct uart_8250_port *p);
120
121#if defined(__alpha__) && !defined(CONFIG_PCI)
122/*
123 * Digital did something really horribly wrong with the OUT1 and OUT2
124 * lines on at least some ALPHA's.  The failure mode is that if either
125 * is cleared, the machine locks up with endless interrupts.
126 */
127#define ALPHA_KLUDGE_MCR  (UART_MCR_OUT2 | UART_MCR_OUT1)
128#else
129#define ALPHA_KLUDGE_MCR 0
130#endif
131
132#ifdef CONFIG_SERIAL_8250_PNP
133int serial8250_pnp_init(void);
134void serial8250_pnp_exit(void);
135#else
136static inline int serial8250_pnp_init(void) { return 0; }
137static inline void serial8250_pnp_exit(void) { }
138#endif
139
140#ifdef CONFIG_ARCH_OMAP1
141static inline int is_omap1_8250(struct uart_8250_port *pt)
142{
143	int res;
144
145	switch (pt->port.mapbase) {
146	case OMAP1_UART1_BASE:
147	case OMAP1_UART2_BASE:
148	case OMAP1_UART3_BASE:
149		res = 1;
150		break;
151	default:
152		res = 0;
153		break;
154	}
155
156	return res;
157}
158
159static inline int is_omap1510_8250(struct uart_8250_port *pt)
160{
161	if (!cpu_is_omap1510())
162		return 0;
163
164	return is_omap1_8250(pt);
165}
166#else
167static inline int is_omap1_8250(struct uart_8250_port *pt)
168{
169	return 0;
170}
171static inline int is_omap1510_8250(struct uart_8250_port *pt)
172{
173	return 0;
174}
175#endif
176
177#ifdef CONFIG_SERIAL_8250_DMA
178extern int serial8250_tx_dma(struct uart_8250_port *);
179extern int serial8250_rx_dma(struct uart_8250_port *, unsigned int iir);
180extern int serial8250_request_dma(struct uart_8250_port *);
181extern void serial8250_release_dma(struct uart_8250_port *);
182#else
183static inline int serial8250_tx_dma(struct uart_8250_port *p)
184{
185	return -1;
186}
187static inline int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir)
188{
189	return -1;
190}
191static inline int serial8250_request_dma(struct uart_8250_port *p)
192{
193	return -1;
194}
195static inline void serial8250_release_dma(struct uart_8250_port *p) { }
196#endif
197
198static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
199{
200	unsigned char status;
201
202	status = serial_in(up, 0x04); /* EXCR2 */
203#define PRESL(x) ((x) & 0x30)
204	if (PRESL(status) == 0x10) {
205		/* already in high speed mode */
206		return 0;
207	} else {
208		status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
209		status |= 0x10;  /* 1.625 divisor for baud_base --> 921600 */
210		serial_out(up, 0x04, status);
211	}
212	return 1;
213}
214