1/* 2 * 8250_dma.c - DMA Engine API support for 8250.c 3 * 4 * Copyright (C) 2013 Intel Corporation 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 */ 11#include <linux/tty.h> 12#include <linux/tty_flip.h> 13#include <linux/serial_reg.h> 14#include <linux/dma-mapping.h> 15 16#include "8250.h" 17 18static void __dma_tx_complete(void *param) 19{ 20 struct uart_8250_port *p = param; 21 struct uart_8250_dma *dma = p->dma; 22 struct circ_buf *xmit = &p->port.state->xmit; 23 unsigned long flags; 24 int ret; 25 26 dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr, 27 UART_XMIT_SIZE, DMA_TO_DEVICE); 28 29 spin_lock_irqsave(&p->port.lock, flags); 30 31 dma->tx_running = 0; 32 33 xmit->tail += dma->tx_size; 34 xmit->tail &= UART_XMIT_SIZE - 1; 35 p->port.icount.tx += dma->tx_size; 36 37 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 38 uart_write_wakeup(&p->port); 39 40 ret = serial8250_tx_dma(p); 41 if (ret) { 42 p->ier |= UART_IER_THRI; 43 serial_port_out(&p->port, UART_IER, p->ier); 44 } 45 46 spin_unlock_irqrestore(&p->port.lock, flags); 47} 48 49static void __dma_rx_complete(void *param) 50{ 51 struct uart_8250_port *p = param; 52 struct uart_8250_dma *dma = p->dma; 53 struct tty_port *tty_port = &p->port.state->port; 54 struct dma_tx_state state; 55 int count; 56 57 dma_sync_single_for_cpu(dma->rxchan->device->dev, dma->rx_addr, 58 dma->rx_size, DMA_FROM_DEVICE); 59 60 dma->rx_running = 0; 61 dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); 62 63 count = dma->rx_size - state.residue; 64 65 tty_insert_flip_string(tty_port, dma->rx_buf, count); 66 p->port.icount.rx += count; 67 68 tty_flip_buffer_push(tty_port); 69} 70 71int serial8250_tx_dma(struct uart_8250_port *p) 72{ 73 struct uart_8250_dma *dma = p->dma; 74 struct circ_buf *xmit = &p->port.state->xmit; 75 struct dma_async_tx_descriptor *desc; 76 int ret; 77 78 if (uart_tx_stopped(&p->port) || dma->tx_running || 79 uart_circ_empty(xmit)) 80 return 0; 81 82 dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); 83 84 desc = dmaengine_prep_slave_single(dma->txchan, 85 dma->tx_addr + xmit->tail, 86 dma->tx_size, DMA_MEM_TO_DEV, 87 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 88 if (!desc) { 89 ret = -EBUSY; 90 goto err; 91 } 92 93 dma->tx_running = 1; 94 desc->callback = __dma_tx_complete; 95 desc->callback_param = p; 96 97 dma->tx_cookie = dmaengine_submit(desc); 98 99 dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr, 100 UART_XMIT_SIZE, DMA_TO_DEVICE); 101 102 dma_async_issue_pending(dma->txchan); 103 if (dma->tx_err) { 104 dma->tx_err = 0; 105 if (p->ier & UART_IER_THRI) { 106 p->ier &= ~UART_IER_THRI; 107 serial_out(p, UART_IER, p->ier); 108 } 109 } 110 return 0; 111err: 112 dma->tx_err = 1; 113 return ret; 114} 115 116int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir) 117{ 118 struct uart_8250_dma *dma = p->dma; 119 struct dma_async_tx_descriptor *desc; 120 121 switch (iir & 0x3f) { 122 case UART_IIR_RLSI: 123 /* 8250_core handles errors and break interrupts */ 124 return -EIO; 125 case UART_IIR_RX_TIMEOUT: 126 /* 127 * If RCVR FIFO trigger level was not reached, complete the 128 * transfer and let 8250_core copy the remaining data. 129 */ 130 if (dma->rx_running) { 131 dmaengine_pause(dma->rxchan); 132 __dma_rx_complete(p); 133 dmaengine_terminate_all(dma->rxchan); 134 } 135 return -ETIMEDOUT; 136 default: 137 break; 138 } 139 140 if (dma->rx_running) 141 return 0; 142 143 desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr, 144 dma->rx_size, DMA_DEV_TO_MEM, 145 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 146 if (!desc) 147 return -EBUSY; 148 149 dma->rx_running = 1; 150 desc->callback = __dma_rx_complete; 151 desc->callback_param = p; 152 153 dma->rx_cookie = dmaengine_submit(desc); 154 155 dma_sync_single_for_device(dma->rxchan->device->dev, dma->rx_addr, 156 dma->rx_size, DMA_FROM_DEVICE); 157 158 dma_async_issue_pending(dma->rxchan); 159 160 return 0; 161} 162 163int serial8250_request_dma(struct uart_8250_port *p) 164{ 165 struct uart_8250_dma *dma = p->dma; 166 dma_cap_mask_t mask; 167 168 /* Default slave configuration parameters */ 169 dma->rxconf.direction = DMA_DEV_TO_MEM; 170 dma->rxconf.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; 171 dma->rxconf.src_addr = p->port.mapbase + UART_RX; 172 173 dma->txconf.direction = DMA_MEM_TO_DEV; 174 dma->txconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; 175 dma->txconf.dst_addr = p->port.mapbase + UART_TX; 176 177 dma_cap_zero(mask); 178 dma_cap_set(DMA_SLAVE, mask); 179 180 /* Get a channel for RX */ 181 dma->rxchan = dma_request_slave_channel_compat(mask, 182 dma->fn, dma->rx_param, 183 p->port.dev, "rx"); 184 if (!dma->rxchan) 185 return -ENODEV; 186 187 dmaengine_slave_config(dma->rxchan, &dma->rxconf); 188 189 /* Get a channel for TX */ 190 dma->txchan = dma_request_slave_channel_compat(mask, 191 dma->fn, dma->tx_param, 192 p->port.dev, "tx"); 193 if (!dma->txchan) { 194 dma_release_channel(dma->rxchan); 195 return -ENODEV; 196 } 197 198 dmaengine_slave_config(dma->txchan, &dma->txconf); 199 200 /* RX buffer */ 201 if (!dma->rx_size) 202 dma->rx_size = PAGE_SIZE; 203 204 dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size, 205 &dma->rx_addr, GFP_KERNEL); 206 if (!dma->rx_buf) 207 goto err; 208 209 /* TX buffer */ 210 dma->tx_addr = dma_map_single(dma->txchan->device->dev, 211 p->port.state->xmit.buf, 212 UART_XMIT_SIZE, 213 DMA_TO_DEVICE); 214 if (dma_mapping_error(dma->txchan->device->dev, dma->tx_addr)) { 215 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, 216 dma->rx_buf, dma->rx_addr); 217 goto err; 218 } 219 220 dev_dbg_ratelimited(p->port.dev, "got both dma channels\n"); 221 222 return 0; 223err: 224 dma_release_channel(dma->rxchan); 225 dma_release_channel(dma->txchan); 226 227 return -ENOMEM; 228} 229EXPORT_SYMBOL_GPL(serial8250_request_dma); 230 231void serial8250_release_dma(struct uart_8250_port *p) 232{ 233 struct uart_8250_dma *dma = p->dma; 234 235 if (!dma) 236 return; 237 238 /* Release RX resources */ 239 dmaengine_terminate_all(dma->rxchan); 240 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf, 241 dma->rx_addr); 242 dma_release_channel(dma->rxchan); 243 dma->rxchan = NULL; 244 245 /* Release TX resources */ 246 dmaengine_terminate_all(dma->txchan); 247 dma_unmap_single(dma->txchan->device->dev, dma->tx_addr, 248 UART_XMIT_SIZE, DMA_TO_DEVICE); 249 dma_release_channel(dma->txchan); 250 dma->txchan = NULL; 251 dma->tx_running = 0; 252 253 dev_dbg_ratelimited(p->port.dev, "dma channels released\n"); 254} 255EXPORT_SYMBOL_GPL(serial8250_release_dma); 256