1/*
2 * drivers/watchdog/shwdt.c
3 *
4 * Watchdog driver for integrated watchdog in the SuperH processors.
5 *
6 * Copyright (C) 2001 - 2012  Paul Mundt <lethal@linux-sh.org>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * 14-Dec-2001 Matt Domsch <Matt_Domsch@dell.com>
14 *     Added nowayout module option to override CONFIG_WATCHDOG_NOWAYOUT
15 *
16 * 19-Apr-2002 Rob Radez <rob@osinvestor.com>
17 *     Added expect close support, made emulated timeout runtime changeable
18 *     general cleanups, add some ioctls
19 */
20
21#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22
23#include <linux/module.h>
24#include <linux/moduleparam.h>
25#include <linux/platform_device.h>
26#include <linux/init.h>
27#include <linux/types.h>
28#include <linux/spinlock.h>
29#include <linux/watchdog.h>
30#include <linux/pm_runtime.h>
31#include <linux/fs.h>
32#include <linux/mm.h>
33#include <linux/slab.h>
34#include <linux/io.h>
35#include <linux/clk.h>
36#include <linux/err.h>
37#include <asm/watchdog.h>
38
39#define DRV_NAME "sh-wdt"
40
41/*
42 * Default clock division ratio is 5.25 msecs. For an additional table of
43 * values, consult the asm-sh/watchdog.h. Overload this at module load
44 * time.
45 *
46 * In order for this to work reliably we need to have HZ set to 1000 or
47 * something quite higher than 100 (or we need a proper high-res timer
48 * implementation that will deal with this properly), otherwise the 10ms
49 * resolution of a jiffy is enough to trigger the overflow. For things like
50 * the SH-4 and SH-5, this isn't necessarily that big of a problem, though
51 * for the SH-2 and SH-3, this isn't recommended unless the WDT is absolutely
52 * necssary.
53 *
54 * As a result of this timing problem, the only modes that are particularly
55 * feasible are the 4096 and the 2048 divisors, which yield 5.25 and 2.62ms
56 * overflow periods respectively.
57 *
58 * Also, since we can't really expect userspace to be responsive enough
59 * before the overflow happens, we maintain two separate timers .. One in
60 * the kernel for clearing out WOVF every 2ms or so (again, this depends on
61 * HZ == 1000), and another for monitoring userspace writes to the WDT device.
62 *
63 * As such, we currently use a configurable heartbeat interval which defaults
64 * to 30s. In this case, the userspace daemon is only responsible for periodic
65 * writes to the device before the next heartbeat is scheduled. If the daemon
66 * misses its deadline, the kernel timer will allow the WDT to overflow.
67 */
68static int clock_division_ratio = WTCSR_CKS_4096;
69#define next_ping_period(cks)	(jiffies + msecs_to_jiffies(cks - 4))
70
71#define WATCHDOG_HEARTBEAT 30			/* 30 sec default heartbeat */
72static int heartbeat = WATCHDOG_HEARTBEAT;	/* in seconds */
73static bool nowayout = WATCHDOG_NOWAYOUT;
74static unsigned long next_heartbeat;
75
76struct sh_wdt {
77	void __iomem		*base;
78	struct device		*dev;
79	struct clk		*clk;
80	spinlock_t		lock;
81
82	struct timer_list	timer;
83};
84
85static int sh_wdt_start(struct watchdog_device *wdt_dev)
86{
87	struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev);
88	unsigned long flags;
89	u8 csr;
90
91	pm_runtime_get_sync(wdt->dev);
92	clk_enable(wdt->clk);
93
94	spin_lock_irqsave(&wdt->lock, flags);
95
96	next_heartbeat = jiffies + (heartbeat * HZ);
97	mod_timer(&wdt->timer, next_ping_period(clock_division_ratio));
98
99	csr = sh_wdt_read_csr();
100	csr |= WTCSR_WT | clock_division_ratio;
101	sh_wdt_write_csr(csr);
102
103	sh_wdt_write_cnt(0);
104
105	/*
106	 * These processors have a bit of an inconsistent initialization
107	 * process.. starting with SH-3, RSTS was moved to WTCSR, and the
108	 * RSTCSR register was removed.
109	 *
110	 * On the SH-2 however, in addition with bits being in different
111	 * locations, we must deal with RSTCSR outright..
112	 */
113	csr = sh_wdt_read_csr();
114	csr |= WTCSR_TME;
115	csr &= ~WTCSR_RSTS;
116	sh_wdt_write_csr(csr);
117
118#ifdef CONFIG_CPU_SH2
119	csr = sh_wdt_read_rstcsr();
120	csr &= ~RSTCSR_RSTS;
121	sh_wdt_write_rstcsr(csr);
122#endif
123	spin_unlock_irqrestore(&wdt->lock, flags);
124
125	return 0;
126}
127
128static int sh_wdt_stop(struct watchdog_device *wdt_dev)
129{
130	struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev);
131	unsigned long flags;
132	u8 csr;
133
134	spin_lock_irqsave(&wdt->lock, flags);
135
136	del_timer(&wdt->timer);
137
138	csr = sh_wdt_read_csr();
139	csr &= ~WTCSR_TME;
140	sh_wdt_write_csr(csr);
141
142	spin_unlock_irqrestore(&wdt->lock, flags);
143
144	clk_disable(wdt->clk);
145	pm_runtime_put_sync(wdt->dev);
146
147	return 0;
148}
149
150static int sh_wdt_keepalive(struct watchdog_device *wdt_dev)
151{
152	struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev);
153	unsigned long flags;
154
155	spin_lock_irqsave(&wdt->lock, flags);
156	next_heartbeat = jiffies + (heartbeat * HZ);
157	spin_unlock_irqrestore(&wdt->lock, flags);
158
159	return 0;
160}
161
162static int sh_wdt_set_heartbeat(struct watchdog_device *wdt_dev, unsigned t)
163{
164	struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev);
165	unsigned long flags;
166
167	if (unlikely(t < 1 || t > 3600)) /* arbitrary upper limit */
168		return -EINVAL;
169
170	spin_lock_irqsave(&wdt->lock, flags);
171	heartbeat = t;
172	wdt_dev->timeout = t;
173	spin_unlock_irqrestore(&wdt->lock, flags);
174
175	return 0;
176}
177
178static void sh_wdt_ping(unsigned long data)
179{
180	struct sh_wdt *wdt = (struct sh_wdt *)data;
181	unsigned long flags;
182
183	spin_lock_irqsave(&wdt->lock, flags);
184	if (time_before(jiffies, next_heartbeat)) {
185		u8 csr;
186
187		csr = sh_wdt_read_csr();
188		csr &= ~WTCSR_IOVF;
189		sh_wdt_write_csr(csr);
190
191		sh_wdt_write_cnt(0);
192
193		mod_timer(&wdt->timer, next_ping_period(clock_division_ratio));
194	} else
195		dev_warn(wdt->dev, "Heartbeat lost! Will not ping "
196		         "the watchdog\n");
197	spin_unlock_irqrestore(&wdt->lock, flags);
198}
199
200static const struct watchdog_info sh_wdt_info = {
201	.options		= WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
202				  WDIOF_MAGICCLOSE,
203	.firmware_version	= 1,
204	.identity		= "SH WDT",
205};
206
207static const struct watchdog_ops sh_wdt_ops = {
208	.owner		= THIS_MODULE,
209	.start		= sh_wdt_start,
210	.stop		= sh_wdt_stop,
211	.ping		= sh_wdt_keepalive,
212	.set_timeout	= sh_wdt_set_heartbeat,
213};
214
215static struct watchdog_device sh_wdt_dev = {
216	.info	= &sh_wdt_info,
217	.ops	= &sh_wdt_ops,
218};
219
220static int sh_wdt_probe(struct platform_device *pdev)
221{
222	struct sh_wdt *wdt;
223	struct resource *res;
224	int rc;
225
226	/*
227	 * As this driver only covers the global watchdog case, reject
228	 * any attempts to register per-CPU watchdogs.
229	 */
230	if (pdev->id != -1)
231		return -EINVAL;
232
233	wdt = devm_kzalloc(&pdev->dev, sizeof(struct sh_wdt), GFP_KERNEL);
234	if (unlikely(!wdt))
235		return -ENOMEM;
236
237	wdt->dev = &pdev->dev;
238
239	wdt->clk = devm_clk_get(&pdev->dev, NULL);
240	if (IS_ERR(wdt->clk)) {
241		/*
242		 * Clock framework support is optional, continue on
243		 * anyways if we don't find a matching clock.
244		 */
245		wdt->clk = NULL;
246	}
247
248	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
249	wdt->base = devm_ioremap_resource(wdt->dev, res);
250	if (IS_ERR(wdt->base))
251		return PTR_ERR(wdt->base);
252
253	watchdog_set_nowayout(&sh_wdt_dev, nowayout);
254	watchdog_set_drvdata(&sh_wdt_dev, wdt);
255
256	spin_lock_init(&wdt->lock);
257
258	rc = sh_wdt_set_heartbeat(&sh_wdt_dev, heartbeat);
259	if (unlikely(rc)) {
260		/* Default timeout if invalid */
261		sh_wdt_set_heartbeat(&sh_wdt_dev, WATCHDOG_HEARTBEAT);
262
263		dev_warn(&pdev->dev,
264			 "heartbeat value must be 1<=x<=3600, using %d\n",
265			 sh_wdt_dev.timeout);
266	}
267
268	dev_info(&pdev->dev, "configured with heartbeat=%d sec (nowayout=%d)\n",
269		 sh_wdt_dev.timeout, nowayout);
270
271	rc = watchdog_register_device(&sh_wdt_dev);
272	if (unlikely(rc)) {
273		dev_err(&pdev->dev, "Can't register watchdog (err=%d)\n", rc);
274		return rc;
275	}
276
277	init_timer(&wdt->timer);
278	wdt->timer.function	= sh_wdt_ping;
279	wdt->timer.data		= (unsigned long)wdt;
280	wdt->timer.expires	= next_ping_period(clock_division_ratio);
281
282	dev_info(&pdev->dev, "initialized.\n");
283
284	pm_runtime_enable(&pdev->dev);
285
286	return 0;
287}
288
289static int sh_wdt_remove(struct platform_device *pdev)
290{
291	watchdog_unregister_device(&sh_wdt_dev);
292
293	pm_runtime_disable(&pdev->dev);
294
295	return 0;
296}
297
298static void sh_wdt_shutdown(struct platform_device *pdev)
299{
300	sh_wdt_stop(&sh_wdt_dev);
301}
302
303static struct platform_driver sh_wdt_driver = {
304	.driver		= {
305		.name	= DRV_NAME,
306	},
307
308	.probe		= sh_wdt_probe,
309	.remove		= sh_wdt_remove,
310	.shutdown	= sh_wdt_shutdown,
311};
312
313static int __init sh_wdt_init(void)
314{
315	if (unlikely(clock_division_ratio < 0x5 ||
316		     clock_division_ratio > 0x7)) {
317		clock_division_ratio = WTCSR_CKS_4096;
318
319		pr_info("divisor must be 0x5<=x<=0x7, using %d\n",
320			clock_division_ratio);
321	}
322
323	return platform_driver_register(&sh_wdt_driver);
324}
325
326static void __exit sh_wdt_exit(void)
327{
328	platform_driver_unregister(&sh_wdt_driver);
329}
330module_init(sh_wdt_init);
331module_exit(sh_wdt_exit);
332
333MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>");
334MODULE_DESCRIPTION("SuperH watchdog driver");
335MODULE_LICENSE("GPL");
336MODULE_ALIAS("platform:" DRV_NAME);
337
338module_param(clock_division_ratio, int, 0);
339MODULE_PARM_DESC(clock_division_ratio,
340	"Clock division ratio. Valid ranges are from 0x5 (1.31ms) "
341	"to 0x7 (5.25ms). (default=" __MODULE_STRING(WTCSR_CKS_4096) ")");
342
343module_param(heartbeat, int, 0);
344MODULE_PARM_DESC(heartbeat,
345	"Watchdog heartbeat in seconds. (1 <= heartbeat <= 3600, default="
346				__MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
347
348module_param(nowayout, bool, 0);
349MODULE_PARM_DESC(nowayout,
350	"Watchdog cannot be stopped once started (default="
351				__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
352