1/*
2 * Driver for the Synopsys DesignWare DMA Controller
3 *
4 * Copyright (C) 2007 Atmel Corporation
5 * Copyright (C) 2010-2011 ST Microelectronics
6 * Copyright (C) 2014 Intel Corporation
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#ifndef _DMA_DW_H
13#define _DMA_DW_H
14
15#include <linux/clk.h>
16#include <linux/device.h>
17#include <linux/dmaengine.h>
18
19#include <linux/platform_data/dma-dw.h>
20
21struct dw_dma;
22
23/**
24 * struct dw_dma_chip - representation of DesignWare DMA controller hardware
25 * @dev:		struct device of the DMA controller
26 * @irq:		irq line
27 * @regs:		memory mapped I/O space
28 * @clk:		hclk clock
29 * @dw:			struct dw_dma that is filed by dw_dma_probe()
30 */
31struct dw_dma_chip {
32	struct device	*dev;
33	int		irq;
34	void __iomem	*regs;
35	struct clk	*clk;
36	struct dw_dma	*dw;
37};
38
39/* Export to the platform drivers */
40int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata);
41int dw_dma_remove(struct dw_dma_chip *chip);
42
43/* DMA API extensions */
44struct dw_desc;
45
46struct dw_cyclic_desc {
47	struct dw_desc	**desc;
48	unsigned long	periods;
49	void		(*period_callback)(void *param);
50	void		*period_callback_param;
51};
52
53struct dw_cyclic_desc *dw_dma_cyclic_prep(struct dma_chan *chan,
54		dma_addr_t buf_addr, size_t buf_len, size_t period_len,
55		enum dma_transfer_direction direction);
56void dw_dma_cyclic_free(struct dma_chan *chan);
57int dw_dma_cyclic_start(struct dma_chan *chan);
58void dw_dma_cyclic_stop(struct dma_chan *chan);
59
60dma_addr_t dw_dma_get_src_addr(struct dma_chan *chan);
61
62dma_addr_t dw_dma_get_dst_addr(struct dma_chan *chan);
63
64#endif /* _DMA_DW_H */
65