1#ifndef LINUX_SSB_H_
2#define LINUX_SSB_H_
3
4#include <linux/device.h>
5#include <linux/list.h>
6#include <linux/types.h>
7#include <linux/spinlock.h>
8#include <linux/pci.h>
9#include <linux/gpio.h>
10#include <linux/mod_devicetable.h>
11#include <linux/dma-mapping.h>
12#include <linux/platform_device.h>
13
14#include <linux/ssb/ssb_regs.h>
15
16
17struct pcmcia_device;
18struct ssb_bus;
19struct ssb_driver;
20
21struct ssb_sprom_core_pwr_info {
22	u8 itssi_2g, itssi_5g;
23	u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
24	u16 pa_2g[4], pa_5gl[4], pa_5g[4], pa_5gh[4];
25};
26
27struct ssb_sprom {
28	u8 revision;
29	u8 il0mac[6] __aligned(sizeof(u16));	/* MAC address for 802.11b/g */
30	u8 et0mac[6] __aligned(sizeof(u16));	/* MAC address for Ethernet */
31	u8 et1mac[6] __aligned(sizeof(u16));	/* MAC address for 802.11a */
32	u8 et0phyaddr;		/* MII address for enet0 */
33	u8 et1phyaddr;		/* MII address for enet1 */
34	u8 et0mdcport;		/* MDIO for enet0 */
35	u8 et1mdcport;		/* MDIO for enet1 */
36	u16 dev_id;		/* Device ID overriding e.g. PCI ID */
37	u16 board_rev;		/* Board revision number from SPROM. */
38	u16 board_num;		/* Board number from SPROM. */
39	u16 board_type;		/* Board type from SPROM. */
40	u8 country_code;	/* Country Code */
41	char alpha2[2];		/* Country Code as two chars like EU or US */
42	u8 leddc_on_time;	/* LED Powersave Duty Cycle On Count */
43	u8 leddc_off_time;	/* LED Powersave Duty Cycle Off Count */
44	u8 ant_available_a;	/* 2GHz antenna available bits (up to 4) */
45	u8 ant_available_bg;	/* 5GHz antenna available bits (up to 4) */
46	u16 pa0b0;
47	u16 pa0b1;
48	u16 pa0b2;
49	u16 pa1b0;
50	u16 pa1b1;
51	u16 pa1b2;
52	u16 pa1lob0;
53	u16 pa1lob1;
54	u16 pa1lob2;
55	u16 pa1hib0;
56	u16 pa1hib1;
57	u16 pa1hib2;
58	u8 gpio0;		/* GPIO pin 0 */
59	u8 gpio1;		/* GPIO pin 1 */
60	u8 gpio2;		/* GPIO pin 2 */
61	u8 gpio3;		/* GPIO pin 3 */
62	u8 maxpwr_bg;		/* 2.4GHz Amplifier Max Power (in dBm Q5.2) */
63	u8 maxpwr_al;		/* 5.2GHz Amplifier Max Power (in dBm Q5.2) */
64	u8 maxpwr_a;		/* 5.3GHz Amplifier Max Power (in dBm Q5.2) */
65	u8 maxpwr_ah;		/* 5.8GHz Amplifier Max Power (in dBm Q5.2) */
66	u8 itssi_a;		/* Idle TSSI Target for A-PHY */
67	u8 itssi_bg;		/* Idle TSSI Target for B/G-PHY */
68	u8 tri2g;		/* 2.4GHz TX isolation */
69	u8 tri5gl;		/* 5.2GHz TX isolation */
70	u8 tri5g;		/* 5.3GHz TX isolation */
71	u8 tri5gh;		/* 5.8GHz TX isolation */
72	u8 txpid2g[4];		/* 2GHz TX power index */
73	u8 txpid5gl[4];		/* 4.9 - 5.1GHz TX power index */
74	u8 txpid5g[4];		/* 5.1 - 5.5GHz TX power index */
75	u8 txpid5gh[4];		/* 5.5 - ...GHz TX power index */
76	s8 rxpo2g;		/* 2GHz RX power offset */
77	s8 rxpo5g;		/* 5GHz RX power offset */
78	u8 rssisav2g;		/* 2GHz RSSI params */
79	u8 rssismc2g;
80	u8 rssismf2g;
81	u8 bxa2g;		/* 2GHz BX arch */
82	u8 rssisav5g;		/* 5GHz RSSI params */
83	u8 rssismc5g;
84	u8 rssismf5g;
85	u8 bxa5g;		/* 5GHz BX arch */
86	u16 cck2gpo;		/* CCK power offset */
87	u32 ofdm2gpo;		/* 2.4GHz OFDM power offset */
88	u32 ofdm5glpo;		/* 5.2GHz OFDM power offset */
89	u32 ofdm5gpo;		/* 5.3GHz OFDM power offset */
90	u32 ofdm5ghpo;		/* 5.8GHz OFDM power offset */
91	u16 boardflags_lo;	/* Board flags (bits 0-15) */
92	u16 boardflags_hi;	/* Board flags (bits 16-31) */
93	u16 boardflags2_lo;	/* Board flags (bits 32-47) */
94	u16 boardflags2_hi;	/* Board flags (bits 48-63) */
95	/* TODO store board flags in a single u64 */
96
97	struct ssb_sprom_core_pwr_info core_pwr_info[4];
98
99	/* Antenna gain values for up to 4 antennas
100	 * on each band. Values in dBm/4 (Q5.2). Negative gain means the
101	 * loss in the connectors is bigger than the gain. */
102	struct {
103		s8 a0, a1, a2, a3;
104	} antenna_gain;
105
106	struct {
107		struct {
108			u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
109		} ghz2;
110		struct {
111			u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
112		} ghz5;
113	} fem;
114
115	u16 mcs2gpo[8];
116	u16 mcs5gpo[8];
117	u16 mcs5glpo[8];
118	u16 mcs5ghpo[8];
119	u8 opo;
120
121	u8 rxgainerr2ga[3];
122	u8 rxgainerr5gla[3];
123	u8 rxgainerr5gma[3];
124	u8 rxgainerr5gha[3];
125	u8 rxgainerr5gua[3];
126
127	u8 noiselvl2ga[3];
128	u8 noiselvl5gla[3];
129	u8 noiselvl5gma[3];
130	u8 noiselvl5gha[3];
131	u8 noiselvl5gua[3];
132
133	u8 regrev;
134	u8 txchain;
135	u8 rxchain;
136	u8 antswitch;
137	u16 cddpo;
138	u16 stbcpo;
139	u16 bw40po;
140	u16 bwduppo;
141
142	u8 tempthresh;
143	u8 tempoffset;
144	u16 rawtempsense;
145	u8 measpower;
146	u8 tempsense_slope;
147	u8 tempcorrx;
148	u8 tempsense_option;
149	u8 freqoffset_corr;
150	u8 iqcal_swp_dis;
151	u8 hw_iqcal_en;
152	u8 elna2g;
153	u8 elna5g;
154	u8 phycal_tempdelta;
155	u8 temps_period;
156	u8 temps_hysteresis;
157	u8 measpower1;
158	u8 measpower2;
159	u8 pcieingress_war;
160
161	/* power per rate from sromrev 9 */
162	u16 cckbw202gpo;
163	u16 cckbw20ul2gpo;
164	u32 legofdmbw202gpo;
165	u32 legofdmbw20ul2gpo;
166	u32 legofdmbw205glpo;
167	u32 legofdmbw20ul5glpo;
168	u32 legofdmbw205gmpo;
169	u32 legofdmbw20ul5gmpo;
170	u32 legofdmbw205ghpo;
171	u32 legofdmbw20ul5ghpo;
172	u32 mcsbw202gpo;
173	u32 mcsbw20ul2gpo;
174	u32 mcsbw402gpo;
175	u32 mcsbw205glpo;
176	u32 mcsbw20ul5glpo;
177	u32 mcsbw405glpo;
178	u32 mcsbw205gmpo;
179	u32 mcsbw20ul5gmpo;
180	u32 mcsbw405gmpo;
181	u32 mcsbw205ghpo;
182	u32 mcsbw20ul5ghpo;
183	u32 mcsbw405ghpo;
184	u16 mcs32po;
185	u16 legofdm40duppo;
186	u8 sar2g;
187	u8 sar5g;
188};
189
190/* Information about the PCB the circuitry is soldered on. */
191struct ssb_boardinfo {
192	u16 vendor;
193	u16 type;
194};
195
196
197struct ssb_device;
198/* Lowlevel read/write operations on the device MMIO.
199 * Internal, don't use that outside of ssb. */
200struct ssb_bus_ops {
201	u8 (*read8)(struct ssb_device *dev, u16 offset);
202	u16 (*read16)(struct ssb_device *dev, u16 offset);
203	u32 (*read32)(struct ssb_device *dev, u16 offset);
204	void (*write8)(struct ssb_device *dev, u16 offset, u8 value);
205	void (*write16)(struct ssb_device *dev, u16 offset, u16 value);
206	void (*write32)(struct ssb_device *dev, u16 offset, u32 value);
207#ifdef CONFIG_SSB_BLOCKIO
208	void (*block_read)(struct ssb_device *dev, void *buffer,
209			   size_t count, u16 offset, u8 reg_width);
210	void (*block_write)(struct ssb_device *dev, const void *buffer,
211			    size_t count, u16 offset, u8 reg_width);
212#endif
213};
214
215
216/* Core-ID values. */
217#define SSB_DEV_CHIPCOMMON	0x800
218#define SSB_DEV_ILINE20		0x801
219#define SSB_DEV_SDRAM		0x803
220#define SSB_DEV_PCI		0x804
221#define SSB_DEV_MIPS		0x805
222#define SSB_DEV_ETHERNET	0x806
223#define SSB_DEV_V90		0x807
224#define SSB_DEV_USB11_HOSTDEV	0x808
225#define SSB_DEV_ADSL		0x809
226#define SSB_DEV_ILINE100	0x80A
227#define SSB_DEV_IPSEC		0x80B
228#define SSB_DEV_PCMCIA		0x80D
229#define SSB_DEV_INTERNAL_MEM	0x80E
230#define SSB_DEV_MEMC_SDRAM	0x80F
231#define SSB_DEV_EXTIF		0x811
232#define SSB_DEV_80211		0x812
233#define SSB_DEV_MIPS_3302	0x816
234#define SSB_DEV_USB11_HOST	0x817
235#define SSB_DEV_USB11_DEV	0x818
236#define SSB_DEV_USB20_HOST	0x819
237#define SSB_DEV_USB20_DEV	0x81A
238#define SSB_DEV_SDIO_HOST	0x81B
239#define SSB_DEV_ROBOSWITCH	0x81C
240#define SSB_DEV_PARA_ATA	0x81D
241#define SSB_DEV_SATA_XORDMA	0x81E
242#define SSB_DEV_ETHERNET_GBIT	0x81F
243#define SSB_DEV_PCIE		0x820
244#define SSB_DEV_MIMO_PHY	0x821
245#define SSB_DEV_SRAM_CTRLR	0x822
246#define SSB_DEV_MINI_MACPHY	0x823
247#define SSB_DEV_ARM_1176	0x824
248#define SSB_DEV_ARM_7TDMI	0x825
249#define SSB_DEV_ARM_CM3		0x82A
250
251/* Vendor-ID values */
252#define SSB_VENDOR_BROADCOM	0x4243
253
254/* Some kernel subsystems poke with dev->drvdata, so we must use the
255 * following ugly workaround to get from struct device to struct ssb_device */
256struct __ssb_dev_wrapper {
257	struct device dev;
258	struct ssb_device *sdev;
259};
260
261struct ssb_device {
262	/* Having a copy of the ops pointer in each dev struct
263	 * is an optimization. */
264	const struct ssb_bus_ops *ops;
265
266	struct device *dev, *dma_dev;
267
268	struct ssb_bus *bus;
269	struct ssb_device_id id;
270
271	u8 core_index;
272	unsigned int irq;
273
274	/* Internal-only stuff follows. */
275	void *drvdata;		/* Per-device data */
276	void *devtypedata;	/* Per-devicetype (eg 802.11) data */
277};
278
279/* Go from struct device to struct ssb_device. */
280static inline
281struct ssb_device * dev_to_ssb_dev(struct device *dev)
282{
283	struct __ssb_dev_wrapper *wrap;
284	wrap = container_of(dev, struct __ssb_dev_wrapper, dev);
285	return wrap->sdev;
286}
287
288/* Device specific user data */
289static inline
290void ssb_set_drvdata(struct ssb_device *dev, void *data)
291{
292	dev->drvdata = data;
293}
294static inline
295void * ssb_get_drvdata(struct ssb_device *dev)
296{
297	return dev->drvdata;
298}
299
300/* Devicetype specific user data. This is per device-type (not per device) */
301void ssb_set_devtypedata(struct ssb_device *dev, void *data);
302static inline
303void * ssb_get_devtypedata(struct ssb_device *dev)
304{
305	return dev->devtypedata;
306}
307
308
309struct ssb_driver {
310	const char *name;
311	const struct ssb_device_id *id_table;
312
313	int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id);
314	void (*remove)(struct ssb_device *dev);
315	int (*suspend)(struct ssb_device *dev, pm_message_t state);
316	int (*resume)(struct ssb_device *dev);
317	void (*shutdown)(struct ssb_device *dev);
318
319	struct device_driver drv;
320};
321#define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
322
323extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
324#define ssb_driver_register(drv) \
325	__ssb_driver_register(drv, THIS_MODULE)
326
327extern void ssb_driver_unregister(struct ssb_driver *drv);
328
329
330
331
332enum ssb_bustype {
333	SSB_BUSTYPE_SSB,	/* This SSB bus is the system bus */
334	SSB_BUSTYPE_PCI,	/* SSB is connected to PCI bus */
335	SSB_BUSTYPE_PCMCIA,	/* SSB is connected to PCMCIA bus */
336	SSB_BUSTYPE_SDIO,	/* SSB is connected to SDIO bus */
337};
338
339/* board_vendor */
340#define SSB_BOARDVENDOR_BCM	0x14E4	/* Broadcom */
341#define SSB_BOARDVENDOR_DELL	0x1028	/* Dell */
342#define SSB_BOARDVENDOR_HP	0x0E11	/* HP */
343/* board_type */
344#define SSB_BOARD_BCM94301CB	0x0406
345#define SSB_BOARD_BCM94301MP	0x0407
346#define SSB_BOARD_BU4309	0x040A
347#define SSB_BOARD_BCM94309CB	0x040B
348#define SSB_BOARD_BCM4309MP	0x040C
349#define SSB_BOARD_BU4306	0x0416
350#define SSB_BOARD_BCM94306MP	0x0418
351#define SSB_BOARD_BCM4309G	0x0421
352#define SSB_BOARD_BCM4306CB	0x0417
353#define SSB_BOARD_BCM94306PC	0x0425	/* pcmcia 3.3v 4306 card */
354#define SSB_BOARD_BCM94306CBSG	0x042B	/* with SiGe PA */
355#define SSB_BOARD_PCSG94306	0x042D	/* with SiGe PA */
356#define SSB_BOARD_BU4704SD	0x042E	/* with sdram */
357#define SSB_BOARD_BCM94704AGR	0x042F	/* dual 11a/11g Router */
358#define SSB_BOARD_BCM94308MP	0x0430	/* 11a-only minipci */
359#define SSB_BOARD_BU4318	0x0447
360#define SSB_BOARD_CB4318	0x0448
361#define SSB_BOARD_MPG4318	0x0449
362#define SSB_BOARD_MP4318	0x044A
363#define SSB_BOARD_SD4318	0x044B
364#define SSB_BOARD_BCM94306P	0x044C	/* with SiGe */
365#define SSB_BOARD_BCM94303MP	0x044E
366#define SSB_BOARD_BCM94306MPM	0x0450
367#define SSB_BOARD_BCM94306MPL	0x0453
368#define SSB_BOARD_PC4303	0x0454	/* pcmcia */
369#define SSB_BOARD_BCM94306MPLNA	0x0457
370#define SSB_BOARD_BCM94306MPH	0x045B
371#define SSB_BOARD_BCM94306PCIV	0x045C
372#define SSB_BOARD_BCM94318MPGH	0x0463
373#define SSB_BOARD_BU4311	0x0464
374#define SSB_BOARD_BCM94311MC	0x0465
375#define SSB_BOARD_BCM94311MCAG	0x0466
376/* 4321 boards */
377#define SSB_BOARD_BU4321	0x046B
378#define SSB_BOARD_BU4321E	0x047C
379#define SSB_BOARD_MP4321	0x046C
380#define SSB_BOARD_CB2_4321	0x046D
381#define SSB_BOARD_CB2_4321_AG	0x0066
382#define SSB_BOARD_MC4321	0x046E
383/* 4325 boards */
384#define SSB_BOARD_BCM94325DEVBU	0x0490
385#define SSB_BOARD_BCM94325BGABU	0x0491
386#define SSB_BOARD_BCM94325SDGWB	0x0492
387#define SSB_BOARD_BCM94325SDGMDL	0x04AA
388#define SSB_BOARD_BCM94325SDGMDL2	0x04C6
389#define SSB_BOARD_BCM94325SDGMDL3	0x04C9
390#define SSB_BOARD_BCM94325SDABGWBA	0x04E1
391/* 4322 boards */
392#define SSB_BOARD_BCM94322MC	0x04A4
393#define SSB_BOARD_BCM94322USB	0x04A8	/* dualband */
394#define SSB_BOARD_BCM94322HM	0x04B0
395#define SSB_BOARD_BCM94322USB2D	0x04Bf	/* single band discrete front end */
396/* 4312 boards */
397#define SSB_BOARD_BU4312	0x048A
398#define SSB_BOARD_BCM4312MCGSG	0x04B5
399/* chip_package */
400#define SSB_CHIPPACK_BCM4712S	1	/* Small 200pin 4712 */
401#define SSB_CHIPPACK_BCM4712M	2	/* Medium 225pin 4712 */
402#define SSB_CHIPPACK_BCM4712L	0	/* Large 340pin 4712 */
403
404#include <linux/ssb/ssb_driver_chipcommon.h>
405#include <linux/ssb/ssb_driver_mips.h>
406#include <linux/ssb/ssb_driver_extif.h>
407#include <linux/ssb/ssb_driver_pci.h>
408
409struct ssb_bus {
410	/* The MMIO area. */
411	void __iomem *mmio;
412
413	const struct ssb_bus_ops *ops;
414
415	/* The core currently mapped into the MMIO window.
416	 * Not valid on all host-buses. So don't use outside of SSB. */
417	struct ssb_device *mapped_device;
418	union {
419		/* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
420		u8 mapped_pcmcia_seg;
421		/* Current SSB base address window for SDIO. */
422		u32 sdio_sbaddr;
423	};
424	/* Lock for core and segment switching.
425	 * On PCMCIA-host busses this is used to protect the whole MMIO access. */
426	spinlock_t bar_lock;
427
428	/* The host-bus this backplane is running on. */
429	enum ssb_bustype bustype;
430	/* Pointers to the host-bus. Check bustype before using any of these pointers. */
431	union {
432		/* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */
433		struct pci_dev *host_pci;
434		/* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */
435		struct pcmcia_device *host_pcmcia;
436		/* Pointer to the SDIO device (only if bustype == SSB_BUSTYPE_SDIO). */
437		struct sdio_func *host_sdio;
438	};
439
440	/* See enum ssb_quirks */
441	unsigned int quirks;
442
443#ifdef CONFIG_SSB_SPROM
444	/* Mutex to protect the SPROM writing. */
445	struct mutex sprom_mutex;
446#endif
447
448	/* ID information about the Chip. */
449	u16 chip_id;
450	u8 chip_rev;
451	u16 sprom_offset;
452	u16 sprom_size;		/* number of words in sprom */
453	u8 chip_package;
454
455	/* List of devices (cores) on the backplane. */
456	struct ssb_device devices[SSB_MAX_NR_CORES];
457	u8 nr_devices;
458
459	/* Software ID number for this bus. */
460	unsigned int busnumber;
461
462	/* The ChipCommon device (if available). */
463	struct ssb_chipcommon chipco;
464	/* The PCI-core device (if available). */
465	struct ssb_pcicore pcicore;
466	/* The MIPS-core device (if available). */
467	struct ssb_mipscore mipscore;
468	/* The EXTif-core device (if available). */
469	struct ssb_extif extif;
470
471	/* The following structure elements are not available in early
472	 * SSB initialization. Though, they are available for regular
473	 * registered drivers at any stage. So be careful when
474	 * using them in the ssb core code. */
475
476	/* ID information about the PCB. */
477	struct ssb_boardinfo boardinfo;
478	/* Contents of the SPROM. */
479	struct ssb_sprom sprom;
480	/* If the board has a cardbus slot, this is set to true. */
481	bool has_cardbus_slot;
482
483#ifdef CONFIG_SSB_EMBEDDED
484	/* Lock for GPIO register access. */
485	spinlock_t gpio_lock;
486	struct platform_device *watchdog;
487#endif /* EMBEDDED */
488#ifdef CONFIG_SSB_DRIVER_GPIO
489	struct gpio_chip gpio;
490	struct irq_domain *irq_domain;
491#endif /* DRIVER_GPIO */
492
493	/* Internal-only stuff follows. Do not touch. */
494	struct list_head list;
495#ifdef CONFIG_SSB_DEBUG
496	/* Is the bus already powered up? */
497	bool powered_up;
498	int power_warn_count;
499#endif /* DEBUG */
500};
501
502enum ssb_quirks {
503	/* SDIO connected card requires performing a read after writing a 32-bit value */
504	SSB_QUIRK_SDIO_READ_AFTER_WRITE32	= (1 << 0),
505};
506
507/* The initialization-invariants. */
508struct ssb_init_invariants {
509	/* Versioning information about the PCB. */
510	struct ssb_boardinfo boardinfo;
511	/* The SPROM information. That's either stored in an
512	 * EEPROM or NVRAM on the board. */
513	struct ssb_sprom sprom;
514	/* If the board has a cardbus slot, this is set to true. */
515	bool has_cardbus_slot;
516};
517/* Type of function to fetch the invariants. */
518typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus,
519				     struct ssb_init_invariants *iv);
520
521/* Register a SSB system bus. get_invariants() is called after the
522 * basic system devices are initialized.
523 * The invariants are usually fetched from some NVRAM.
524 * Put the invariants into the struct pointed to by iv. */
525extern int ssb_bus_ssbbus_register(struct ssb_bus *bus,
526				   unsigned long baseaddr,
527				   ssb_invariants_func_t get_invariants);
528#ifdef CONFIG_SSB_PCIHOST
529extern int ssb_bus_pcibus_register(struct ssb_bus *bus,
530				   struct pci_dev *host_pci);
531#endif /* CONFIG_SSB_PCIHOST */
532#ifdef CONFIG_SSB_PCMCIAHOST
533extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
534				      struct pcmcia_device *pcmcia_dev,
535				      unsigned long baseaddr);
536#endif /* CONFIG_SSB_PCMCIAHOST */
537#ifdef CONFIG_SSB_SDIOHOST
538extern int ssb_bus_sdiobus_register(struct ssb_bus *bus,
539				    struct sdio_func *sdio_func,
540				    unsigned int quirks);
541#endif /* CONFIG_SSB_SDIOHOST */
542
543
544extern void ssb_bus_unregister(struct ssb_bus *bus);
545
546/* Does the device have an SPROM? */
547extern bool ssb_is_sprom_available(struct ssb_bus *bus);
548
549/* Set a fallback SPROM.
550 * See kdoc at the function definition for complete documentation. */
551extern int ssb_arch_register_fallback_sprom(
552		int (*sprom_callback)(struct ssb_bus *bus,
553		struct ssb_sprom *out));
554
555/* Suspend a SSB bus.
556 * Call this from the parent bus suspend routine. */
557extern int ssb_bus_suspend(struct ssb_bus *bus);
558/* Resume a SSB bus.
559 * Call this from the parent bus resume routine. */
560extern int ssb_bus_resume(struct ssb_bus *bus);
561
562extern u32 ssb_clockspeed(struct ssb_bus *bus);
563
564/* Is the device enabled in hardware? */
565int ssb_device_is_enabled(struct ssb_device *dev);
566/* Enable a device and pass device-specific SSB_TMSLOW flags.
567 * If no device-specific flags are available, use 0. */
568void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags);
569/* Disable a device in hardware and pass SSB_TMSLOW flags (if any). */
570void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags);
571
572
573/* Device MMIO register read/write functions. */
574static inline u8 ssb_read8(struct ssb_device *dev, u16 offset)
575{
576	return dev->ops->read8(dev, offset);
577}
578static inline u16 ssb_read16(struct ssb_device *dev, u16 offset)
579{
580	return dev->ops->read16(dev, offset);
581}
582static inline u32 ssb_read32(struct ssb_device *dev, u16 offset)
583{
584	return dev->ops->read32(dev, offset);
585}
586static inline void ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
587{
588	dev->ops->write8(dev, offset, value);
589}
590static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
591{
592	dev->ops->write16(dev, offset, value);
593}
594static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
595{
596	dev->ops->write32(dev, offset, value);
597}
598#ifdef CONFIG_SSB_BLOCKIO
599static inline void ssb_block_read(struct ssb_device *dev, void *buffer,
600				  size_t count, u16 offset, u8 reg_width)
601{
602	dev->ops->block_read(dev, buffer, count, offset, reg_width);
603}
604
605static inline void ssb_block_write(struct ssb_device *dev, const void *buffer,
606				   size_t count, u16 offset, u8 reg_width)
607{
608	dev->ops->block_write(dev, buffer, count, offset, reg_width);
609}
610#endif /* CONFIG_SSB_BLOCKIO */
611
612
613/* The SSB DMA API. Use this API for any DMA operation on the device.
614 * This API basically is a wrapper that calls the correct DMA API for
615 * the host device type the SSB device is attached to. */
616
617/* Translation (routing) bits that need to be ORed to DMA
618 * addresses before they are given to a device. */
619extern u32 ssb_dma_translation(struct ssb_device *dev);
620#define SSB_DMA_TRANSLATION_MASK	0xC0000000
621#define SSB_DMA_TRANSLATION_SHIFT	30
622
623static inline void __cold __ssb_dma_not_implemented(struct ssb_device *dev)
624{
625#ifdef CONFIG_SSB_DEBUG
626	printk(KERN_ERR "SSB: BUG! Calling DMA API for "
627	       "unsupported bustype %d\n", dev->bus->bustype);
628#endif /* DEBUG */
629}
630
631#ifdef CONFIG_SSB_PCIHOST
632/* PCI-host wrapper driver */
633extern int ssb_pcihost_register(struct pci_driver *driver);
634static inline void ssb_pcihost_unregister(struct pci_driver *driver)
635{
636	pci_unregister_driver(driver);
637}
638
639static inline
640void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
641{
642	if (sdev->bus->bustype == SSB_BUSTYPE_PCI)
643		pci_set_power_state(sdev->bus->host_pci, state);
644}
645#else
646static inline void ssb_pcihost_unregister(struct pci_driver *driver)
647{
648}
649
650static inline
651void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
652{
653}
654#endif /* CONFIG_SSB_PCIHOST */
655
656
657/* If a driver is shutdown or suspended, call this to signal
658 * that the bus may be completely powered down. SSB will decide,
659 * if it's really time to power down the bus, based on if there
660 * are other devices that want to run. */
661extern int ssb_bus_may_powerdown(struct ssb_bus *bus);
662/* Before initializing and enabling a device, call this to power-up the bus.
663 * If you want to allow use of dynamic-power-control, pass the flag.
664 * Otherwise static always-on powercontrol will be used. */
665extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
666
667extern void ssb_commit_settings(struct ssb_bus *bus);
668
669/* Various helper functions */
670extern u32 ssb_admatch_base(u32 adm);
671extern u32 ssb_admatch_size(u32 adm);
672
673/* PCI device mapping and fixup routines.
674 * Called from the architecture pcibios init code.
675 * These are only available on SSB_EMBEDDED configurations. */
676#ifdef CONFIG_SSB_EMBEDDED
677int ssb_pcibios_plat_dev_init(struct pci_dev *dev);
678int ssb_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
679#endif /* CONFIG_SSB_EMBEDDED */
680
681#endif /* LINUX_SSB_H_ */
682